BUV47A

BUV47, BUV47A NPN SILICON POWER TRANSISTORS Copyright © 1997, Power Innovations Limited, UK AUGUST 1978 - REVISED MARCH 1997 q q q Rugged Triple-Diffused Planar Construction 9 A Continuous Collector Current 1000 Volt Blocking Capability B SOT-93 PACKAGE (TOP VIEW) 1 C 2 E 3 Pin 2 is in electrical contact with the mounting base. MDTRAA absolute maximum ratings at 25°C case temperature (unless otherwise noted) RATING Collector-emitter voltage (V BE = -2.5 V) Collector-emitter voltage (RBE = 10 Ω) Collector-emitter voltage (IB = 0) Continuous collector current Peak collector current (see Note 1) Continuous base current Peak base current Continuous device dissipation at (or below) 25°C case temperature Operating junction temperature range Storage temperature range NOTE 1: This value applies for tp ≤ 5 ms, duty cycle ≤ 2%. BUV47 BUV47A BUV47 BUV47A BUV47 BUV47A SYMBOL VCEX VCER VCEO IC ICM IB IBM Ptot Tj Tstg VALUE 850 1000 850 1000 400 450 9 15 3 6 120 -65 to +150 -65 to +150 UNIT V V V A A A A W °C °C PRODUCT INFORMATION Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters. 1 BUV47, BUV47A NPN SILICON POWER TRANSISTORS AUGUST 1978 - REVISED MARCH 1997 electrical characteristics at 25°C case temperature (unless otherwise noted) PARAMETER V CEO(sus) V(BR)EBO Collector-emitter sustaining voltage Base-emitter breakdown voltage Collector-emitter cut-off current IC = 200 mA IE = 50 mA TEST CONDITIONS L = 25 mH IC = 0 VBE = 0 VBE = 0 VBE = 0 VBE = 0 RBE = 10 Ω RBE = 10 Ω RBE = 10 Ω RBE = 10 Ω IC = 0 IC = IC = IC = IC = IC = 0 5A 8A 5A 0.5 A (see Notes 3 and 4) (see Notes 3 and 4) f= 1 MHz 8 105 TC = 125°C TC = 125°C TC = 125°C TC = 125°C (see Note 2) (see Note 3) BUV47 BUV47A BUV47 BUV47A BUV47 BUV47A BUV47 BUV47A BUV47 BUV47A MIN 400 450 7 30 0.15 0.15 1.5 1.5 0.4 0.4 3.0 3.0 1 1.5 3.0 1.6 mA V V MHz pF mA mA TYP MAX UNIT V V VCE = 850 V ICES V CE = 1000 V V CE = 850 V V CE = 1000 V VCE = 850 V ICER Collector-emitter cut-off current Emitter cut-off current Collector-emitter saturation voltage Base-emitter saturation voltage Current gain bandwidth product Output capacitance V CE = 1000 V V CE = 850 V V CE = 1000 V IEBO VCE(sat) V BE(sat) ft Cob VEB = IB = IB = IB = VCE = VCB = 5V 1A 2.5 A 1A 10 V 20 V f = 0.1 MHz NOTES: 2. Inductive loop switching measurement. 3. These parameters must be measured using pulse techniques, tp = 300 µs, duty cycle ≤ 2%. 4. These parameters must be measured using voltage-sensing contacts, separate from the current carrying contacts. thermal characteristics PARAMETER RθJC Junction to case thermal resistance MIN TYP MAX 1 UNIT °C/W resistive-load-switching characteristics at 25°C case temperature PARAMETER ton ts tf † TEST CONDITIONS IC = 5 A V CC = 150 V IB(on) = 1 A † MIN IB(off) = -1 A TYP MAX 1.0 3.0 0.8 UNIT µs µs µs Turn on time Storage time Fall time (see Figures 1 and 2) Voltage and current values shown are nominal; exact values vary slightly with transistor parameters. inductive-load-switching characteristics at 25°C case temperature (unless otherwise noted) PARAMETER tsv tfi Voltage storage time Current fall time IC = 5 A TC = 100°C TEST CONDITIONS IB(on) = 1 A (see Figures 3 and 4) † MIN VBE(off) = -5 V TYP MAX 4.0 0.4 UNIT µs µs PRODUCT INFORMATION 2 BUV47, BUV47A NPN SILICON POWER TRANSISTORS AUGUST 1978 - REVISED MARCH 1997 PARAMETER MEASUREMENT INFORMATION +25 V BD135 120 Ω 680 µ F 100 Ω V cc V= 250 V CC T V1 tp 47 Ω 100 µ F TUT 15 Ω V1 100 Ω BD136 82 Ω 680 µ F tp = 20 µ s Duty cycle = 1% V1 = 15 V, Source Impedance = 50 Ω Figure 1. Resistive-Load Switching Test Circuit C IC A - B = td B - C = tr E - F = tf D - E = ts A - C = ton D - F = toff B 90% 90% E 10% 10% F 0% 90% IB D dIB ≥ 2 A/µs dt I B(on) A 10% 0% I B(off) Figure 2. Resistive-Load Switching Waveforms PRODUCT INFORMATION 3 BUV47, BUV47A NPN SILICON POWER TRANSISTORS AUGUST 1978 - REVISED MARCH 1997 PARAMETER MEASUREMENT INFORMATION 33 Ω +5V D45H11 BY205-400 BY205-400 33 Ω 1 pF RB (on) 180 µ H vcc V Gen 68 Ω 1 kΩ 0.02 µ F +5V 1 kΩ 2N2222 TUT BY205-400 Vclamp = 400 V 270 Ω BY205-400 1 kΩ 2N2904 5X BY205-400 Adjust pw to obtain IC 47 Ω For IC < 6 A For IC ≥ 6 A VCC = 50 V VCC = 100 V 100 Ω D44H11 V BE(off) Figure 3. Inductive-Load Switching Test Circuit I B(on) A - B = tsv B - C = trv D - E = tfi E - F = tti B - E = txo IB A (90%) Base Current C 90% V CE B 10% Collector Voltage D (90%) E (10%) I C(on) Collector Current F (2%) NOTES: A. Waveforms are monitored on an oscilloscope with the following characteristics: tr < 15 ns, Rin > 10 Ω, Cin < 11.5 pF. B. Resistors must be noninductive types. Figure 4. Inductive-Load Switching Waveforms PRODUCT INFORMATION 4 BUV47, BUV47A NPN SILICON POWER TRANSISTORS AUGUST 1978 - REVISED MARCH 1997 TYPICAL CHARACTERISTICS TYPICAL DC CURRENT GAIN vs COLLECTOR CURRENT VCE(sat) - Collector-Emitter Saturation Voltage - V 100 VCE = 5 V TCP762AA COLLECTOR-EMITTER SATURATION VOLTAGE vs BASE CURRENT 5·0 TCP762AB hFE - Typical DC Current Gain TC = 125°C TC = 25°C TC = -65°C 4·0 TC = 25°C IC = 8 A IC = 6 A IC = 4 A IC = 2 A 3·0 10 2·0 1·0 1·0 0·1 0 1·0 IC - Collector Current - A 10 0 0·5 1·0 1·5 2·0 2·5 IB - Base Current - A Figure 5. Figure 6. COLLECTOR-EMITTER SATURATION VOLTAGE vs BASE CURRENT VCE(sat) - Collector-Emitter Saturation Voltage - V 0·5 TCP762AK COLLECTOR CUT-OFF CURRENT vs CASE TEMPERATURE 10 TCP762AC 0·4 ICES - Collector Cut-off Current - µA TC = 100°C IC = 8 A IC = 6 A IC = 4 A IC = 2 A 1·0 BUV47A VCE = 1000 V 0·1 BUV47 VCE = 850 V 0·01 0·3 0·2 0·1 0 0 0·5 1·0 1·5 2·0 2·5 IB - Base Current - A 0·001 -80 -60 -40 -20 0 20 40 60 80 100 120 140 TC - Case Temperature - °C Figure 7. Figure 8. PRODUCT INFORMATION 5 BUV47, BUV47A NPN SILICON POWER TRANSISTORS AUGUST 1978 - REVISED MARCH 1997 MAXIMUM SAFE OPERATING REGIONS MAXIMUM FORWARD-BIAS SAFE OPERATING AREA 100 SAP762AA IC - Collector Current - A 10 1·0 0.1 tp = 100 µs tp = 1 ms tp = 10 ms DC Operation 10 0·01 1·0 BUV47 BUV47A 100 1000 VCE - Collector-Emitter Voltage - V Figure 9. THERMAL INFORMATION THERMAL RESPONSE JUNCTION TO CASE vs POWER PULSE DURATION 1·0 50% 20% 0·1 10% 5% 2% 1% 0·01 0% t1 ZθJC / Rθ JC - Normalised Transient Thermal Impedance TCP762AD duty cycle = t1/t2 Read time at end of t1, TJ(max) - TC = PD(peak) · 10-4 10-3 ZθJC Rθ JC t2 () 10-2 · RθJC(max) 10 -1 0·001 10-5 t1 - Power Pulse Duration -s Figure 10. PRODUCT INFORMATION 6 BUV47, BUV47A NPN SILICON POWER TRANSISTORS AUGUST 1978 - REVISED MARCH 1997 MECHANICAL DATA SOT-93 3-pin plastic flange-mount package This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. SOT-93 4,90 4,70 ø 4,1 4,0 15,2 14,7 3,95 4,15 1,37 1,17 16,2 MAX. 12,2 MAX. 31,0 TYP. 18,0 TYP. 1 1,30 1,10 2 3 0,78 0,50 11,1 10,8 2,50 TYP. ALL LINEAR DIMENSIONS IN MILLIMETERS NOTE A: The centre pin is in electrical contact with the mounting tab. MDXXAW PRODUCT INFORMATION 7 BUV47, BUV47A NPN SILICON POWER TRANSISTORS AUGUST 1978 - REVISED MARCH 1997 IMPORTANT NOTICE Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except as mandated by government requirements. PI accepts no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS. Copyright © 1997, Power Innovations Limited PRODUCT INFORMATION 8