PO49FCT3807B

PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip 11/14/06 FEATURES: . Patented technology . Operating frequency up to 800MHz with 2pf load . Operating frequency up to 600MHz with 5pf load . Operating frequency up to 350MHz with 15pf load . Operating frequency up to 120MHz with 50pf load . Very low output pin to pin skew < 80ps . Very low pulse skew < 250ps . VCC = 1.65V to 3.6V . Propagation delay < 2.0 ns max with 15pf load . Low input capacitance: 3pf typical . 1:10 fanout . Available in 20pin 150mil wide QSOP package . Available in 20pin 300mil wide SOIC package . Available in 20pin 209mil wide SSOP package DESCRIPTION: Potato Semiconductor’s PO49FCT3807B is designed for world top performance using submicron CMOS technology to achieve 800MHz output frequency with less than 80ps output skew. PO49FCT3807B is a 1 . 6 5 V t o 3.6V CMOS 1 input to 10 Output Buffered Driver. Typical applications are clock and signal distribution. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment. Pin Configuration Logic Block Diagram Pin Description Pin Name INA O1 to O10 Description Input Outputs 1 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip 11/14/06 Maximum Ratings Description Storage Temperature Operation Temperature Operation Voltage Input Voltage Output Voltage Max -65 to 150 -40 to 85 -0.5 to +4.6 -0.5 to +5.5 -0.5 to Vcc+0.5 Unit °C °C V V V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. DC Electrical Characteristics Symbol Description Output High voltage Output Low voltage Input High voltage Input Low voltage Input High current Input Low current Clamp diode voltage Test Conditions Vcc=3V Vin=VIH or VIL, IOH= -12mA Vcc=3V Vin=VIH or VIL, IOH=12mA Guaranteed Logic HIGH Level (Input Pin) Guaranteed Logic LOW Level (Input Pin) Vcc = 3.6V and Vin = 5.5V Vcc = 3.6V and Vin = 0V Vcc = Min. And IIN = -18mA Min Typ M ax Unit VOH VOL VIH VIL IIH IIL VIK Notes: 1. 2. 3. 4. 5. 2.4 2 -0.5 - 3 0.4 -0.7 0.5 5.5 0.8 50 -50 -1.2 V V V V uA uA V For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 ° C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip 11/14/06 Power Supply Characteristics Symbol Description Quiescent Power Supply Current Test Conditions (1) Vcc=Max, Vin=Vcc or GND M in Typ M ax Unit IccQ Notes: 1. 2. 3. 4. - 0.1 30 uA For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25° C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. Capacitance Parameters (1) Description Input Capacitance Output Capacitance Test Conditions Vin = 0V Vout = 0V Typ M ax Unit Cin Cout Notes: 3 - 4 6 pF pF 1 This parameter is determined by device characterization but not production tested. Switching Characteristics Symbol Description Propagation Delay A to Bn Propagation Delay A to Bn Rise/Fall Time Pulse Skew (Same Package) Output Pin to Pin Skew (Same Package) Output Skew (Different Package) Input Frequency Input Frequency Input Frequency Input Frequency Test Conditions (1) CL = 15pF CL = 15pF 0.8V – 2.0V CL = 15pF, 125MHz CL = 15pF, 125MHz CL = 15pF, 125MHz CL = 5 0 p F CL =15pF CL = 5pF CL = 2pF M ax Unit tPLH tPHL tr/tf tsk(p) tsk(o) tsk(pp) fmax fmax fmax fmax Notes: 2.0 2.0 0.8 250 80 400 120 350 600 800 ns ns ns ps ps ps MHz MHz MHz MHz 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz 3 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip 11/14/06 Test Waveforms Test Circuit 50Ω 4 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip 11/14/06 Packaging Mechanical Drawing: 20 pin QSOP Packaging Mechanical Drawing: 20 pin SOIC 5 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip 11/14/06 Packaging Mechanical Drawing: 20 pin SSOP 20 0.55 .022 0.95 .037 .197 .220 5.00 5.60 .291 .322 7.40 8.20 1 .272 .295 6.90 7.50 .078 2.00 Max .004 .009 0.09 0.25 SEATING PLANE .0256 BSC 0.65 .0098 Max. 0.25 .002 Min 0.050 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 6 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip Ordering Information Ordering Code PO49FCT3807BCU PO49FCT3807BCR PO49FCT3807BQU PO49FCT3807BQR PO49FCT3807BSU PO49FCT3807BSR 20pin SOIC 20pin SOIC 11/14/06 Package Tube Tape and reel Tube Tape and reel Tube Tape and reel Pb-free & Green Pb-free & Green Pb-free & Green Pb-free & Green Pb-free & Green Pb-free & Green Top-Marking PO49FCT3807BC PO49FCT3807BC PO49FCT3807BQ PO49FCT3807BQ PO49FCT3807BS PO49FCT3807BS TA -40°C to 85°C -40°C to 85°C -40°C to 85°C -40°C to 85°C -40°C to 85°C -40°C to 85°C 20-pin QSOP 20-pin QSOP 20-pin SSOP 20-pin SSOP 7 Copyright © 2005-2006, Potato Semiconductor Corporation