PO74G08ASiR

PO54G08A, PO74G08A QUADRUPLE 2-INPUT POSITIVE-AND GATES 54, 74 Series GHz Logic FEATURES: . Patented technology . Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C . Operating frequency up to 1.125GHz with 2pf load . Operating frequency up to 750MHz with 5pf load . Operating frequency up to 350MHz with 15pf load . VCC Operates from 1.65V to 3.6V . Propagation delay < 1.5ns max with 15pf load . Low input capacitance: 4pf typical . Latch-Up Performance Exceeds 250 mA Per JESD 17 . ESD Protection Exceeds JESD 22 . 5000-VHuman-BodyModel (A114-A) . 200-VMachineModel (A115-A) . Available in 14pin 150mil wide SOIC package . Available in 14pin Ceramic Dual Flatpack . Available in 20pin Leadless Ceramic Chip Carrier 09/12/07 DESCRIPTION: Potato Semiconductor’s PO74G08A is designed for world top performance using submicron CMOS technology to achieve 1.125GHz TTL /CMOS output frequency with less than 1.5ns propagation delay. This quadruple 2-input positive-AND gate is designed for 1.65-V to 3.6-V VCC operation. The PO74G08A performs the Boolean function Y= A · B or Y= A + B in positive logic. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment. Pin Configuration 1A 1B 1Y 2A 2B 2Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 V CC 4B 4A 4Y 3B 3A 3Y 1B 1A NC VCC 4B 1Y NC 2A NC 2B 4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13 4A NC 4Y NC 3B Pin Description INPUTS A H L X Logic Block Diagram OUTPUT Y H L L B H X L A B 2Y GND NC 3Y 3A Y 1 C opyright © 2005-2007, Potato Semiconductor Corporation PO54G08A, PO74G08A QUADRUPLE 2-INPUT POSITIVE-AND GATES 54, 74 Series GHz Logic 09/12/07 Maximum Ratings Description Storage Temperature Operation Temperature Operation Voltage Input Voltage Output Voltage Max -65 to 150 -55 to 125 -0.5 to +4.6 -0.5 to +5.5 -0.5 to Vcc+0.5 Unit °C °C V V V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. DC Electrical Characteristics Symbol Description Output High voltage Output Low voltage Input High voltage Input Low voltage Input High current Input Low current Clamp diode voltage Test Conditions Vcc=3V Vin=VIH or VIL, IOH= -12mA Vcc=3V Vin=VIH or VIL, IOH=12mA Guaranteed Logic HIGH Level (Input Pin) Guaranteed Logic LOW Level (Input Pin) Vcc = 3.6V and Vin = 5.5V Vcc = 3.6V and Vin = 0V Vcc = Min. And IIN = -18mA Min Typ M ax Unit VOH VOL VIH VIL IIH IIL VIK Notes: 1. 2. 3. 4. 5. 2.4 2 -0.5 - 3 0.3 -0.7 0.5 5.5 0.8 5 -5 -1.2 V V V V uA uA V For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 ° C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 Copyright © 2005-2007, Potato Semiconductor Corporation PO54G08A, PO74G08A QUADRUPLE 2-INPUT POSITIVE-AND GATES 54, 74 Series GHz Logic 09/12/07 Power Supply Characteristics Symbol Description Quiescent Power Supply Current Test Conditions (1) Vcc=Max, Vin=Vcc or GND M in Typ M ax Unit IccQ Notes: 1. 2. 3. 4. - 0.1 40 uA For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25° C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. Capacitance Parameters (1) Description Input Capacitance Output Capacitance Test Conditions Vin = 0V Vout = 0V Typ Unit Cin Cout Notes: 4 6 pF pF 1 This parameter is determined by device characterization but not production tested. Switching Characteristics Symbol Description Propagation Delay A, B to Y Propagation Delay A, B to Y Rise/Fall Time Input Frequency Input Frequency Input Frequency Test Conditions (1) CL = 15pF CL = 15pF 0.8V – 2.0V CL =15pF CL = 5pF CL = 2pF M ax Unit tPLH tPHL tr/tf fmax fmax fmax Notes: 1.5 1.5 0.8 350 750 1125 ns ns ns MHz MHz MHz 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz 3 Copyright © 2005-2006, Potato Semiconductor Corporation PO54G08A, PO74G08A QUADRUPLE 2-INPUT POSITIVE-AND GATES 54, 74 Series GHz Logic 09/12/07 Test Waveforms Propagation Delay 3V 1.5V 0V Input tPLH tPHL VoH Output tR tf 2.0V 1.5V 0.8V VoL Test Circuit Vcc Pulse Generator D.U.T. 50Ω 15pF to 2pF 4 Copyright © 2005-2006, Potato Semiconductor Corporation PO54G08A, PO74G08A QUADRUPLE 2-INPUT POSITIVE-AND GATES 54, 74 Series GHz Logic 09/12/07 Packaging Mechanical Drawing: 14 pin 150mil SOIC 0.244 6.20 0.228 5.80 0.010 0.007 0.25 0.17 0.050 1.27 0.016 0.40 X.XX Denotes dimensions in inches X.XX X.XX Denotes dimensions in millimenters X.XX Packaging Mechanical Drawing: 14pin Leadless Ceramic Chip Carrier X.XX Denotes dimensions in inches X.XX X.XX Denotes dimensions in millimenters X.XX 5 Copyright © 2005-2006, Potato Semiconductor Corporation PO54G08A, PO74G08A QUADRUPLE 2-INPUT POSITIVE-AND GATES 54, 74 Series GHz Logic 09/12/07 Packaging Mechanical Drawing: 20pin Ceramic Dual Flatpack 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.080 (2,03) 0.064 (1,63) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 0.045 (1,14) 0.035 (0,89) 3 2 1 13 12 4 0.358 (9,09) 0.342 (8,69) 5 6 0.358 (9,09) 7 0.307 (7,80) 8 18 17 16 15 14 X.XX Denotes dimensions in inches X.XX X.XX Denotes dimensions in millimenters X.XX 9 10 11 12 13 Ordering Information Ordering Code PO74G08ASU PO74G08ASR PO74G08ASiU PO74G08ASiR PO54G08ALU PO54G08AFU 14pin SOIC 14pin SOIC 14pin SOIC 14pin SOIC 14pin Leadless Ceramic Chip Carrier 20pin Ceramic Dual Flatpack Package Tube Tape and reel Tube Tape and reel Tube Tube Pb-free & Green Pb-free & Green Pb-free & Green Pb-free & Green Pb-free & Green Pb-free & Green Top-Marking PO74G08AS PO74G08AS PO74G08ASi PO74G08ASi PO54G08AL PO54G08AF TA -40°C to 85°C -40°C to 85°C -40°C to 125° C -40°C to 125° C -55°C to 125° C -55°C to 125° C 6 Copyright © 2005-2006, Potato Semiconductor Corporation