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PO74G10A

PO74G10A

  • 厂商:

    POTATO

  • 封装:

  • 描述:

    PO74G10A - TRIPLE 3-INPUT POSITIVE-NAND GATES - Potato Semiconductor Corporation

  • 数据手册
  • 价格&库存
PO74G10A 数据手册
PO74G10A TRIPLE 3-INPUT POSITIVE-NAND GATES 74 Series GHz Logic 02/06/07 FEATURES: . Patented technology . Operating frequency up to 1GHz with 2pf load . Operating frequency up to 800MHz with 5pf load . Operating frequency up to 350MHz with 15pf load . VCC Operates from 1.65V to 3.6V . Propagation delay < 1.7ns max with 15pf load . Low input capacitance: 4pf typical . Available in 14pin 150mil wide SOIC package DESCRIPTION: Potato Semiconductor’s PO74G10A is designed for world top performance using submicron CMOS technology to achieve 1GHz TTL /CMOS output frequency with less than 1.7ns propagation delay. This quadruple 2-input positive-NOR gate is designed for 1.65-V to 3.6-V VCC operation. The PO74G10A performs the Boolean function Y= A · B · C or Y= A + B + C in positive logic. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment. Pin Configuration 1A 1B 2A 2B 2C 2Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 Logic Block Diagram VCC 1C 1Y 3C 3B 3A 3Y 1A 1B 1C 2A 2B 2C 3A 3B 3C 1Y 2Y 3Y Pin Description INPUTS A H L X X B H X L L C H X X X OUTPUT Y L H H H 1 C o p y r i g h t © Potato Semiconductor Corporation PO74G10A TRIPLE 3-INPUT POSITIVE-NAND GATES 74 Series GHz Logic 02/06/07 Maximum Ratings Description Storage Temperature Operation Temperature Operation Voltage Input Voltage Output Voltage Max -65 to 150 -40 to 85 -0.5 to +4.6 -0.5 to +5.5 -0.5 to Vcc+0.5 Unit °C °C V V V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. DC Electrical Characteristics Symbol Description Output High voltage Output Low voltage Input High voltage Input Low voltage Input High current Input Low current Clamp diode voltage Test Conditions Vcc=3V Vin=VIH or VIL, IOH= -12mA Vcc=3V Vin=VIH or VIL, IOH=12mA Guaranteed Logic HIGH Level (Input Pin) Guaranteed Logic LOW Level (Input Pin) Vcc = 3.6V and Vin = 5.5V Vcc = 3.6V and Vin = 0V Vcc = Min. And IIN = -18mA Min Typ M ax Unit VOH VOL VIH VIL IIH IIL VIK Notes: 1. 2. 3. 4. 5. 2.4 2 -0.5 - 3 0.3 -0.7 0.5 5.5 0.8 1 -1 -1.2 V V V V uA uA V For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 ° C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 C o p y r i g h t © Potato Semiconductor Corporation PO74G10A TRIPLE 3-INPUT POSITIVE-NAND GATES 74 Series GHz Logic 02/06/07 Power Supply Characteristics Symbol Description Quiescent Power Supply Current Power Supply Current per Input High Test Conditions (1) Vcc=Max, Vin=Vcc or GND Vcc=Max, Vin= Vcc-0.6V Min Typ M ax Unit IccQ ∆Icc Notes: 1. 2. 3. 4. 5. - 0.1 50 30 300 uA uA For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25° C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current Capacitance Parameters (1) Description Input Capacitance Output Capacitance Test Conditions Vin = 0V Vout = 0V Typ Unit Cin Cout Notes: 4 6 pF pF 1 This parameter is determined by device characterization but not production tested. Switching Characteristics Symbol Description Propagation Delay A, B to Y Propagation Delay A, B to Y Rise/Fall Time Input Frequency Input Frequency Input Frequency Test Conditions (1) CL = 15pF CL = 15pF 0.8V – 2.0V CL =15pF CL = 5pF CL = 2pF M ax Unit tPLH tPHL tr/tf fmax fmax fmax Notes: 1.7 1.7 0.8 350 800 1000 ns ns ns MHz MHz MHz 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz 3 C o p y r i g h t © Potato Semiconductor Corporation PO74G10A TRIPLE 3-INPUT POSITIVE-NAND GATES 74 Series GHz Logic 02/06/07 Test Waveforms Propagation Delay 3V 1.5V Input tPLH tPHL 0V VoH Output 2.0V 1.5V 0.8V VoL tR tf Test Circuit Vcc Pulse Generator D.U.T. 50Ω 15pF to 2pF 4 C o p y r i g h t © Potato Semiconductor Corporation PO74G10A TRIPLE 3-INPUT POSITIVE-NAND GATES 74 Series GHz Logic 02/06/07 Packaging Mechanical Drawing: 14 pin 150mil SOIC 0.244 6.20 0.228 5.80 0.010 0.007 0.25 0.17 0.050 1.27 0.016 0.40 X.XX Denotes dimensions in inches X.XX X.XX Denotes dimensions in millimenters X.XX 5 C o p y r i g h t © 2005-2006, Potato Semiconductor Corporation PO74G10A TRIPLE 3-INPUT POSITIVE-NAND GATES 74 Series GHz Logic 10/27/07 Ordering Information Ordering Code PO74G10ASU PO74G10ASR 14pin SOIC 14pin SOIC Package Tube Tape and reel Pb-free & Green Pb-free & Green Top-Marking PO74G10AS PO74G10AS TA -40°C to 85°C -40°C to 85°C IC Package Information PACKAGE CODE PACKAGE TYPE TAPE WIDTH (mm) TAPE PITCH (mm) PIN 1 LOCATION TAPE TRAILER LENGTH QTY PER REEL TAPE LEADER LENGTH QTY PER TUBE S SOIC 14 16 8 Top Left Corner 39 (12”) 3000 64 (20”) 55 6 C o p y r i g h t © Potato Semiconductor Corporation
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