PO74G2305ASR

PO74G2305A 3.3V 1:5 CMOS Clock Buffered Driver 750MHz TTL/CMOS Potato Chip 10/05/07 FEATURES: . Patented technology . Max input frequency > 1GHz . Operating frequency up to 750MHz with 2pf load . Operating frequency up to 600MHz with 5pf load . Operating frequency up to 300MHz with 15pf load . Operating frequency up to 125MHz with 50pf load . Very low output pin to pin skew < 80ps . Very low pulse skew < 130ps . VCC = 1.65V to 3.6V . Propagation delay < 1.5ns max with 15pf load . Low input capacitance: 3pf typical . 1:5 fanout . Available in 8pin 150mil wide SOIC package DESCRIPTION: Potato Semiconductor’s PO74G2305A is designed for world top performance using submicron CMOS technology to achieve 750MHz TTL output frequency with less than 80ps output pin to pin skew. PO74G2305A is a 3.3V CMOS 1 input to 5 outputs Buffered driver to achieve 750MHz output frequency. Typical applications are clock and signal distribution. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment. Pin Configuration Logic Block Diagram INA O2 O1 G ND 1 2 3 4 8-Pin SOIC O5 7 O4 6 VDD 5 8 O3 Pin Description Pin Name INA O1 to O5 Description Input Outputs 1 C o p y r i g h t © 2005-2006, Potato Semiconductor Corporation PO74G2305A 3.3V 1:5 CMOS Clock Buffered Driver 750MHz TTL/CMOS Potato Chip 10/05/07 Maximum Ratings Description Storage Temperature Operation Temperature Operation Voltage Input Voltage Output Voltage Max -65 to 150 -40 to 85 -0.5 to +4.6 -0.5 to +5.5 -0.5 to Vcc+0.5 Unit °C °C V V V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. DC Electrical Characteristics Symbol Description Output High voltage Output Low voltage Input High voltage Input Low voltage Input High current Input Low current Clamp diode voltage Test Conditions Vcc=3V Vin=VIH or VIL, IOH= -12mA Vcc=3V Vin=VIH or VIL, IOH=12mA Guaranteed Logic HIGH Level (Input Pin) Guaranteed Logic LOW Level (Input Pin) Vcc = 3.6V and Vin = 5.5V Vcc = 3.6V and Vin = 0V Vcc = Min. And IIN = -18mA Min Typ M ax Unit VOH VOL VIH VIL IIH IIL VIK Notes: 1. 2. 3. 4. 5. 2.4 2 -0.5 - 3 0.3 -0.7 0.5 Vcc 0.8 5 -5 -1.2 V V V V uA uA V For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 ° C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 C o p y r i g h t © 2007, Potato Semiconductor Corporation PO74G2305A 3.3V 1:5 CMOS Clock Buffered Driver 750MHz TTL/CMOS Potato Chip 10/05/07 Power Supply Characteristics Symbol Description Quiescent Power Supply Current Power Supply Current per Input High Test Conditions (1) Vcc=Max, Vin=Vcc or GND Vcc=Max, Vin= Vcc-0.6V Min Typ Max Unit IccQ ∆Icc Notes: 1. 2. 3. 4. 5. - 0.1 50 50 300 uA uA For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25° C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current Capacitance Parameters (1) Description Input Capacitance Output Capacitance Test Conditions Vin = 0V Vout = 0V Typ Max Unit Cin Cout Notes: 3 - 4 6 pF pF 1 This parameter is determined by device characterization but not production tested. Switching Characteristics Symbol Description Propagation Delay A to Bn Propagation Delay A to Bn Rise/Fall Time Pulse Skew (Same Package) Output Pin to Pin Skew (Same Package) Output Skew (Different Package) Input Frequency Input Frequency Input Frequency Input Frequency Test Conditions (1) CL = 15pF CL = 15pF 0.8V – 2.0V CL = 15pF, 125MHz CL = 15pF, 125MHz CL = 15pF, 125MHz CL = 50pF CL =15pF CL = 5pF CL = 2pF M ax Unit tPLH tPHL tr/tf tsk(p) tsk(o) tsk(pp) fmax fmax fmax fmax Notes: 1.5 1.5 0.8 80 0.13 0.4 125 300 600 750 ns ns ns ps ns ns MHz MHz MHz MHz 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz 3 C o p y r i g h t © 2007, Potato Semiconductor Corporation PO74G2305A 3.3V 1:5 CMOS Clock Buffered Driver 750MHz TTL/CMOS Potato Chip 10/05/07 Test Waveforms Test Circuit 50Ω 4 C o p y r i g h t © 2007, Potato Semiconductor Corporation PO74G2305A 3.3V 1:5 CMOS Clock Buffered Driver 750MHz TTL/CMOS Potato Chip 10/05/07 Packaging Mechanical Drawing: 8 pin SOIC 8 .0099 .0196 0.25 x 45˚ 0.50 0-8˚ .149 .157 3.78 3.99 .016 .050 0.40 1.27 .2284 .2440 5.80 6.20 1 .189 .196 .016 .026 0.406 0.660 REF .050 BSC 1.27 .013 0.330 .020 0.508 .0040 0.10 .0098 0.25 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 4.80 5.00 .053 .068 1.35 1.75 SEATING PLANE .0075 .0098 0.19 0.25 Ordering Information Ordering Code PO74G2305ASU PO74G2305ASR 8-pin SOIC 8-pin SOIC Package Tube Tape and reel Pb-free & Green Pb-free & Green Top-Marking PO74G2305AS PO74G2305AS TA -40°C to 85°C -40°C to 85°C 5 C o p y r i g h t © 2007, Potato Semiconductor Corporation