QM48T/S14120 DC-DC Converter Data Sheet
36-75 VDC Input; 12 VDC @ 14 A Output
Features
LI
FE
RoHS lead-free solder and lead-solder-exempted
products are available
Delivers up to 14 A (168 W)
Industry-standard quarter-brick pinout
Available: through-hole and surface-mount packages
Weight: 1.1 oz [31.5 g] typical
On-board input differential LC-filter
Start-up into pre-biased load
No minimum load required
Meets Basic Insulation requirements of IEC60950
Withstands 100 V input transient for 100 ms
Fixed-frequency operation
Fully protected
Remote output sense
Fully protected with automatic recovery
Paralleling option available
Positive or negative logic ON/OFF option
Output voltage trim range: +10%/−20% with
industry-standard trim equations
High reliability: MTBF approx. 2.6 million hours,
calculated per Telcordia TR-332, Method I Case 1
Safety approved to UL60950-1, CSA60950-1,
EN60950-1 and IEC60950-1.
Designed to meet Class B conducted emissions per
FCC and EN55022 when used with external filter
All materials meet UL94, V-0 flammability rating
Telecommunications
Data communications
Wireless communications
Servers, workstations
O
F
Applications
Benefits
D
High efficiency – no heat sink required
Higher current capability at 70 °C than many
competitors’ 12 V half-bricks
Description
EN
The QM48T/S14120 converter of the QM-Series provides outstanding thermal performance in high temperature
environments. This performance is accomplished through the use of patented/patent-pending circuits, packaging,
and processing techniques to achieve ultra-high efficiency, excellent thermal management, and a low-body profile.
The low-body profile and the preclusion of heat sinks minimize impedance to system airflow, thus enhancing
cooling for both upstream and downstream devices. The use of 100% automation for assembly, coupled with
advanced electronic circuits, and thermal design results in a product with extremely high reliability.
Operating from a 36-75 V input, the QM-Series converters provide outputs that can be trimmed from –20% to
+10% of the nominal output voltage, thus providing outstanding design flexibility.
The paralleling version of the QM48T/S14120-wxyP converter has the paralleling capability for use in applications
requiring higher power levels than available with a single converter.
ZD-00376 Rev. 1.1.1, 19-Feb-10
Page 1 of 20
www.power-one.com
QM48T/S14120 DC-DC Converter Data Sheet
36-75 VDC Input; 12 VDC @ 14 A Output
Electrical Specifications (Common for both Non-paralleling and Paralleling Options)
Conditions: TA = 25 ºC, Airflow = 300 LFM (1.5 m/s), Vi n = 48 VDC, unless otherwise specified.
Parameter
Notes
Min
Typ
Max
Units
80
VDC
Absolute Maximum Ratings
Input Voltage
Continuous
0
-40
85
°C
Storage Temperature
-55
125
°C
FE
Operating Ambient Temperature
Isolation Characteristics
I/O Isolation
2000
Isolation Capacitance
1.2
Isolation Resistance
10
Feature Characteristics
300
LI
Switching Frequency
Output Voltage Trim Range1
Industry-standard equations
1
Remote Sense Compensation
Percent of VOUT(NOM)
Output Overvoltage Protection
Non-latching
-20
115
+10
128
VDC
ηF
MΩ
kHz
%
+10
%
135
%
Non-latching
125
°C
Auto-Restart Period
Applies to all protection features
100
ms
4
ms
Turn-On Time
ON/OFF Control (Positive Logic)
Converter Off (logic low)
O
Converter On (logic high)
F
Overtemperature Shutdown (PCB)
-20
0.8
VDC
2.4
20
VDC
ON/OFF Control (Negative Logic)
Converter Off (logic high)
2.4
20
VDC
Converter On (logic low)
-20
0.8
VDC
Input Characteristics
36
48
75
VDC
Turn-on Threshold
33
34
35
VDC
Turn-off Threshold
31
32
33
VDC
D
Operating Input Voltage Range
Input Under Voltage Lockout
Non-latching
100 ms
Input Stand-by Current
Vin = 48 V, converter disabled
3
Input No Load Current (0 load on the output)
Vin = 48 V, converter enabled
65
mADC
Input Reflected-Ripple Current
25 MHz bandwidth
20
mAPK-PK
EN
Input Voltage Transient
100
VDC
mADC
Additional Notes:
1
Vout can be increased up to 10% via the sense leads or up to 10% via the trim function (Vin > 40 V). However, the total output voltage trim
from all sources should not exceed 10% of VOUT(NOM), in order to ensure specified operation of overvoltage protection circuitry.
ZD-00376 Rev. 1.1.1, 19-Feb-10
Page 2 of 20
www.power-one.com
QM48T/S14120 DC-DC Converter Data Sheet
36-75 VDC Input; 12 VDC @ 14 A Output
Electrical Specifications for Single Converter with Non-Paralleling Option
Conditions: TA = 25 ºC, Airflow = 300 LFM (1.5 m/s), Vin = 48 VDC, unless otherwise specified.
Parameter
Notes
Maximum Input Current
Min
Typ
Max
Units
5.15
ADC
12.00
12.12
VDC
±4
±10
mV
14 ADC @ 36 VDC In
Output Voltage Set Point (no load)
11.88
Output Regulation Over Line
Output Regulation Over Load
±4
Over line, load and temperature2
11.8
Over line, load and temperature3
11.0
Output Ripple and Noise – 25 MHz bandwidth Full load + 10 µF tantalum + 1 µF ceramic
External Load Capacitance
Plus full load (resistive)
Output Current Range
100
0
Current Limit Inception
Non-latching
15.0
Non-latching, Short = 10 mΩ
RMS Short-Circuit Current
Non-latching
Dynamic Response
Settling Time to 1%
Efficiency
Co = 100 µF POS + 1 µF ceramic
F
100% Load
50% Load
16.0
19
LI
Peak Short-Circuit Current
Load Change 50%-75%-50%, di/dt = 0.1 A/µs
±10
mV
12.2
VDC
12.2
VDC
140
mVPK-PK
2,200
µF
14
ADC
17.0
ADC
FE
Output Voltage Range
22
A
3.5
Arms
240
mV
50
µs
92
%
94
%
Electrical specifications for Single Converter with Paralleling Option
O
Conditions: TA = 25 ºC, Airflow = 300 LFM (1.5 m/s), Vin = 48 VDC, unless otherwise specified.
Parameter
Maximum Input Current
Notes
Min
12.15
Output Regulation Over Line
D
Output Regulation Over Load
EN
4.75
ADC
12.27
12.44
VDC
±4
±10
mV
0.5
0.6
V
Over line, load and temperature
11.5
12.5
VDC
Over line, load and temperature3
11.0
12.5
VDC
100
Plus full load (resistive)
Output Current Range
Current Limit Inception
Units
2
Output Ripple and Noise – 25 MHz bandwidth Full load + 10 µF tantalum + 1 µF ceramic
External Load Capacitance
Max
14 ADC @ 36 VDC In
Output Voltage Set Point (no load)
Output Voltage Range
Typ
0
Non-latching
Peak Short-Circuit Current
Non-latching, Short = 10 mΩ
RMS Short-Circuit Current
Non-latching
15.0
16.0
19
140
mVPK-PK
2,200
µF
14
ADC
17.0
ADC
22
A
3.5
Arms
Dynamic Response
Load Change 50%-75%-50%, di/dt = 0.1 A/µs
Co = 100 µF POS + 1 µF ceramic
240
mV
50
µs
100% Load
92
%
50% Load
94
%
Settling Time to 1%
Efficiency
Additional Notes:
2
3
For Vin ≥ 40 V, IO = 14 A, -40 °C ≤ Tamb ≤ 85 °C.
For Vin ≥ 36 V, IO = 14 A, -40 °C ≤ Tamb ≤ 85 °C.
ZD-00376 Rev. 1.1.1, 19-Feb-10
Page 3 of 20
www.power-one.com
QM48T/S14120 DC-DC Converter Data Sheet
36-75 VDC Input; 12 VDC @ 14 A Output
Vin(-) to enable automatic power up of the converter
without the need of an external control signal.
Input and Output Impedance
These power converters have been designed to be
stable with no external capacitors when used in low
inductance input and output circuits.
In many applications, the inductance associated with
the distribution from the power source to the input of
the converter can affect the stability of the converter.
The addition of a 33 µF electrolytic capacitor with an
ESR < 1 Ω across the input helps to ensure stability
of the converter. In many applications, the user has
to use decoupling capacitance at the load. The
power converter will exhibit stable operation with
external load capacitance up to 2,200 µF on 12 V
output.
Remote Sense (Pins 5 and 7)
The remote sense feature of the converter
compensates for voltage drops occurring between
the output pins of the converter and the load. The
SENSE(-) (Pin 5) and SENSE(+) (Pin 7) pins should
be connected at the load or at the point where
regulation is required (see Fig. B).
LI
Additionally, see the EMC section of this data sheet
for discussion of other external components which
may be required for control of conducted emissions.
The ON/OFF pin is internally pulled up to 5 V
through a resistor. A properly debounced mechanical
switch, open-collector transistor, or FET can be used
to drive the input of the ON/OFF pin. The device
must be capable of sinking up to 0.2 mA at a low
level voltage of 0.8 V. An external voltage source
(±20 V maximum) may be connected directly to the
ON/OFF input, in which case it must be capable of
sourcing or sinking up to 1 mA depending on the
signal polarity. See the Startup Information section
for system timing waveforms associated with use of
the ON/OFF pin.
FE
Operations
Paralleling Option
F
The QM48T/S14120-wxyP is a droop parallelable
version and is designed with a 600 mV output
voltage droop that is proportional to output current.
For any input voltage > 40 V, the converter will have
an open current output voltage of 12.3 V @ Io = 0,
and the nominal output voltage of 11.7 V @ Io =
14 A. The nominal output at 50% load will be 12 V.
O
ON/OFF (Pin 2)
D
The ON/OFF pin is used to turn the power converter
on or off remotely via a system signal. There are two
remote control options available, positive and
negative logic, with both referenced to Vin(-). A
typical connection is shown in Fig. A.
QmaX
TM
Series
Converter
EN
Vin (+)
(Top View)
ON/OFF
Vin
Vin
Vin (-)
Vout (+)
SENSE (+)
TRIM
Vin (+)
QmaX
TM
Series
Converter
(Top View)
ON/OFF
Vout (+)
Rw
100
SENSE (+)
TRIM
Rload
SENSE (-)
10
Vin (-)
Vout (-)
Rw
Fig. B: Remote sense circuit configuration.
CAUTION
If remote sensing is not utilized, the SENSE(-) pin must be
connected to the Vout(-) pin (Pin 4), and the SENSE(+) pin
must be connected to the Vout(+) pin (Pin 8) to ensure the
converter will regulate at the specified output voltage. If these
connections are not made, the converter will deliver an
output voltage that is slightly higher than the specified data
sheet value.
Rload
Because the sense leads carry minimal current,
large traces on the end-user board are not required.
However, sense traces should be run side by side
and located close to a ground plane to minimize
system noise and ensure optimum performance.
SENSE (-)
Vout (-)
CONTROL
INPUT
Fig. A: Circuit configuration for ON/OFF function.
The positive logic version turns on when the ON/OFF
pin is at a logic high and turns off when at a logic
low. The converter is on when the ON/OFF pin is left
open. See the Electrical Specifications for logic
high/low definitions.
The converter’s output overvoltage protection (OVP)
senses the voltage across Vout(+) and Vout(-), and
not across the sense lines, so the resistance (and
resulting voltage drop) between the output pins of
the converter and the load should be minimized to
prevent unwanted triggering of the OVP.
The negative logic version turns on when the pin is
at a logic low and turns off when the pin is at a logic
high. The ON/OFF pin can be hardwired directly to
When utilizing the remote sense feature, care must
be taken not to exceed the maximum allowable
output power capability of the converter, which is
ZD-00376 Rev. 1.1.1, 19-Feb-10
Page 4 of 20
www.power-one.com
QM48T/S14120 DC-DC Converter Data Sheet
36-75 VDC Input; 12 VDC @ 14 A Output
When using remote sense, the output voltage at the
converter can be increased by as much as 10%
above the nominal rating in order to maintain the
required voltage across the load. Therefore, the
designer must, if necessary, decrease the maximum
current (originally obtained from the derating curves)
by the same percentage to ensure the converter’s
actual output power remains at or below the
maximum allowable output power.
See the previous section for a complete discussion
of this requirement.
To decrease the output voltage (Fig. D), a trim
resistor, RT-DECR, should be connected between the
TRIM (Pin 6) and SENSE(-) (Pin 5), with a value of:
511
10.22
|Δ|
for non-paralleling option
RTDECR
[kΩ],
FE
equal to the product of the nominal output voltage
and the allowable output current for the given
conditions.
RT-DECR = (511-5.6)/(*NP)
for paralleling option
[kΩ],
where,
Output Voltage Adjust /TRIM (Pin 6)
RTDECR Required value of trim-down resistor [kΩ]
and Δ is defined above.
Note:
LI
The output voltage can be adjusted up 10% (VIN >
40 V) or down 20% relative to the rated output
voltage by the addition of an externally connected
resistor.
The TRIM pin should be left open if trimming is not
being used. To minimize noise pickup, a 0.1 µF
capacitor is connected internally between the TRIM
and SENSE(-) pins.
The above equations for calculation of trim resistor values match
those typically used in conventional industry-standard quarterbricks.
To increase the output voltage, refer to Fig. C. A trim
resistor, RT-INCR, should be connected between the
TRIM (Pin 6) and SENSE(+) (Pin 7), with a value of:
F
Vin (+)
Vin
5.11(100 Δ)VONOM 626
10.22
1.225Δ
for non-paralleling option
RT-INCR = 45(100+)/(*NP)
for paralleling option
SENSE (+)
TRIM
SENSE (-)
Vin (-)
Rload
R T-DECR
Vout (-)
TRIM/SENSE Function Notes:
2. Trimming/sensing beyond 110% of the rated output voltage is
not an acceptable design practice, as this condition could cause
unwanted triggering of the output overvoltage protection (OVP)
circuit. The designer should ensure that the difference between
the voltages across the converter’s output pins and its sense pins
does not exceed 10% of VOUT(NOM), or:
EN
(VO-REQ VO-NOM)
X 100
VO -NOM
[%]
[VOUT() VOUT()] [VSENSE() VSENSE()] VO - NOM X 10% [V]
VOREQ Desired (trimmed) output voltage [V].
Vin (+)
QmaX
TM
Series
Converter
(Top View)
Vin
(Top View)
ON/OFF
Vout (+)
1. Trim/Sense Functions have limited capability for Vin < 40 V.
RTINCR Required value of trim-up resistor [kΩ]
VONOM Nominal value of output voltage [V]
Δ
TM
Series
Converter
Fig. D: Configuration for decreasing output voltage.
[kΩ],
D
where,
[kΩ],
O
RTINCR
QmaX
ON/OFF
This equation is applicable for any condition of output sensing
and/or output trim.
Vout (+)
SENSE (+)
R T-INCR
TRIM
Rload
SENSE (-)
Vin (-)
Vout (-)
Fig. C: Configuration for increasing output voltage.
When trimming up, care must be taken not to exceed
the converter‘s maximum allowable output power.
ZD-00376 Rev. 1.1.1, 19-Feb-10
Page 5 of 20
www.power-one.com
QM48T/S14120 DC-DC Converter Data Sheet
36-75 VDC Input; 12 VDC @ 14 A Output
Protection Features
Safety Requirements
Input undervoltage lockout is standard with this
converter. The converter will shut down when the
input voltage drops below a pre-determined voltage.
The converters meet North American and
International safety regulatory requirements per
UL60950-1,
CSA60590-1,
EN60950-1,
and
IEC60950-1. Basic Insulation is provided between
input and output.
To comply with safety agencies’ requirements, an
input line fuse must be used external to the
converter. A 12 A fuse is recommended for use with
this product.
The input voltage must be typically 34 V for the
converter to turn on. Once the converter has been
turned on, it will shut off when the input voltage
drops typically below 32 V. This feature is beneficial
in preventing deep discharging of batteries used in
telecom applications.
Output Overcurrent Protection (OCP)
All QM converters are UL approved for a maximum
fuse rating of 15 Amps. To protect a group of
converters with a single fuse, the rating can be
increased from the recommended value above.
LI
The converter is protected against overcurrent or
short circuit conditions. Upon sensing an overcurrent
condition, the converter will switch to constant
current operation and thereby begin to reduce output
voltage. When the output voltage drops below 60%
of the nominal value of output voltage, the converter
will shut down.
FE
Input Undervoltage Lockout
EMC requirements must be met at the end-product
system level, as no specific standards dedicated to
EMC characteristics of board mounted component
dc-dc converters exist. However, Power-One tests its
converters to several system level standards,
primary of which is the more stringent EN55022,
Information
technology
equipment
Radio
disturbance characteristics-Limits and methods of
measurement.
O
F
Once the converter has shut down, it will attempt to
restart nominally every 100 ms with a typical 3% duty
cycle. The attempted restart will continue indefinitely
until the overload or short-circuit conditions are
removed or the output voltage rises above 60% of its
nominal value.
Electromagnetic Compatibility (EMC)
Once the output current is brought back into its
specified range, the converter automatically exits the
hiccup mode and continues normal operation.
D
Output Overvoltage Protection (OVP)
EN
The converter will shut down if the output voltage
across Vout(+) (Pin 8) and Vout(-) (Pin 4) exceeds
the threshold of the OVP circuitry. The OVP circuitry
contains its own reference, independent of the output
voltage regulation loop. Once the converter has shut
down, it will attempt to restart every 100 ms until the
OVP condition is removed.
An effective internal LC differential filter significantly
reduces input reflected ripple current, and improves
EMC.
With the addition of a simple external filter, all
versions of the QM-Series of converters pass the
requirements of Class B conducted emissions per
EN55022 and FCC requirements. Please contact
Power-One Applications Engineering for details of
this testing.
Overtemperature Protection (OTP)
The converter will shut down under an
overtemperature condition to protect itself from
overheating caused by operation outside the thermal
derating curves, or operation in abnormal conditions
such as system fan failure. After the converter has
cooled to a safe operating temperature, it will
automatically restart.
ZD-00376 Rev. 1.1.1, 19-Feb-10
Page 6 of 20
www.power-one.com
QM48T/S14120 DC-DC Converter Data Sheet
36-75 VDC Input; 12 VDC @ 14 A Output
V IN
Startup Information (using negative ON/OFF)
OFF
ON
V OUT
t0
t1 t2
t3
t
Fig. E: Startup scenario #1.
VIN
LI
Scenario #2: Initial Startup Using ON/OFF Pin
With VIN previously powered, converter started via
ON/OFF pin. See Figure F.
Time
Comments
t0
VINPUT at nominal value.
t1
Arbitrary time when ON/OFF pin is enabled
(converter enabled).
t2
End of converter turn-on delay.
t3
Converter VOUT reaches 100% of nominal value.
For this example, the total converter startup time (t3- t1) is
typically 4 ms.
ON/OFF
STATE
FE
Scenario #1: Initial Startup From Bulk Supply
ON/OFF function enabled, converter started via application
of VIN. See Figure E.
Time
Comments
t0
ON/OFF pin is ON; system front end power is
toggled on, VIN to converter begins to rise.
t1
VIN crosses undervoltage Lockout protection
circuit threshold; converter enabled.
t2
Converter begins to respond to turn-on
command (converter turn-on delay).
t3
Converter VOUT reaches 100% of nominal value.
For this example, the total converter startup time (t3- t1) is
typically 4 ms.
F
ON/OFF
STATE OFF
ON
O
VOUT
t0
EN
t1 t 2
t
t3
Fig. F: Startup scenario #2.
D
Scenario #3: Turn-off and Restart Using ON/OFF Pin
With VIN previously powered, converter is disabled and
then enabled via ON/OFF pin. See Figure G.
Time
Comments
t0
VIN and VOUT are at nominal values; ON/OFF pin
ON.
t1
ON/OFF pin arbitrarily disabled; converter
output falls to zero; turn-on inhibit delay period
(200 ms typical) is initiated, and ON/OFF pin
action is internally inhibited.
t2
ON/OFF pin is externally re-enabled.
If (t2- t1) ≤ 100 ms, external action of
ON/OFF pin is locked out by startup inhibit
timer.
If (t2- t1) > 100 ms, ON/OFF pin action is
internally enabled.
t3
Turn-on inhibit delay period ends. If ON/OFF pin
is ON, converter begins turn-on; if off, converter
awaits ON/OFF pin ON signal; see Figure F.
t4
End of converter turn-on delay.
t5
Converter VOUT reaches 100% of nominal value.
For the condition, (t2- t1) ≤ 100 ms, the total converter
startup time (t5- t2) is typically 104 ms. For (t2- t1) > 100 ms,
startup will be typically 4 ms after release of ON/OFF pin.
VIN
100 ms
ON/OFF
STATE OFF
ON
VOUT
t0
t1
t2
t3 t4
t5
Fig. G: Startup scenario #3.
ZD-00376 Rev. 1.1.1, 19-Feb-10
Page 7 of 20
www.power-one.com
t
QM48T/S14120 DC-DC Converter Data Sheet
36-75 VDC Input; 12 VDC @ 14 A Output
Thermal Derating
General Information
The converter has been characterized for many
operational aspects, to include thermal derating
(maximum load current as a function of ambient
temperature and airflow) for vertical and horizontal
mountings, efficiency, startup and shutdown
parameters, output ripple and noise, transient
response to load step-change, overload, and short
circuit.
The following pages contain specific plots or
waveforms associated with the converter. Additional
comments for specific data are provided below.
Test Conditions
LI
All data presented were taken with the converter
soldered to a test board, specifically a 0.060” thick
printed wiring board (PWB) with four layers. The top
and bottom layers were not metalized. The two inner
layers, comprised of two-ounce copper, were used to
provide traces for connectivity to the converter.
Load current vs. ambient temperature and airflow
rates are given in Fig. 1 and Fig. 2 for vertical and
horizontal converter mountings for through-hole
version. Ambient temperature was varied between
25 °C and 85 °C, with airflow rates from 30 to
500 LFM (0.15 to 2.5 m/s).
For each set of conditions, the maximum load current
was defined as the lowest of:
(i) The output current at which any FET junction
temperature does not exceed a maximum specified
temperature of 120 °C as indicated by the
thermographic image, or
(ii) The nominal rating of the converter (14 A).
During normal operation, derating curves with
maximum FET temperature less or equal to 120 °C
should not be exceeded. Temperature on the PCB at
the thermocouple location shown in Fig. H should not
exceed 118 °C in order to operate inside the derating
curves.
FE
Characterization
Fig. 3 shows the efficiency vs. load current plot for
ambient temperature of 25 ºC, airflow rate of 300 LFM
(1.5 m/s) with vertical mounting and input voltages of
36 V, 48 V and 72 V. Also, a plot of efficiency vs. load
current, as a function of ambient temperature with
Vin = 48 V, airflow rate of 200 LFM (1 m/s) with
vertical mounting is shown in Fig. 4.
O
F
The lack of metalization on the outer layers as well
as the limited thermal connection ensured that heat
transfer from the converter to the PWB was
minimized. This provides a worst-case but consistent
scenario for thermal derating purposes.
Efficiency
All measurements requiring airflow were made in the
vertical and horizontal wind tunnel using Infrared (IR)
thermography and thermocouples for thermometry.
EN
D
Ensuring components on the converter do not
exceed their ratings is important to maintaining high
reliability. If one anticipates operating the converter
at or close to the maximum loads specified in the
derating curves, it is prudent to check actual
operating
temperatures
in
the
application.
Thermographic imaging is preferable; if this
capability is not available, then thermocouples may
be used. The use of AWG #40 gauge thermocouples
is recommended to ensure measurement accuracy.
Careful routing of the thermocouple leads will further
minimize measurement error. Refer to Fig. H for the
optimum measuring thermocouple locations.
Startup
Output voltage waveforms, during the turn-on
transient using the ON/OFF pin for full rated load
currents (resistive load) are shown without and with
external load capacitance in Figs. 7-8, respectively.
Ripple and Noise
The output voltage ripple waveform, measured at full
rated load current with a 10 µF tantalum and 1 µF
ceramic capacitor across the output. Note that all
output voltage waveforms are measured across a 1
µF ceramic capacitor.
The input reflected ripple current waveforms are
obtained using the test setup shown in Fig I. The
corresponding waveforms are shown in plot section.
iS
10 H
source
inductance
Vsource
Fig. H: Locations of the thermocouple for thermal testing.
ZD-00376 Rev. 1.1.1, 19-Feb-10
Page 8 of 20
iC
33 F
ESR