The SLDN-12D1A series power modules are non-isolated dc-dc
converters that can deliver up to 12 A of output current. These
modules operate over a wide range of input voltage (3 - 14.4 VDC)
and provide a precisely regulated output voltage from 0.45 to 5.5 VDC,
programmable via an external resistor and power management bus
control.
Features include a digital interface using the power management bus
protocol, remote On/Off, adjustable output voltage, over current and
over temperature protection. The power management bus interface
supports a range of commands to both control and monitor the
module.
The modules also include the Tunable LoopTM feature that allows the
user to optimize the dynamic response of the converter to match the
load with reduced amount of output capacitance leading to savings on
cost and PWB area.
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
3 - 14.4 VDC Input
0.45 - 5.5 VDC @ 12 A Output
Wide Input Voltage Range
Fixed Switching Frequency
Power Good Signal
Remote On/Off
Digital interface through the Power Management Bus Protocol
Ability to Sink and Source Current
Cost Efficient Open Frame Design
Over Temperature Protection
Tunable LoopTM (a Registered Trademark of Lineage Power Systems) to
Optimize Dynamic Output Voltage Response
Flexible Output Voltage Sequencing EZ-SEQUENCE
Output Over Current Protection (non-latching)
Wide Operating Temperature Range [-40°C to 85°C]
Class II, Category 2, Non-Isolated DC/DC Converter (refer to IPC-9592A)
Compliant to RoHS EU Directive 2002/95/EC
Compatible in a Pb-free or SnPb Reflow Environment
Certificated to UL60950-1/CSA C22.2 No.60950-1, 2nd
•
•
•
•
•
•
Distributed Power Architectures
Intermediate Bus Voltage Applications
Telecommunications Equipment
Servers and Storage Applications
Networking Equipment
Industrial Equipment
SLDN-12D1A
2
MODEL
NUMBER
SLDN-12D1A0G
SLDN-12D1A0R
SLDN-12D1ALG
OUTPUT
VOLTAGE
INPUT
VOLTAGE
MAX. OUTPUT
CURRENT
0.45 - 5.5 VDC
3 - 14.4 VDC
12 A
MAX. OUTPUT
POWER
TYPICAL EFFICIENCY
60 W
95.4%
SLDN-12D1ALR
S
LDN
12
D
1A
x
y
Mounting Type
Series
Code
-
Output
Current
Input Voltage
Range
Sequencing
or not
Active Logic
Package Type
Surface Mount
SLDN
Series
12 A
3 - 14.4 V
With
Sequencing
PARAMETER
DESCRIPTION
L – Active Low
G – Tray Package
0 – Active High
R – Tape and Reel
Package
MIN
TYP
MAX
UNITS
-0.3
-
15
V
Voltage on SEQ SYNC VS+
-
-
7
V
Voltage on CLK DATA SMBALERT
Terminal
-
-
3.6
V
-40
-
85
C
-55
-
125
C
-
-
2000
m
Continuous non-operating Input Voltage
Ambient Temperature
Storage Temperature
Altitude
See Thermal Considerations section
NOTE: Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress
ratings only, functional operation of the device is not implied at these or any other conditions in excess of those given in the operations
sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect the device reliability.
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SLDN-12D1A
3
All specifications are typical at 25°C unless otherwise stated.
PARAMETER
DESCRIPTION
MIN
TYP
MAX
UNIT
3
-
14.4
V
-
-
9
A
-
52
-
mA
-
85
-
mA
-
6.5
-
mA
-
400
-
mA
I2t Inrush Current Transient
-
-
1
A2s
Input Ripple Rejection (120 Hz)
-
-55
-
dB
Operating Input Voltage
Input Current (full load)
Input Current
(no load)
VIN = 3 to 14.4 V
Vo = 0.6 V
VIN = 12 VDC, Io = 0, module enabled
Vo = 5 V
Input Stand-by Current
VIN = 12 VDC, module disabled
1.
Input Reflected Ripple Current (pk-pk)
2.
5 Hz to 20 MHz, 1 µH source impedance;
VIN = 0 to 14 V, Io = Io max
See Test Configurations
CAUTION: This converter is not internally fused. An input line fuse must be used in application.
This power module can be used in a wide variety of applications, ranging from simple standalone operation to an integrated part of sophisticated
power architecture. To preserve maximum flexibility, internal fusing is not included; however, to achieve maximum safety and system protection,
always use an input line fuse. The safety agencies require a fast-acting fuse with a maximum rating of 6A. Based on the information provided in
this data sheet on inrush energy and maximum dc input current, the same type of fuse with a lower rating can be used. Refer to the fuse
manufacturer’s data sheet for further information.
Note: Unless otherwise indicated, specifications apply over entire operating input voltage range, resistive load, and temperature conditions.
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SLDN-12D1A
4
All specifications are typical at nominal input, full load at 25°C unless otherwise stated.
PARAMETER
DESCRIPTION
with 0.1% tolerance for external resistor used to set
output voltage
Over entire operating input voltage range, resistive
load, and temperature conditions until end of life
Output Voltage Set Point
Output Voltage
Power Management Bus Adjustable Output
Voltage Range
Power Management Bus Output Voltage
Adjustment Step Size
Some output voltages may not be possible
depending on the input voltage – see Feature
Descriptions section
Adjustment Range
Remote Sense Range
VO ≥ 2.5V
Load Regulation
MIN
TYP
MAX
UNIT
-1.0
-
1.0
%Vo,set
-0.3
-
0.3
%Vo,set
-25
0
25
%Vo,set
-
0.4
-
%Vo,set
0.6
-
5.5
V
-
-
0.5
V
-
-
10
mV
-
-
10
mV
-
-
0.4
%Vo,set
-
-
5
mV
IO = IO, min to IO, max
VO < 2.5V
VO ≥ 2.5V
Line Regulation
VIN = VIN, min to VIN, max
VO < 2.5V
Tref = TA, min to TA, max
-
-
0.4
%Vo,set
50
100
mV
Ripple and Noise (RMS)
5 Hz to 20 MHz BW, VIN = VIN, nor and IO = IO, min to
IO, max, Co = 0.1 µF // 22 µF ceramic capacitors
-
20
38
mV
Output Current Range
in either sink or source mode
0
-
12
A
Output Current Limit Inception
Current limit does not operate in sink mode
-
130
-
%Io,max
Output Short-Circuit Current
Vo ≤ 250 mV, Hiccup Mode
-
0.92
-
A
Temperature Regulation
Ripple and Noise (Pk-Pk)
ESR ≥ 1 mΩ
Output Capacitance
22
-
47
uF
ESR ≥ 0.15 mΩ
With the Tunable Loop
TM
22
-
1000
µF
ESR ≥ 10 mΩ
With the Tunable LoopTM
22
-
5000
µF
-
1.1
-
ms
-
700
-
µs
-
3.1
-
ms
Turn-On Delay Times
(VIN = VIN, nor, IO = IO, max , VO to within ±1% of
steady state)
Output Voltage Rise Time
TM
Without the Tunable Loop
Case 1: On/Off input is enabled and then input power
is applied (delay from instant at which VIN = VIN, min
until Vo = 10% of Vo, set)
Case 2: Input power is applied for at least one second
and then the On/Off input is enabled (delay from
instant at which Von/Off is enabled until Vo = 10% of
Vo, set)
time for Vo to rise from 10% of Vo, set to 90% of
Vo, set
Notes:
1. Some output voltages may not be possible depending on the input voltage.
2. External capacitors may require using the new Tunable LoopTM feature to ensure that the module is stable as well as getting the best
transient response (See the Tunable LoopTM section for details).
3. Unless otherwise indicated, specifications apply over entire operating input voltage range, resistive load, and temperature conditions.
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SLDN-12D1A
PARAMETER
5
DESCRIPTION
Vo = 0.6 V
Vo = 1.2 V
Efficiency
Vo = 1.8 V
Vo = 2.5 V
Vin = 12 VDC, Ta = 25°C
Io = Io, max, Vo = Vo,set
MIN
TYP
MAX
UNIT
-
76.4
86.0
-
%
%
-
89.9
-
%
92.2
-
%
%
-
Vo = 3.3 V
-
93.6
-
Vo = 5.0 V
-
95.4
-
%
Switching Frequency
-
600
-
kHz
Synchronization Frequency Range
510
-
720
kHz
High-Level Input Voltage
2.0
-
-
V
Low-Level Input Voltage
-
-
0.4
V
Input Current, SYNC
-
-
100
nA
Minimum Pulse Width, SYNC
100
-
-
ns
Maximum SYNC Rise Time
100
-
-
ns
-
150
-
°C
-
130
-
°C
2.5
-
14
V
-
-
500
mV
-
2.79
-
V
-
2.58
-
V
-
0.2
-
V
-
-
100
mV
-
-
100
mV
-
108
-
%Vo,set
-
110
-
%Vo,set
-
92
-
%Vo,set
-
90
-
%Vo,set
-
-
50
Ω
-
-
5
mA
-
2.23
-
g
Over Temperature Protection
Power Management Bus Over Temperature
Warning Threshold
Power Management Bus Adjustable Input
Under Voltage Lockout Thresholds
Resolution of Adjustable Input Under Voltage
Threshold
Turn-on Threshold
Input UnderTurn-off Threshold
voltage Lockout
Hysteresis
Tracking Accuracy
PGOOD (Power
Good)
Power-Up: 2 V/ms
Power-Down: 2 V/ms
Overvoltage threshold
for PGOOD ON
Overvoltage threshold
for PGOOD OFF
Undervoltage threshold
for PGOOD ON
Undervoltage threshold
for PGOOD OFF
Pulldown resistance of
PGOOD pin
Sink current capability
into PGOOD pin
Vin, min to Vin, max; Io, min to
Io, max, Vseq < Vo
Signal Interface Open Drain,
Vsupply 5 VDC
Weight
MTBF
Calculated MTBF (Io = 0.8 Io, max,
TA = 40°C) Telecordia Issue 2
Method 1 Case 3
Dimensions (L × W × H)
21,774,843
hours
0.48 x 0.48 x 0.335
inch
12.19 x 12.19 x 8.5
mm
Note: Unless otherwise indicated, specifications apply over entire operating input voltage range, resistive load, and temperature
conditions.
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SLDN-12D1A
6
PARAMETER
DESCRIPTION
MIN
TYP
MAX
UNIT
Input High Voltage (CLK, DATA)
2.1
-
3.6
V
Input Low Voltage (CLK, DATA)
-
-
0.8
V
Input High Level Current (CLK, DATA)
-10
-
10
µA
Input Low Level Current (CLK, DATA)
-10
-
10
µA
Iout = 2 mA
-
-
0.4
V
Vout = 3.6 V
0
-
10
µA
-
0.7
-
pF
Power Management Bus Operating
Frequency Range
10
-
400
kHz
Data Setup Time
250
-
-
ns
Receive Mode
0
-
-
ns
Transmit Mode
300
-
-
ns
153
192
231
µs
0
-
18
A
62.5
-
-
mA
-
-
±5
%
Output Current Measurement Offset
-
-
0.1
A
VOUT Measurement Range
0
-
5.5
V
Power Management Bus Signal Interface Characteristics
Output Low Voltage
(CLK, DATA, SMBALERT#)
Output High Level Open Drain Leakage
Current (DATA, SMBALERT#)
Pin Capacitance
Data Hold Time
Measurement System Characteristics
Read Delay Time
Output Current Measurement Range
Output Current Measurement Resolution
Output Current Measurement Gain
Accuracy
VOUT Measurement Resolution
-
15.625
-
mA
VOUT Measurement Gain Accuracy
-15
-
15
%
VOUT Measurement Offset
-3
-
3
%
VIN Measurement Range
3
-
14.4
V
VIN Measurement Resolution
-
32.5
-
mV
VIN Measurement Gain Accuracy
-15
-
15
%
VIN Measurement Offset
-5.5
-
1.4
LSB
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SLDN-12D1A
7
85
95
90
80
85
Vin=3V
75
Vin=3V
EFFICIENCY, (%)
EFFICIENCY, (%)
80
70
Vin=14V
Vin=12V
65
60
55
75
Vin=14V
Vin=12V
70
65
60
55
50
50
0
2
4
6
8
10
12
0
2
4
OUTPUT CURRENT, IO (A)
6
8
10
12
10
12
OUTPUT CURRENT, IO (A)
Figure 1. Vo = 0.6 V
Figure 2. Vo = 1.2 V
95
100
95
90
90
EFFICIENCY, (%)
EFFICIENCY, (%))
Vin=3.5V
85
Vin=12V
Vin=14V
80
75
70
Vin=4.5V
85
Vin=14V
80
75
70
0
2
4
6
8
10
12
0
2
OUTPUT CURRENT, IO (A)
95
95
90
90
Vin=14V
EFFICIENCY, (%)
100
Vin=4.5V
6
8
Figure 4. Vo = 2.5 V
100
85
4
OUTPUT CURRENT, IO (A)
Figure 3. Vo = 1.8 V
EFFICIENCY, (%))
Vin=12V
Vin=12V
80
75
70
Vin=7V
Vin=14V
Vin=12V
85
80
75
70
0
2
4
6
8
10
12
0
OUTPUT CURRENT, IO (A)
2
4
6
8
10
12
OUTPUT CURRENT, IO (A)
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SLDN-12D1A
8
Figure 5. Vo = 3.3 V
Figure 6. Vo = 5.0 V
12
12
10
NC
8
0.5m/s
(100LFM)
Standard Part
(85°C)
6
1.5m/s
(300LFM)
Ruggedized (D)
Part (105°C)
4
1m/s
(200LFM)
2
OUTPUT CURRENT, Io (A)
OUTPUT CURRENT, Io (A)
10
2m/s
2m/s
(400LFM)
(400LFM)
0
NC
0.5m/s
(100LFM)
8
6
Standard
Part (85 C)
4
Ruggedized (D)
Part (105°C)
2
65
75
85
95
105
55
65
AMBIENT TEMPERATURE, TA OC
2m/s
(400LFM)
75
85
95
105
AMBIENT TEMPERATURE, TA OC
Figure 7. Vo = 0.6 V
Figure 8. Vo = 1.2 V
12
12
10
10
NC
OUTPUT CURRENT, Io (A)
OUTPUT CURRENT, Io (A)
1.5m/s
(300LFM)
0
55
0.5m/s
(100LFM)
8
6
Standard Part
(85°C)
4
1m/s
(200LFM)
Ruggedized (D)
Part (105°C)
2
1.5m/s
(300LFM)
2m/s
(400LFM)
0
55
65
75
85
95
NC
0.5m/s
(100LFM)
8
6
1m/s
(200LFM)
Standard
Part (85°C)
4
1.5m/s
(300LFM)
2m/s
(400LFM
Ruggedized (D)
Part (105°C)
2
0
55
105
65
O
75
85
95
105
O
AMBIENT TEMPERATURE, TA C
AMBIENT TEMPERATURE, TA C
Figure 9. Vo = 1.8 V
Figure 10. Vo = 2.5 V
12
12
10
10
NC
OUTPUT CURRENT, Io (A)
OUTPUT CURRENT, Io (A)
1m/s
(200LFM)
0.5m/s
(100LFM)
8
1m/s
(200LFM)
6
Standard
Part (85°C)
4
1.5m/s
(300LFM)
Ruggedized (D)
Part (105°C)
2
2m/s
(400LFM)
0
55
65
75
85
AMBIENT TEMPERATURE, TA OC
95
105
NC
0.5m/s
(100LFM)
8
1m/s
(200LFM)
6
1.5m/s
(300LFM)
Standard
Part (85°C)
4
Ruggedized (D)
Part (105°C)
2
2m/s
(400LFM)
0
45
55
65
75
85
95
105
AMBIENT TEMPERATURE, TA OC
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SLDN-12D1A
9
OUTPUT VOLTAGE
VO (V) (10mV/div)
VO (V) (20mV/div)
Figure 12. Vo = 5.0 V
OUTPUT VOLTAGE
Figure 11. Vo = 3.3 V
TIME, t (1s/div)
TIME, t (1s/div)
Figure 14. Vo = 1.2 V, Io = Io,max
OUTPUT VOLTAGE
VO (V) (20mV/div)
OUTPUT VOLTAGE
VO (V) (20mV/div)
Figure 13. Vo = 0.6 V, Io = Io,max
TIME, t (1s/div)
TIME, t (1s/div)
Figure 16. Vo = 2.5 V, Io = Io,max
OUTPUT VOLTAGE
VO (V) (50mV/div)
OUTPUT VOLTAGE
VO (V) (20mV/div)
Figure 15. Vo = 1.8 V, Io = Io,max
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SLDN-12D1A
10
TIME, t (1s/div)
TIME, t (1s/div)
Figure 17. Vo = 3.3 V, Io = Io,max
Figure 18. Vo = 5.0 V, Io = Io,max
OUTPUT CURRENT,
IO (A) (2Adiv)
OUTPUT CURRENT,
IO (A) (2Adiv)
OUTPUT VOLTAGE
VO (V) (5mV/div)
OUTPUT VOLTAGE
VO (V) (10mV/div)
Note: CO = 22 µF ceramic, VIN = 12 V.
TIME, t (20s /div)
TIME, t (20s /div)
from 50% to 100% at 12Vin, Cout = 1x 47 µF + 4x 330 µF,
CTune = 33 nF, RTune = 178 Ω. Vo = 0.6 V
from 50% to 100% at 12Vin, Cout = 1x 47 µF + 2x 330 µF,
CTune = 12 nF, RTune = 178 Ω. Vo = 1.2 V
OUTPUT CURRENT,
IO (A) (2Adiv)
OUTPUT CURRENT,
IO (A) (2Adiv)
OUTPUT VOLTAGE
VO (V) (20mV/div)
Figure 20. Transient Response to Dynamic Load Change
OUTPUT VOLTAGE
VO (V) (20mV/div)
Figure 19. Transient Response to Dynamic Load Change
TIME, t (20s /div)
Figure 21. Transient Response to Dynamic Load Change
from 50% to 100% at 12Vin, Cout = 1x 47 µF + 1x 330 µF,
CTune = 4700 pF, RTune = 178 Ω. Vo = 1.8 V
TIME, t (20s /div)
Figure 22. Transient Response to Dynamic Load Change
from 50% to 100% at 12Vin, Cout=3x 47 µF,
CTune = 3300 pF, RTune = 178 Ω. Vo = 2.5 V
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OUTPUT VOLTAGE
VO (V) (50mV/div)
11
OUTPUT CURRENT,
IO (A) (2Adiv)
OUTPUT CURRENT,
IO (A) (2Adiv)
OUTPUT VOLTAGE
VO (V) (20mV/div)
SLDN-12D1A
TIME, t (20s /div)
TIME, t (20s /div)
Figure 23. Transient Response to Dynamic Load Change
Figure 24. Transient Response to Dynamic Load Change
from 50% to 100% at 12Vin, Cout = 3x 47 µF,
CTune = 3300 pF, RTune = 178 Ω. Vo = 3.3 V
ON/OFF VOLTAGE
VON/OFF (V) (5V/div)
ON/OFF VOLTAGE
VON/OFF (V) (5V/div)
OUTPUT VOLTAGE
VO (V) (200mV/div)
OUTPUT VOLTAGE
VO (V) (500mV/div)
from 50% to 100% at 12Vin, Cout = 2x 47 µF,
CTune = 2200 pF, RTune = 261 Ω. Vo = 5.0 V
TIME, t (2 ms/div)
TIME, t (2 ms/div)
Figure 26. Start-up Using On/Off Voltage
(Io = Io,max), Vo = 0.6 V
(Io = Io,max), Vo = 1.2 V
ON/OFF VOLTAGE OUTPUT VOLTAGE
VON/OFF (V) (5V/div) VO (V) (500mV/div)
ON/OFF VOLTAGE OUTPUT VOLTAGE
VO (V) (1V/div)
VON/OFF (V) (5V/div)
Figure 25. Start-up Using On/Off Voltage
TIME, t (2 ms/div)
TIME, t (2 ms/div)
Figure 27. Start-up Using On/Off Voltage
Figure 28. Start-up Using On/Off Voltage
(Io = Io,max), Vo = 1.8 V
(Io = Io,max), Vo = 2.5 V
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SLDN-12D1A
ON/OFF VOLTAGE OUTPUT VOLTAGE
VO (V) (2V/div)
VON/OFF (V) (5V/div)
ON/OFF VOLTAGE OUTPUT VOLTAGE
VO (V) (1V/div)
VON/OFF (V) (5V/div)
12
TIME, t (2 ms/div)
TIME, t (2 ms/div)
Figure 30. Start-up Using On/Off Voltage
(Io = Io,max), Vo = 3.3 V
(Io = Io,max), Vo = 5.0 V
ON/OFF VOLTAGE OUTPUT VOLTAGE
VO (V) (200mV/div)
Vin(V) (5V/div)
ON/OFF VOLTAGE OUTPUT VOLTAGE
VO (V) (500mV/div)
Vin (V) (5V/div)
Figure 29. Start-up Using On/Off Voltage
TIME, t (2 ms/div)
TIME, t (2 ms/div)
Figure 32. Start-up Using Input Voltage
(VIN = 12V, Io = Io,max ), Vo = 0.6 V
(VIN = 12V, Io = Io,max ), Vo = 1.2 V
INPUT VOLTAGE
Vin(V) (5V/div)
OUTPUT VOLTAGE
VO (V) (1V/div)
ON/OFF VOLTAGE OUTPUT VOLTAGE
Vin (V) (5V/div) VO (V) (500mV/div)
Figure 31. Start-up Using Input Voltage
TIME, t (2 ms/div)
TIME, t (2 ms/div)
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SLDN-12D1A
13
(VIN = 12V, Io = Io,max ), Vo = 2.5 V
ON/OFF VOLTAGE OUTPUT VOLTAGE
VO (V) (2V/div)
Vin (V) (5V/div)
Figure 34. Start-up Using Input Voltage
(VIN = 12V, Io = Io,max ), Vo = 1.8 V
ON/OFF VOLTAGE OUTPUT VOLTAGE
VO (V) (1V/div)
Vin (V) (5V/div)
Figure 33. Start-up Using Input Voltage
TIME, t (2 ms/div)
TIME, t (2 ms/div)
Figure 35. Start-up Using Input Voltage
Figure 36. Start-up Using Input Voltage
(VIN = 12V, Io = Io,max ), Vo = 3.3 V
(VIN = 12V, Io = Io,max ), Vo = 5.0 V
The SLDN-12D1Ax module should be connected to a low ac-impedance source. A highly inductive source can affect the stability of
the module. An input capacitance must be placed directly adjacent to the input pin of the module, to minimize input ripple voltage
and ensure module stability.
To minimize input voltage ripple, ceramic capacitors are recommended at the input of the module. Figure 37 shows the input ripple
voltage for various output voltages at 12 A of load current with 2x22 µF or 3x22 µF ceramic capacitors and an input of 12V.
250
.
2x22uF
Ripple (mVp-p)
3x22uF
200
150
100
50
0.5
1.5
2.5
3.5
4.5
Output Voltage(Volts)
Figure 37.
Note: Input ripple voltage for various output voltages with 12x22 µF or 3x22 µF ceramic capacitors at the input (12 A load). Input
voltage is 12 V.
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These modules are designed for low output ripple voltage and will meet the maximum output ripple specification with 0.1 µF ceramic
and 22 µF ceramic capacitors at the output of the module. However, additional output filtering may be required by the system
designer for a number of reasons. First, there may be a need to further reduce the output ripple and noise of the module. Second,
the dynamic response characteristics may need to be customized to a particular load step change.
To reduce the output ripple and improve the dynamic response to a step load change, additional capacitance at the output can be
used. Low ESR polymer and ceramic capacitors are recommended to improve the dynamic response of the module. Figure 38
provides output ripple information for different external capacitance values at various Vo and a full load current of 12 A. For stable
operation of the module, limit the capacitance to less than the maximum output capacitance as specified in the electrical specification
table. Optimal performance of the module can be achieved by using the Tunable LoopTM feature described later in this data sheet.
60
1x22uF Ext Cap
1x47uF Ext Cap
Ripple (mVp-p)
50
2x47uF Ext Cap
4x47uF Ext Cap
40
30
20
10
0
0.5
1.5
2.5
3.5
4.5
Output Voltage(Volts)
Figure 38.
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Note: Output ripple voltage for various output voltages with external 1x10 µF, 1x47 µF, 2x47 µF or 4x47 µF ceramic capacitors at
the output (12 A load). Input voltage is 12 V.
For safety agency approval the power module must be installed in compliance with the spacing and separation requirements of the
end-use safety agency standards, i.e., UL 60950-1 2nd, CSA C22.2 No. 60950-1-07.
For the converter output to be considered meeting the requirements of safety extra-low voltage (SELV), the input must meet SELV
requirements. The power module has extra-low voltage (ELV) outputs when all inputs are ELV.
The input to these units is to be provided with a slow-blow fuse with a maximum rating of 15 A in the positive input lead.
PARAMETER
DESCRIPTION
Signal Low (Unit On)
Active Low
TYP
MAX
UNIT
-0.2
-
0.6
V
2.0
-
Vin,max
V
-0.2
-
0.6
V
2.0
-
Vin,max
V
The remote on/off pin open, Unit on.
Signal High (Unit Off)
Signal Low (Unit Off)
Active High
MIN
The remote on/off pin open, Unit on.
Signal High (Unit On)
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The SLDN-12D1Ax module can be turned ON and OFF either by using the ON/OFF pin (Analog interface) or through the Power
Management Bus interface (Digital). The module can be configured in a number of ways through the Power Management Bus interface
to react to the two ON/OFF inputs:
Module ON/OFF can be controlled only through the analog interface (digital interface ON/OFF commands are ignored)
Module ON/OFF can be controlled only through the Power Management Bus interface (analog interface is ignored)
Module ON/OFF can be controlled by either the analog or digital interface.
The default state of the module (as shipped from the factory) is to be controlled by the analog interface only. If the digital interface is
to be enabled, or the module is to be controlled only through the digital interface, this change must be made through the Power
Management Bus. These changes can be made and written to non-volatile memory on the module so that it is remembered for
subsequent use.
The SLDN-12D1Ax power modules feature an On/Off pin for remote On/Off operation. Two On/Off logic options are available. In the
Positive Logic On/Off option, (device code suffix “0” – see Ordering Information), the module turns ON during a logic High on the
On/Off pin and turns OFF during a logic Low. With the Negative Logic On/Off option, (device code suffix “L” – see Ordering
Information), the module turns OFF during logic High and ON during logic Low. The On/Off signal should be always referenced to
ground. For either On/Off logic option, leaving the On/Off pin disconnected will turn the module ON when input voltage is present.
For positive logic modules, the circuit configuration for using the On/Off pin is shown in Figure 39. When the external transistor Q2 is
in the OFF state, the internal transistor Q1 is turned ON, and the internal PWM #Enable signal is pulled low causing the module to be
ON. When transistor Q2 is turned ON, the On/Off pin is pulled low and the module is OFF. A suggested value for Rpullup is 20k.
For negative logic On/Off modules, the circuit configuration is shown in Fig. 40. The On/Off pin should be pulled high with an external
pull-up resistor (suggested value for the 3V to 14V input range is 20Kohms). When transistor Q2 is in the OFF state, the On/Off pin is
pulled high, transistor Q1 is turned ON and the module is OFF. To turn the module ON, Q2 is turned ON pulling the On/Off pin low,
turning transistor Q1 OFF resulting in the PWM Enable pin going high.
DLYNX MODULE
DLYNX MODULE
+3.3V
+VIN
Rpullup
I
+3.3V
+VIN
Rpullup
10K
ENABLE
I
22K
ON/OFF
10K
ENABLE
ON/OFF
22K
Q1
Q1
+
+
Q2
Q2
V
ON/OFF
_
22K
GND
Figure 39. Circuit configuration for using positive On/Off logic
V
ON/OFF
_
22K
GND
Figure 40. Circuit configuration for using negative On/Off logic
Please see the Digital Feature Descriptions section.
The SLDN-12D1Ax module has monotonic start-up and shutdown behavior for any combination of rated input voltage, output
current and operating temperature range.
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The SLDN-12D1Ax module can start into a pre-biased output as long as the pre-bias voltage is 0.5V less than the set output
voltage.
The output voltage of the module is programmable to any voltage from 0.6dc to 5.5VDC by connecting a resistor between the Trim
and SIG_GND pins of the module. Certain restrictions apply on the output voltage set point depending on the input voltage. These
are shown in the Output Voltage vs. Input Voltage Set Point Area plot in Fig. 41. The Upper Limit curve shows that for output voltages
lower than 1V, the input voltage must be lower than the maximum of 14.4V. The Lower Limit curve shows that for output voltages
higher than 0.6V, the input voltage needs to be larger than the minimum of 3V.
Figure 41.Output Voltage vs. Input Voltage Set Point Area plot
showing limits where the output voltage can be set for different input voltages.
VIN(+)
VO(+)
VS+
ON/OFF
LOAD
TRIM
Rtrim
SIG_GND
VS─
Figure 42. Circuit configuration for programming output voltage using an external resistor.
Without an external resistor between Trim and SIG_GND pins, the output of the module will be 0.6VDC. To calculate the value of the
trim resistor, Rtrim for a desired output voltage, should be as per the following equation:
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12
Rtrim =
k
(
)
Vo
−
0
.
6
Rtrim is the external resistor in KΩ
Vo is the desired output voltage.
Table 1 provides Rtrim values required for some common output voltages.
VO, set (V)
Rtrim (KΩ)
0.6
Open
0.9
40
1.0
30
1.2
20
1.5
13.33
1.8
10
2.5
6.316
3.3
4.444
5.0
2.727
Table 1.
By using a ±0.5% tolerance trim resistor with a TC of ±100 ppm, a set point tolerance of ±1.5% can be achieved as specified in the
electrical specification.
Please see the Digital Feature Descriptions section.
The SLDN-12D1Ax power modules has a Remote Sense feature to minimize the effects of distribution losses by regulating the voltage
between the sense pins (VS+ and VS-). The voltage drop between the sense pins and the VOUT and GND pins of the module should
not exceed 0.5 V.
Output voltage margining can be implemented in the SLDN-12D1Ax modules by connecting a resistor, Rmargin-up, from the Trim pin
to the ground pin for margining-up the output voltage and by connecting a resistor, Rmargin-down, from the Trim pin to output pin for
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margining-down. Figure 43 shows the circuit configuration for output voltage margining. Please consult your local Bel Power technical
representative for additional details.
Figure 43. Circuit Configuration for margining Output voltage
Please see the Digital Feature Descriptions section.
The SLDN-12D1Ax module includes a sequencing feature, EZ-SEQUENCE that enables users to implement various types of output
voltage sequencing in their applications. This is accomplished via an additional sequencing pin. When not using the sequencing
feature, leave it unconnected.
The voltage applied to the SEQ pin should be scaled down by the same ratio as used to scale the output voltage down to the reference
voltage of the module. This is accomplished by an external resistive divider connected across the sequencing voltage before it is fed
to the SEQ pin as shown in Fig. 44. In addition, a small capacitor (suggested value 100pF) should be connected across the lower
resistor R1.
For all Bel modules, the minimum recommended delay between the ON/OFF signal and the sequencing signal is 10ms to ensure that
the module output is ramped up according to the sequencing signal. This ensures that the module soft-start routine is completed
before the sequencing signal is allowed to ramp up.
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DLynx Module
V
SEQ
20K
SEQ
R1=Rtrim
100 pF
SIG_GND
Figure 44. Circuit showing connection of the sequencing signal to the SEQ pin
When the scaled down sequencing voltage is applied to the SEQ pin, the output voltage tracks this voltage until the output reaches
the set-point voltage. The final value of the sequencing voltage must be set higher than the set-point voltage of the module. The
output voltage follows the sequencing voltage on a one-to-one basis. By connecting multiple modules together, multiple modules can
track their output voltages to the voltage applied on
The SEQ pin.
To initiate simultaneous shutdown of the modules, the SEQ pin voltage is lowered in a controlled manner. The output voltage of the
modules tracks the voltages below their set-point voltages on a one-to-one basis. A valid input voltage must be maintained until the
tracking and output voltages reach ground potential.
Note that in all of modules, the Power Management Bus Output Undervoltage Fault will be tripped when sequencing is employed.
This will be detected using the STATUS_WORD and STATUS_VOUT Power Management Bus commands. In addition, the
SMBALERT# signal will be asserted low as occurs for all faults and warnings. To avoid the module shutting down due to the Output
Undervoltage Fault, the module must be set to continue operation without interruption as the response to this fault (see the description
of the Power Management Bus command VOUT_UV_FAULT_RESPONSE for additional information).
To provide protection in a fault (output overload) condition, the unit is equipped with internal current-limiting circuitry and can endure
current limiting continuously. At the point of current-limit inception, the unit enters hiccup mode. The unit operates normally once
the output current is brought back into its specified range.
Please see the Digital Feature Descriptions section.
To provide protection in a fault condition, the unit is equipped with a thermal shutdown circuit. The unit will shut down if the
overtemperature threshold of 150℃(typ) is exceeded at the thermal reference point Tref .Once the unit goes into thermal shutdown it
will then wait to cool before attempting to restart.
Please see the Digital Feature Descriptions section.
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Please see the Digital Feature Descriptions section
At input voltages below the input undervoltage lockout limit, the module operation is disabled. The module will begin to operate at an
input voltage above the undervoltage lockout turn-on threshold.
Please see the Digital Feature Descriptions section
Please see the Digital Feature Descriptions section
The SLDN-12D1Ax module switching frequency can be synchronized to a signal with an external frequency within a specified range.
Synchronization can be done by using the external signal applied to the SYNC pin of the module as shown in Fig. 45, with the converter
being synchronized by the rising edge of the external signal. The Electrical Specifications table specifies the requirements of the
external SYNC signal. If the SYNC pin is not used, the module should free run at the default switching frequency.
MODULE
SYNC
+
─
GND
Figure 45. External source connections to synchronize switching frequency of the module.
Please see the Digital Feature Descriptions section.
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Identical dimensions and pin layout of Analog and Digital modules permit migration from one to the other without needing to change
the layout. To support this, 2 separate Trim Resistor locations have to be provided in the layout. As shown in Fig. 46, for the digital
modules, the resistor is connected between the TRIM pad and SGND and in the case of the analog module it is connected between
TRIM and GND.
MODULE
TRIM
Rtrim1 for
Digital
(PVX006 / PDT006)
Rtrim2 for
Analog
SIG_GND
GND(Pin 7)
Figure 46. Connections to support either Analog or Digital module on the same layout.
The SLDN-12D1Ax has a feature that optimizes transient response of the module called Tunable LoopTM .
External capacitors are usually added to the output of the module for two reasons: to reduce output ripple and noise (see Figure 38)
and to reduce output voltage deviations from the steady-state value in the presence of dynamic load current changes. Adding external
capacitance however affects the voltage control loop of the module, typically causing the loop to slow down with sluggish response.
Larger values of external capacitance could also cause the module to become unstable.
The Tunable LoopTM allows the user to externally adjust the voltage control loop to match the filter network connected to the output
of the module. The Tunable LoopTM is implemented by connecting a series R-C between the VS+ and TRIM pins of the module, as
shown in Fig. 47. This R-C allows the user to externally adjust the voltage loop feedback compensation of the module.
VOUT
VS+
RTune
MODULE
CO
CTune
TRIM
RTrim
SIG_GND
GND
Figure 47. Circuit diagram showing connection of RTUME and CTUNE to tune the control loop of the module
Recommended values of RTUME and CTUNE for different output capacitor combinations are given in Tables 2 and 3. Table 3 shows the
recommended values of RTUME and CTUNE for different values of ceramic output capacitors up to 1000µF that might be needed for an
application to meet output ripple and noise requirements. Selecting RTUME and CTUNE according to Table 3 will ensure stable operation
of the module.
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In applications with tight output voltage limits in the presence of dynamic current loading, additional output capacitance will be
required. Table 3 lists recommended values of RTUME and CTUNE in order to meet 2% output voltage deviation limits for some common
output voltages in the presence of a 6A to 6A step change (50% of full load), with an input voltage of 12V.
Please contact your Bel Power technical representative to obtain more details of this feature as well as for guidelines on how to select
the right value of external R-C to tune the module for best transient performance and stable operation for other output capacitance
values.
1x 4 F
2x 47F
4x 47F
6x 47F
10x 47F
RTUNE
330 Ω
330 Ω
330 Ω
330 Ω
220 Ω
180 Ω
CTUNE
100 pF
360 pF
1500 pF
2200 pF
10 nF
6800 pF
Co
20x 47F
Table 2.
General recommended values of of RTUME and CTUNE for Vin = 12 V and various external ceramic capacitor combinations.
Vo
5V
3.3 V
2.5 V
1.8 V
1.2 V
0.6V
3x 47F + 330F
Polymer
270 Ω
1x 47F + 2x 330F
Polymer
270 Ω
1x 47F + 3x 330F
Polymer
220 Ω
3x 47F + 6x 330F
Polymer
180 Ω
RTUNE
330 Ω
1x 47F + 330 F
Polymer
330 Ω
CTUNE
1500 pF
2700 pF
3300 pF
5600 pF
10 nF
47 nF
99 mV
58 mV
47 mV
34 mV
24 mV
12 mV
Co
V
5x 47F
Table 3.
Recommended values of RTUME and CTUNE to obtain transient deviation of 2% of Vout for a 3A step load with Vin=12V
Note: The capacitors used in the Tunable Loop tables are 47 μF/3 mΩ ESR ceramic and 330 μF/12 mΩ ESR polymer capacitors.
The SLDN-12D1Ax power modules have a Power Management Bus interface that supports both communication and control. The
Power Management Bus Power Management Protocol Specification can be obtained from www.Power Management Bus.org. The
modules support a subset of version 1.1 of the specification (see Table 6 for a list of the specific commands supported). Most module
parameters can be programmed using Power Management Bus and stored as defaults for later use.
All communication over the module Power Management Bus interface must support the Packet Error Checking (PEC) scheme. The
Power Management Bus master must generate the correct PEC byte for all transactions and check the PEC byte returned by the
module.
The module also supports the SMBALERT response protocol whereby the module can alert the bus master if it wants to talk. For more
information on the SMBus alert response protocol, see the System Management Bus (SMBus) specification.
The module has non-volatile memory that is used to store configuration settings. Not all settings programmed into the device are
automatically saved into this non-volatile memory, only those specifically identified as capable of being stored can be saved (see
Table 6 for which command parameters can be saved to non-volatile storage).
For commands that set thresholds, voltages or report such quantities, the module supports the “Linear” data format among the three
data formats supported by Power Management Bus. The Linear Data Format is a two byte value with an 11-bit, two’s complement
mantissa and a 5-bit, two’s complement exponent. The format of the two data bytes is shown below:
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Data Byte High
7 6 5 4 3
2 1 0 7 6 5 4 3 2 1 0
Exponent
MSB
Data Byte Low
Mantissa
MSB
The value is of the number is then given by Value = Mantissa x 2 Exponent
The SLDN-12D1Ax modules can be addressed through the Power Management Bus using a device address. The module has 64
possible addresses (0 to 63 in decimal) which can be set using resistors connected from the ADDR0 and ADDR1 pins to SIG_GND.
Note that some of these addresses (0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 12, 40, 44, 45, 55 in decimal) are reserved according to the SMBus
specifications and may not be useable. The address is set in the form of two octal (0 to 7) digits, with each pin setting one digit. The
ADDR1 pin sets the high order digit and ADDR0 sets the low order digit. The resistor values suggested for each digit are shown in
Table 4 (1% tolerance resistors are recommended). Note that if either address resistor value is outside the range specified in Table 4,
the module will respond to address 127.
Resistor Value (KΩ)
Digit
0
10
1
15.4
2
23.7
3
36.5
4
54.9
5
84.5
6
130
7
200
Table 4.
The user must know which I2C addresses are reserved in a system for special functions and set the address of the module to avoid
interfering with other system operations. Both 100kHz and 400kHz bus speeds are supported by the module. Connection for the
Power Management Bus interface should follow the High Power DC specifications given in section 3.1.3 in the SMBus specification
V2.0 for the 400kHz bus speed or the Low Power DC specifications in section 3.1.2. The complete SMBus specification is available
from the SMBus web site, smbus.org.
ADDR1
ADDR0
RADDR0
RADDR1
SIG_GND
Figure 48. Circuit showing connection of resistors used to set the Power Management Bus address of the module.
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The SLDN-12D1Ax module can also be turned on and off via the Power Management Bus interface. The OPERATION command is
used to actually turn the module on and off via the Power Management Bus, while the ON_OFF_CONFIG command configures the
combination of analog ON/OFF pin input and Power Management Bus commands needed to turn the module on and off. Bit [7] in the
OPERATION command data byte enables the module, with the following functions:
0 : Output is disabled
1 : Output is enabled
This module uses the lower five bits of the ON_OFF_CONFIG data byte to set various ON/OFF options as follows:
Bit Position
4
3
2
1
Access
r/w
r/w
r/w
r/w
0
r
Function
PU
CMD
CPR
POL
CPA
Default Value
1
0
1
1
1
PU: Sets the default to either operate any time input power is present or for the ON/OFF to be controlled by the analog ON/OFF input
and the Power Management Bus OPERATION command. This bit is used together with the CP, CMD and ON bits to determine startup.
Bit Value
Action
0
Module powers up any time power is present regardless of state of the analog ON/OFF pin
1
Module does not power up until commanded by the analog ON/OFF pin and the OPERATION command as
programmed in bits [2:0] of the ON_OFF_CONFIG register.
CMD: The CMD bit controls how the device responds to the OPERATION command.
Bit Value
Action
0
Module ignores the ON bit in the OPERATION command
1
Module responds to the ON bit in the OPERATION command
CPR: Sets the response of the analog ON/OFF pin. This bit is used together with the CMD, PU and ON bits to determine startup.
Bit Value
Action
0
Module ignores the analog ON/OFF pin, i.e. ON/OFF is only controlled through the POWER
MANAGEMENT BUS via the OPERATION command
1
Module requires the analog ON/OFF pin to be asserted to start the unit
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The soft start rise time can be adjusted in the module via Power Management Bus. When setting this parameter, make sure that the
charging current for output capacitors can be delivered by the module in addition to any load current to avoid nuisance tripping of the
overcurrent protection circuitry during startup. The TON_RISE command sets the rise time in ms, and allows choosing soft start times
between 600μs and 9ms, with possible values listed in Table 5. Note that the exponent is fixed at -4 (decimal) and the upper two bits
of the mantissa are also fixed at 0
Rise Time
Exponent
Mantissa
600μs
11100
00000001010
900μs
11100
00000001110
1.2ms
11100
00000010011
1.8ms
11100
00000011101
2.7ms
11100
00000101011
4.2ms
11100
00001000011
6.0ms
11100
00001100000
9.0ms
11100
00010010000
Table 5
The VOUT_SCALE_LOOP parameter is important for a number of Power Management Bus commands related to output voltage
trimming, margining, over/under voltage protection and the PGOOD thresholds. The output voltage of the module is set as the
combination of the voltage divider formed by RTrim and a 20kΩ upper divider resistor inside the module, and the internal reference
voltage of the module. The reference voltage VREF is nominally set at 600mV, and the output regulation voltage is then given by
20000 + RTrim
VOUT =
VREF
RTrim
Hence the module output voltage is dependent on the value of RTrim which is connected external to the module. The information on
the output voltage divider ratio is conveyed to the module through the VOUT_SCALE_LOOP parameter which is calculated as follows:
VOUT _ SCALE _ LOOP =
RTrim
20000 + RTrim
The VOUT_SCALE_LOOP parameter is specified using the “Linear” format and two bytes. The upper five bits [7:3] of the high byte are
used to set the exponent which is fixed at –9 (decimal). The remaining three bits of the high byte [2:0] and the eight bits of the lower
byte are used for the mantissa. The default value of the mantissa is 00100000000 corresponding to 256 (decimal), corresponding to a
divider ratio of 0.5. The maximum value of the mantissa is 512 corresponding to a divider ratio of 1. Note that the resolution of the
VOUT_SCALE_LOOP command is 0.2%.
When Power Management Bus commands are used to trim or margin the output voltage, the value of VREF is what is changed inside
the module, which in turn changes the regulated output voltage of the module.
The nominal output voltage of the module can be adjusted with a minimum step size of 0.4% over a ±25% range from nominal using
the VOUT_TRIM command over the Power Management Bus.
The VOUT_TRIM command is used to apply a fixed offset voltage to the output voltage command value using the “Linear” mode with
the exponent fixed at –10 (decimal). The value of the offset voltage is given by
VOUT ( offset ) = VOUT _ TRIM 2 −10
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This offset voltage is added to the voltage set through the divider ratio and nominal VREF to produce the trimmed output voltage. The
valid range in two’s complement for this command is –4000h to 3FFFh. The high order two bits of the high byte must both be either
0 or 1. If a value outside of the +/-25% adjustment range is given with this command, the module will set its output voltage to the
nominal value (as if VOUT_TRIM had been set to 0), assert SMBALRT#, set the CML bit in STATUS_BYTE and the invalid data bit in
STATUS_CML.
The module can also have its output voltage margined via Power Management Bus commands. The command VOUT_MARGIN_HIGH
sets the margin high voltage, while the command VOUT_MARGIN_LOW sets the margin low voltage. Both the VOUT_MARGIN_HIGH
and VOUT_MARGIN_LOW commands use the “Linear” mode with the exponent fixed at –10 (decimal). Two bytes are used for the
mantissa with the upper bit [7] of the high byte fixed at 0. The actual margined output voltage is a combination of the
VOUT_MARGIN_HIGH or VOUT_MARGIN_LOW and the VOUT_TRIM values as shown below:
VOUT ( MH ) =
(VOUT _ MARGIN _ HIGH + VOUT _ TRIM ) 2 −10
VOUT ( ML ) =
(VOUT _ MARGIN _ LOW + VOUT _ TRIM ) 2 −10
Note that the sum of the margin and trim voltages cannot be outside the ±25% window around the nominal output voltage. The data
associated with VOUT_MARGIN_HIGH and VOUT_MARGIN_LOW can be stored to non-volatile memory using the
STORE_DEFAULT_ALL command.
The module is commanded to go to the margined high or low voltages using the OPERATION command. Bits [5:2] are used to enable
margining as follows:
00XX : Margin Off
0101 : Margin Low (Ignore Fault)
0110 : Margin Low (Act on Fault)
1001 : Margin High (Ignore Fault)
1010 : Margin High (Act on Fault)
The SLDN-12D1Ax module can provide an overcurrent warning via the Power Management Bus. The threshold for the overcurrent
warning can be set using the parameter IOUT_OC_WARN_LIMIT. This command uses the “Linear” data format with a two byte data
word where the upper five bits [7:3] of the high byte represent the exponent and the remaining three bits of the high byte [2: ent the
mantissa. The exponent is fixed at –1 (decimal).The upper five bits of the mantissa are fixed at 0 while the lower six bits are
programmable with a default value of 14A. The resolution of this warning limit is 500mA. The new sentence would be: The value of the
IOUT_OC_WARN_LIMIT can be stored to non-volatile memory using the STORE_DEFAULT_ALL0] and the eight bits in the low byte
repres command.
The SLDN-12D1Ax module can provide information related to temperature of the module through the STATUS_TEMPERATURE
command. The command returns information about whether the pre-set over temperature fault threshold and/or the warning threshold
have been exceeded.
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28
The SLDN-12D1Ax module has output over and under voltage protection capability. The Power Management Bus command
VOUT_OV_FAULT_LIMIT is used to set the output over voltage threshold from four possible values: 108%, 110%, 112% or 115% of
the commanded output voltage. The command VOUT_UV_FAULT_LIMIT sets the threshold that causes an output under voltage fault
and can also be selected from four possible values: 92%, 90%, 88% or 85%. The default values are 112% and 88% of commanded
output voltage. Both commands use two data bytes formatted as two’s complement binary integers. The “Linear” mode is used with
the exponent fixed to –10 (decimal) and the effective over or under voltage trip points given by:
VOUT ( OV _ REQ ) = (VOUT _ OV _ FAULT _ LIMIT ) 2 −10
VOUT (UV _ REQ ) = (VOUT _ UV _ FAULT _ LIMIT ) 2 −10
Values within the supported range for over and undervoltage detection thresholds will be set to the nearest fixed percentage. Note
that the correct value for VOUT_SCALE_LOOP must be set in the module for the correct over or under voltage trip points to be
calculated.
In addition to adjustable output voltage protection, the 6A Digital module can also be programmed for the response to the fault. The
VOUT_OV_FAULT RESPONSE and VOUT_UV_FAULT_RESPONSE commands specify the response to the fault. Both these
commands use a single data byte with the possible options as shown below.
Continue operation without interruption (Bits [7:6] = 00, Bits [5:3] = xxx).
Continue for four switching cycles and then shut down if the fault is still present, followed by no restart or continuous restart (Bits
[7:6] = 01, Bits [5:3] = 000 means no restart, Bits [5:3] = 111 means continuous restart).
Immediate shut down followed by no restart or continuous restart (Bits [7:6] = 10, Bits [5:3] = 000 means no restart, Bits [5:3] = 111
means continuous restart).
Module output is disabled when the fault is present and the output is enabled when the fault no longer exists
(Bits [7:6] = 11, Bits [5:3] = xxx).
Note: that separate response choices are possible for output over voltage or under voltage faults.
The SLDN-12D1Ax module allows adjustment of the input under voltage lockout and hysteresis. The command VIN_ON allows setting
the input voltage turn on threshold, while the VIN_OFF command sets the input voltage turn off threshold. For the VIN_ON command,
possible values are 2.75V, and 3V to 14V in 0.5V steps. For the VIN_OFF command, possible values are 2.5V to 14V in 0.5V steps. If
other values are entered for either command, they will be mapped to the closest of the allowed values.
VIN_ON must be set higher than VIN_OFF. Attempting to write either VIN_ON lower than VIN_OFF or VIN_OFF higher than VIN_ON
results in the new value being rejected, SMBALERT being asserted along with the CML bit in STATUS_BYTE and the invalid data bit
in STATUS_CML.
Both the VIN_ON and VIN_OFF commands use the “Linear” format with two data bytes. The upper five bits represent the exponent
(fixed at -2) and the remaining 11 bits represent the mantissa. For the mantissa, the four most significant bits are fixed at 0.
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The SLDN-12D1Ax module provides a Power Good (PGOOD) signal that is implemented with an open-drain output to indicate that
the output voltage is within the regulation limits of the power module. The PGOOD signal will be de-asserted to a low state if any
condition such as overtemperature, overcurrent or loss of regulation occurs that would result in the output voltage going outside the
specified thresholds. The PGOOD thresholds are user selectable via the Power Management Bus (the default values are as shown in
the Feature Specifications Section). Each threshold is set up symmetrically above and below the nominal value. The
POWER_GOOD_ON command sets the output voltage level above which PGOOD is asserted (lower threshold). For example, with a
1.2V nominal output voltage, the POWER_GOOD_ON threshold can set the lower threshold to 1.14 or 1.1V. Doing this will
automatically set the upper thresholds to 1.26 or 1.3V.
.
The POWER_GOOD_OFF command sets the level below which the PGOOD command is de-asserted. This command also sets two
thresholds symmetrically placed around the nominal output voltage. Normally, the POWER_GOOD_ON threshold is set higher than
the POWER_GOOD_OFF threshold.
Both POWER_GOOD_ON and POWER_GOOD_OFF commands use the “Linear” format with the exponent fixed at –10 (decimal). The
two thresholds are given by
VOUT ( PGOOD _ ON ) = ( POWER _ GOOD _ ON ) 2 −10
VOUT ( PGOOD _ OFF ) = ( POWER _ GOOD _ OFF ) 2 −10
Both commands use two data bytes with bit [7] of the high byte fixed at 0, while the remaining bits are r/w and used to set the mantissa
using two’s complement representation. Both commands also use the VOUT_SCALE_LOOP parameter so it must be set correctly.
The default value of POWER_GOOD_ON is set at 1.1035V and that of the POWER_GOOD_OFF is set at 1.08V. The values associated
with these commands can be stored in non-volatile memory using the STORE_DEFAULT_ALL command.
The PGOOD terminal can be connected through a pullup resistor (suggested value 100 K) to a source of 5 VDC or lower.
The SLDN-12D1Ax module is capable of measuring key module parameters such as output current and voltage and input voltage and
providing this information through the Power Management Bus interface. Roughly every 200μs, the module makes 16 measurements
each of output current, voltage and input voltage. Average values of of these 16 measurements are then calculated and placed in the
appropriate registers. The values in the registers can then be read using the Power Management Bus interface.
The SLDN-12D1Ax module measures current by using the inductor winding resistance as a current sense element. The inductor
winding resistance is then the current gain factor used to scale the measured voltage into a current reading. This gain factor is the
argument of the IOUT_CAL_GAIN command, and consists of two bytes in the linear data format. The exponent uses the upper five
bits [7:3] of the high data byte in two-s complement format and is fixed at –15 (decimal). The remaining 11 bits in two’s complement
binary format represent the mantissa.
The current measurement accuracy is also improved by each module being calibrated during manufacture with the offset in the current
reading. The IOUT_CAL_OFFSET command is used to store and read the current offset. The argument for this command consists of
two bytes composed of a 5-bit exponent (fixed at -4d) and a 11-bit mantissa. This command has a resolution of 62.5mA and a range
of -4000mA to +3937.5mA. During manufacture, each module is calibrated by measuring and storing the current gain factor and
offset into non-volatile storage.
The READ_IOUT command provides module average output current information. This command only supports positive or current
sourced from the module. If the converter is sinking current a reading of 0 is provided. The READ_IOUT command returns two bytes
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of data in the linear data format. The exponent uses the upper five bits [7:3] of the high data byte in two-s complement format and is
fixed at –4 (decimal). The remaining 11 bits in two’s complement binary format represent the mantissa with the 11th bit fixed at 0 since
only positive numbers are considered valid.
Note that the current reading provided by the module is not corrected for temperature. The temperature corrected current reading for
module temperature TModule can be estimated using the following equation
where IOUT_CORR is the temperature corrected value of the current measurement, IREAD_OUT is the module current measurement
value, TIND is the temperature of the inductor winding on the module. Since it may be difficult to measure TIND, it may be
approximated by an estimate of the module temperature.
Measuring Output Voltage Using the Power Management Bus
The SLDN-12D1Ax module can provide output voltage information using the READ_VOUT command. The command returns two bytes
of data all representing the mantissa while the exponent is fixed at -10 (decimal).
During manufacture of the module, offset and gain correction values are written into the non-volatile memory of the module. The
command VOUT_CAL_OFFSET can be used to read and/or write the offset (two bytes consisting of a 16-bit mantissa in two’s
complement format) while the exponent is always fixed at -10 (decimal). The allowed range for this offset correction is -125 to 124mV.
The command VOUT_CAL_GAIN can be used to read and/or write the gain correction - two bytes consisting of a five-bit exponent
(fixed at -8) and a 11-bit mantissa. The range of this correction factor is -0.125V to +0.121V, with a resolution of 0.004V. The corrected
output voltage reading is then given by:
VOUT ( Final) =
[VOUT ( Initial) (1 + VOUT _ CAL _ GAIN )]
+ VOUT _ CAL _ OFFSET
The SLDN-12D1Ax module can provide output voltage information using the READ_VIN command. The command returns two bytes
of data in the linear format. The upper five bits [7:3] of the high data form the two’s complement representation of the mantissa which
is fixed at –5 (decimal). The remaining 11 bits are used for two’s complement representation of the mantissa, with the 11th bit fixed at
zero since only positive numbers are valid.
During module manufacture, offset and gain correction values are written into the non-volatile memory of the module. The command
VIN_CAL_OFFSET can be used to read and/or write the offset - two bytes consisting of a five-bit exponent (fixed at -5) and a11-bit
mantissa in two’s complement format. The allowed range for this offset correction is -2 to 1.968V, and the resolution is 32mV. The
command VIN_CAL_GAIN can be used to read and/or write the gain correction - two bytes consisting of a five-bit exponent (fixed at
-8) and a 11-bit mantissa. The range of this correction factor is -0.125V to +0.121V, with a resolution of 0.004V. The corrected output
voltage reading is then given by:
V IN ( Final) =
[V IN ( Initial) (1 + VIN _ CAL _ GAIN )]
+ VIN _ CAL _ OFFSET
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The SLDN-12D1Ax module supports a number of status information commands implemented in Power Management Bus. However,
not all features are supported in these commands. A 1 in the bit position indicates the fault that is flagged.
STATUS_BYTE: Returns one byte of information with a summary of the most critical device faults.
BIT POSITION
FLAG
DEFAULT VALUE
7
X
0
6
OFF
0
5
VOUT Overvoltage
0
4
IOUT Overcurrent
0
3
VIN Undervoltage
0
2
Temperature
0
1
CML (Comm. Memory Fault)
0
0
None of the above
0
STATUS_WORD: Returns two bytes of information with a summary of the module’s fault/warning conditions.
BIT POSITION
FLAG
DEFAULT VALUE
7
X
0
6
OFF
0
5
VOUT Overvoltage
0
4
IOUT Overcurrent
0
3
VIN Undervoltage
0
2
Temperature
0
1
CML (Comm. Memory Fault)
0
0
None of the above
0
BIT POSITION
FLAG
DEFAULT VALUE
7
VOUT FAULT OR WARNING
0
6
IOUT FAULT OR WARNING
0
5
X
0
4
X
0
3
POWER_GOOD# (IS NEGATED)
0
2
X
0
1
X
0
0
X
0
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STATUS_VOUT: Returns one byte of information relating to the status of the module’s output voltage related faults.
BIT POSITION
FLAG
DEFAULT VALUE
7
VOUT OV Fault
0
6
X
0
5
X
0
4
VOUT UV Fault
0
3
X
0
2
X
0
1
X
0
0
X
0
STATUS_IOUT: Returns one byte of information relating to the status of the module’s output voltage related faults.
BIT POSITION
FLAG
DEFAULT VALUE
7
IOUT OC Fault
0
6
X
0
5
IOUT OC Warning
0
4
X
0
3
X
0
2
X
0
1
X
0
0
X
0
STATUS_TEMPERATURE: Returns one byte of information relating to the status of the module’s temperature related faults.
BIT POSITION
FLAG
DEFAULT VALUE
7
OT Fault
0
6
OT Warning
0
5
X
0
4
X
0
3
X
0
2
X
0
1
X
0
0
X
0
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STATUS_CML: Returns one byte of information relating to the status of the module’s communication related faults.
BIT POSITION
FLAG
DEFAULT VALUE
7
Invalid/Unsupported Command
0
6
Invalid/Unsupported Command
0
5
Packet Error Check Failed
0
4
X
0
3
X
0
2
X
0
1
Other Communication Fault
0
0
X
0
MFR_VIN_MIN: Returns minimum input voltage as two data bytes of information in Linear format (upper five bits are exponent – fixed
at -2, and lower 11 bits are mantissa in two’s complement format – fixed at 12)
MFR_VOUT_MIN: Returns minimum output voltage as two data bytes of information in Linear format (upper five bits are exponent –
fixed at -10, and lower 11 bits are mantissa in two’s complement format – fixed at 614)
MFR_SPECIFIC_00: Returns information related to the type of module and revision number. Bits [7:2] in the Low Byte indicate the
module type (000000 corresponds to the SLDN-06D1Ax series of module), while bits [7:3] indicate the revision number of the module.
Low Byte
BIT POSITION
FLAG
DEFAULT VALUE
7:2
Module Name
000000
1:0
Reserved
10
High Byte
BIT POSITION
FLAG
DEFAULT VALUE
7:3
Module Revision Number
None
2:0
Reserved
000
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Please refer to the Power Management Bus 1.1 specification for more details of these commands.
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SLDN-12D1A
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SLDN-12D1A
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SLDN-12D1A
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SLDN-12D1A
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43
The SLDN-12D1Ax power modules operate in a variety of thermal environments; however, sufficient cooling should always be provided
to help ensure reliable operation.
Considerations include ambient temperature, airflow, module power dissipation, and the need for increased reliability. A reduction in
the operating temperature of the module will result in an increase in reliability. The thermal data presented here is based on physical
measurements taken in a wind tunnel. The test set-up is shown in Figure 49. The preferred airflow direction for the module is in Figure
50.
25.4_
(1.0)
Wind Tunnel
PWBs
Power Module
76.2_
(3.0)
x
12.7_
(0.50)
Probe Location
for measuring
airflow and
ambient
temperature
Air
flow
Figure 49. Thermal Test Setup
The thermal reference points, Tref used in the specifications are also shown in Figure 50. For reliable operation the temperatures at
these points should not exceed 120°C. The output power of the module should not exceed the rated power of the module (Vo,set x
Io,max)
Please refer to the Application Note “Thermal Characterization Process for Open-Frame Board-Mounted Power Modules” for a
detailed discussion of thermal aspects including maximum device temperatures.
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Figure 50. Preferred airflow direction and location of hot-spot of the module (Tref).
Requirements:
Vin:
Vout:
Iout:
Vout:
Vin, ripple
12V
1.8V
9A max., worst case load transient is from 6A to 9A
1.5% of Vout (27mV) for worst case load transient
1.5% of Vin (180mV, p-p)
Vin+
VIN
PGOOD
Vout+
VOUT
VS+
RTUNE
MODULE
CLK
CI3
CI2
CI1
ON/OFF
GND
CTUNE
SEQ
TRIM
DATA
ADDR0
SMBALRT#
ADDR1
CO1
CO2
CO3
RTrim
RADDR1 RADDR0
SIG_GND
SYNC GND VSFigure 51.
CI1
CI2
CI3
CO1
CO2
CO3
CTune
RTune
RTrim
Decoupling cap - 1x0.047F/16V ceramic capacitor (e.g. Murata LLL185R71C473MA01)
2x22F/16V ceramic capacitor (e.g. Murata GRM32ER61C226KE20)
470F/16V bulk electrolytic
Decoupling cap - 1x0.047F/16V ceramic capacitor (e.g. Murata LLL185R71C473MA01)
2 x 47F/6.3V ceramic capacitor (e.g. Murata GRM31CR60J476ME19)
1 x 330F/6.3V Polymer (e.g. Sanyo Poscap)
3300pF ceramic capacitor (can be 1206, 0805 or 0603 size)
270 ohms SMT resistor (can be 1206, 0805 or 0603 size)
10k SMT resistor (can be 1206, 0805 or 0603 size, recommended tolerance of 0.1%)
Note: The DATA, CLK and SMBALRT pins do not have any pull-up resistors inside the module. Typically, the SMBus master
controller will have the pull-up resistors as well as provide the driving source for these signals.
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Figure 52. Outline
Dimensions are in mm [inch].
Tolerances: x.x 0.5 mm [ 0.02 inch] [unless otherwise indicated]
x.xx 0.25 mm [ 0.010 inch]
Note: This module is recommended and compatible with Pb-Free Reflow Soldering and must be soldered using a reflow profile with
a peak temperature of no more than 260 ºC for less than 5 seconds.
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Figure 53. Pins (Bottom View)
PIN
FUNCTION
PIN
FUNCTION
1
ON/OFF
10
PGOOD
2
VIN
11
SYNC1
3
GND
12
VS-
4
VOUT
13
SIG. GND
5
SENSE
14
SMBALERT
6
TRIM
15
DATA
7
GND
16
ADDR0
8
CLK
17
ADDR1
9
SEQ
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Figure 54. Recommended pad layout
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The SLDN-12D1Ax modules are supplied in tape & reel as standard.
All Dimensions are in millimeter [inch].
Figure 55.
Reel Dimensions:
Outside Dimensions:
Inside Dimensions:
Tape Width:
330.2 mm [13.00 inch]
177.8 mm [7.00 inch]
24.00 mm [0.945 inch]
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The SLDN-12D1Ax modules use an open frame construction and are designed for a fully automated assembly process. The
modules are fitted with a label designed to provide a large surface area for pick and place operations. The label meets all the
requirements for surface mount processing, as well as safety standards, and is able to withstand reflow temperatures of up to
300oC. The label also carries product information such as product code, serial number and the location of manufacture.
The SLDN-12D1Ax module weight has been kept to a minimum by using open frame construction. Variables such as nozzle size,
tip style, vacuum pressure and placement speed should be considered to optimize this process. The minimum recommended inside
nozzle diameter for reliable operation is 3mm. The maximum nozzle outer diameter, which will safely fit within the allowable
component spacing, is 7 mm.
This SLDN-12D1Ax module is not recommended for assembly on the bottom side of a customer board. If such an assembly is
attempted, components may fall off the module during the second reflow process.
The SLDN-12D1Ax modules are lead-free (Pb-free) and RoHS compliant and fully compatible in a Pb-free soldering process. Failure
to observe the instructions below may result in the failure of or cause damage to the modules and can adversely affect long-term
reliability.
Power Systems will comply with J-STD-020 Rev. C (Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface
Mount Devices) for both Pb-free solder profiles and MSL classification procedures. This standard provides a recommended forcedair-convection reflow profile based on the volume and thickness of the package (table 4-2). The suggested Pb-free solder paste is
Sn/Ag/Cu (SAC). The recommended linear reflow profile using Sn/Ag/Cu solder is shown in Fig. 50. Soldering outside of the
recommended profile requires testing to verify results and performance.
The SLDN-12D1Ax modules have a MSL rating of 2A.
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The recommended storage environment and handling procedures for moisture-sensitive surface mount packages is detailed in JSTD-033 Rev. A (Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount Devices). Moisture barrier bags
(MBB) with desiccant are required for MSL ratings of 2 or greater. These sealed packages should not be broken until time of use.
Once the original package is broken, the floor life of the product at conditions of 30°C and 60% relative humidity varies according
to the MSL rating (see J-STD-033A). The shelf life for dry packed SMT packages will be a minimum of 12 months from the bag seal
date, when stored at the following conditions: < 40° C, < 90% relative humidity.
300
Per J-STD-020 Rev. C
Peak Temp 260°C
Reflow Temp (°C)
250
200
* Min. Time Above 235°C
15 Seconds
150
Heating Zone
1°C/Second
Cooling
Zone
*Time Above 217°C
60 Seconds
100
50
0
Reflow Time (Seconds)
Figure 56. Recommended linear reflow profile using Sn/Ag/Cu solder.
Post solder cleaning is usually the final circuit-board assembly process prior to electrical board testing. The result of inadequate
cleaning and drying can affect both the reliability of a power module and the testability of the finished circuit-board assembly. For
guidance on appropriate soldering, cleaning and drying procedures, refer to Board Mounted Power Modules: Soldering and Cleaning
Application Note (AN04-001).
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DATE
REVISION
CHANGES DETAIL
APPROVAL
2011-10-19
A
First release
HL.Lu
2012-05-09
B
Adding patent information.
HL.Lu
2015-7-2
C
Update part selection, output specifications, general specifications, analog voltage
margining, output voltage adjustment using the POWER MANAGEMENT BUS, POWER
MANAGEMENT BUS adjustable overcurrent warning, POWER MANAGEMENT BUS
adjustable input undervoltage lockout, measuring output current using the POWER
MANAGEMENT BUS, summary of supported POWER MANAGEMENT BUS commands,
example application circuit, packaging details, MSL rating, add Digital Interface
Specifications.
2017-05-31
D
Update the version.
2021-06-09
AE
Add object ID. Delete safety considerations about VDE information.
XF.Jiang
HL.Lu
XF.Jiang
NUCLEAR AND MEDICAL APPLICATIONS - Products are not designed or intended for use as critical components in life support systems,
equipment used in hazardous environments, or nuclear control systems.
TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on
the date manufactured. Specifications are subject to change without notice.
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