SQE48T20050-PGB0

The new high temperature SQE48-Series of DC-DC converter provides a high efficiency single output in a physical package that is only 62% the size of the industry-standard quarter-brick. Specifically designed for operation in systems that have limited airflow and increased ambient temperatures, the SQE48-Series of converters utilizes the same pinout and functionality of the industry-standard quarter-bricks. The SQE48-Series of provides thermal performance in high temperature environments that exceeds most competitors' 20A quarter-bricks. This performance is accomplished through the use of patented/patent-pending circuits, packaging, and processing techniques to achieve ultra-high efficiency, excellent thermal management, and a low-body profile. Low-body profile and the preclusion of heat sinks minimize airflow shadowing, thus enhancing cooling for downstream devices. The use of 100% automation for assembly, coupled with advanced electronic circuits, and thermal design, results in a product with extremely high reliability. The SQE48T20050 operates over an input voltage range of 36 to 75 VDC, and provides an output current up to 20 A with a standard output voltage of 5.0 VDC. The output can be trimmed from –20% to +10% of the nominal output voltage, thus providing outstanding design flexibility. With standard pinout and trim equations, the SQE48 converters are perfect drop-in replacements for the competing quarter-brick designs. Inclusion of this converter in new designs can result in significant board space and cost savings. The designer can expect reliability improvement over other available converters because of the SQE48-Series’ optimized thermal efficiency. • • • • • • • • • • • • • • • • • • 36-75 VDC Input; 5.0 VDC @ 20 A Output Industry-standard quarter-brick pinout On-board input differential LC-filter Startup into pre-biased load No minimum load required Weight: 0.72 oz [20.6 g] Withstands 100 V input transient for 100 ms Fixed-frequency operation Fully protected Latching and non-latching protection available Positive or negative logic ON/OFF option Remote output sense Output voltage trim range: +10%/−20% with industry-standard trim equations High reliability: MTBF = 13.19 million hours, calculated per Telcordia TR-332, Method I Case 1 Approved to the latest edition of the following standards: UL/CSA60950-1, IEC60950-1 and EN60950-1. Designed to meet Class B conducted emissions per FCC and EN55022 when used with external filter All materials meet UL94, V-0 flammability rating SQE48T20050 2 Conditions: TA = 25 ºC, Airflow = 300 LFM (1.5 m/s), Vin = 48 VDC, unless otherwise specified. PARAMETER NOTES MIN TYP MAX UNITS 0 80 VDC Operating Ambient Temperature -40 85 °C Storage Temperature -55 125 °C Absolute Maximum Ratings Input Voltage Continuous Input Characteristics Operating Input Voltage Range 36 48 75 VDC Input Under Voltage Lockout (Non-latching) Turn-on Threshold 33 34 35 VDC Turn-off Threshold 31 32 33 VDC Input Voltage Transient 100 ms 100 VDC Isolation Characteristics 2250 VDC 1500 VDC I/O Isolation Models with the special “K” feature 190 pF 1200 pF Isolation Capacitance Models with the special “K” feature Isolation Resistance 10 MΩ Feature Characteristics Switching Frequency Output Voltage Trim Remote Sense Range1 Compensation1 460 Industry-std. equations -20 Percent of VOUT(NOM) kHz +10 % +10 % Latching or Non-latching 117 122 127 % Non-latching (Models with special “K” feature) 120 125 130 % Output Overvoltage Protection Overtemperature Shutdown FET Non-latching Peak Back-drive Output Current (Sinking current from external source) during startup into pre-biased output Back-drive Output Current (Sinking Current from external source) Auto-Restart Period (For non-latching option) 120 °C Peak amplitude 1 ADC Peak duration 50 µs Converter Off; external voltage 5 VDC 10 Applies to all protection features 200 ms 4 ms Turn-On Time 30 mADC Converter Off (logic low) -20 0.8 VDC Converter On (logic high) 2.4 20 VDC Converter Off (logic high) 2.4 20 VDC Converter On (logic low) -20 0.8 VDC ON/OFF Control (Positive Logic) ON/OFF Control (Negative Logic) 1 Vout can be increased up to 10% via the sense leads or up to 10% via the trim function. However, the total output voltage trim from all sources should not exceed 10% of VOUT (NOM), in order to ensure specified operation of overvoltage protection circuitry. tech.support@psbel.com SQE48T20050 3 Input Characteristics Maximum Input Current 20 ADC, 5.0 VDC Out @ 36 VDC In 3.1 ADC Input Stand-by Current Vin = 48 V, converter disabled 2 mADC Input No Load Current (0 load on the output) Vin = 48 V, converter enabled 40 mADC Input Reflected-Ripple Current 20 MHz bandwidth 8 mAPK-PK Input Voltage Ripple Rejection 120Hz 75 dB Output Characteristics Output Voltage Set Point (no load) 4.950 5.000 5.050 VDC ±2 ±5 mV Output Regulation Over Line Over Load ±2 Output Voltage Range Over line, load and temperature (-40ºC to 85ºC) Output Ripple and Noise (20MHz bandwidth) Full load + 10 μF tantalum + 1 μF ceramic External Load Capacitance Plus full load (resistive) Output Current Range 4.925 50 0 22 25 ±5 mV 5.075 VDC 100 mVPK-PK 10,000 μF 20 ADC 29 ADC Current Limit Inception Non-latching Peak Short-Circuit Current For non-latching option, Short = 10 mΩ 25 RMS Short-Circuit Current For non-latching option 4 Co = 1 μF ceramic 40 mV Co = 470 μF POS + 1 μF ceramic 180 mV 20 µs 100* mV 100% Load 91 % 50% Load 92.5 % A 8 Arms Dynamic Response Load Change 50%-100%-50%, di/dt = 0.1 A/µs di/dt = 5 A/µs Settling Time to 1% Load Change 50%-75%-50%, di/dt = 2.5 A/µs Co = 2x100 μF TA + 1 μF ceramic Efficiency These power converters have been designed to be stable with no external capacitors when used in low inductance input and output circuits. In many applications, the inductance associated with the distribution from the power source to the input of the converter can affect the stability of the converter. The addition of a 33 µF electrolytic capacitor with an ESR < 1  across the input helps ensure stability of the converter. In many applications, the user has to use decoupling capacitance at the load. The power converter will exhibit stable operation with external load capacitance up to 10,000 µF on 5.0 V output. Additionally, see the EMC section of this data sheet for discussion of other external components which may be required for control of conducted emissions. Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2020 Bel Power Solutions & Protection BCD.00633_AB2 Asia-Pacific +86 755 298 85888 SQE48T20050 4 The ON/OFF pin is used to turn the power converter on or off remotely via a system signal. There are two remote control options available, positive and negative logic with both referenced to Vin(-). A typical connection is shown in Fig. A. Vin (+) SQE48 Converter (Top View) Vout (+) SENSE (+) ON/OFF Vin TRIM Rload SENSE (-) Vin (-) Vout (-) CONTROL INPUT Figure A. Circuit configuration for ON/OFF function. The positive logic version turns on when the ON/OFF pin is at a logic high and turns off when at a logic low. The converter is on when the ON/OFF pin is left open. See the Electrical Specifications for logic high/low definitions. The negative logic version turns on when the pin is at a logic low and turns off when the pin is at a logic high. The ON/OFF pin can be hard wired directly to Vin(-) to enable automatic power up of the converter without the need of an external control signal. The ON/OFF pin is internally pulled up to 5 V through a resistor. A properly de-bounced mechanical switch, open-collector transistor, or FET can be used to drive the input of the ON/OFF pin. The device must be capable of sinking up to 0.2 mA at a low level voltage of  0.8 V. An external voltage source (±20 V maximum) may be connected directly to the ON/OFF input, in which case it must be capable of sourcing or sinking up to 1 mA depending on the signal polarity. See the Startup Information section for system timing waveforms associated with use of the ON/OFF pin. The remote sense feature of the converter compensates for voltage drops occurring between the output pins of the converter and the load. The SENSE(-) (Pin 5) and SENSE(+) (Pin 7) pins should be connected at the load or at the point where regulation is required (see Fig. B). SQE48 Converter Vin (+) (Top View) Rw Vout (+) 100 SENSE (+) Vin ON/OFF TRIM Rload SENSE (-) 10 Vin (-) Vout (-) Rw Figure B. Remote sense circuit configuration. CAUTION If remote sensing is not utilized, the SENSE(-) pin must be connected to the Vout(-) pin (Pin 4), and the SENSE(+) pin must be connected to the Vout(+) pin (Pin 8) to ensure the converter will regulate at the specified output voltage. If these connections are not made, the converter will deliver an output voltage that is slightly higher than the specified data sheet value. Because the sense leads carry minimal current, large traces on the end-user board are not required. However, sense traces should be run side by side and located close to a ground plane to minimize system noise and ensure optimum performance. The converter’s output overvoltage protection (OVP) senses the voltage across Vout(+) and Vout(-), and not across the sense lines, so the resistance (and resulting voltage drop) between the output pins of the converter and the load should be minimized to prevent unwanted triggering of the OVP. tech.support@psbel.com SQE48T20050 5 When utilizing the remote sense feature, care must be taken not to exceed the maximum allowable output power capability of the converter, which is equal to the product of the nominal output voltage and the allowable output current for the given conditions. When using remote sense, the output voltage at the converter can be increased by as much as 10% above the nominal rating in order to maintain the required voltage across the load. Therefore, the designer must, if necessary, decrease the maximum current (originally obtained from the derating curves) by the same percentage to ensure the converter’s actual output power remains at or below the maximum allowable output power. The output voltage can be adjusted up 10% or down 20% relative to the rated output voltage by the addition of an externally connected resistor. The TRIM pin should be left open if trimming is not being used. To minimize noise pickup, a 0.1 µF capacitor is connected internally between the TRIM and SENSE(-) pins. To increase the output voltage, refer to Fig. C. A trim resistor, RT-INCR, should be connected between the TRIM (Pin 6) and SENSE(+) (Pin 7), with a value of: RT−INCR = 5.11(100 + Δ)VO−NOM − 626 − 10.22 1.225Δ [k] where, RT−INCR = Required value of trim-up resistor k] VO−NOM = Nominal value of output voltage [V] Δ= (VO -REQ − VO -NOM ) X 100 VO -NOM [%] VO−REQ = Desired (trimmed) output voltage [V]. Vin (+) SQE48 Converter Vout (+) (Top View) SENSE (+) Vin ON/OFF R T-INCR TRIM Rload SENSE (-) Vin (-) Vout (-) Figure C. Configuration for increasing output voltage. When trimming up, care must be taken not to exceed the converter‘s maximum allowable output power. See the previous section for a complete discussion of this requirement. To decrease the output voltage (Fig. D), a trim resistor, RT-DECR, should be connected between the TRIM (Pin 6) and SENSE(-) (Pin 5), with a value of: RT−DECR = 511 − 10.22 Δ [k] where, RT−DECR = Required value of trim-down resistor [k] and Δ is defined above. Note: The above equations for calculation of trim resistor values match those typically used in conventional industry-standard quarter-bricks and one-eighth bricks. Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2020 Bel Power Solutions & Protection BCD.00633_AB2 Asia-Pacific +86 755 298 85888 SQE48T20050 6 Vin (+) SQE48 Converter Vout (+) (Top View) SENSE (+) Vin ON/OFF TRIM Rload RT-DECR SENSE (-) Vin (-) Vout (-) Figure D. Configuration for decreasing output voltage. Trimming/sensing beyond 110% of the rated output voltage is not an acceptable design practice, as this condition could cause unwanted triggering of the output overvoltage protection (OVP) circuit. The designer should ensure that the difference between the voltages across the converter’s output pins and its sense pins does not exceed 10% of VOUT(nom), or: [VOUT(+) − VOUT(−)] − [VSENSE(+) − VSENSE(−)]  VO - NOM X 10% [V] This equation is applicable for any condition of output sensing and/or output trim. Input undervoltage lockout is standard with this converter. The converter will shut down when the input voltage drops below a pre-determined voltage. The input voltage must be typically 34 V for the converter to turn on. Once the converter has been turned on, it will shut off when the input voltage drops typically below 32 V. This feature is beneficial in preventing deep discharging of batteries used in telecom applications. The converter is protected against overcurrent or short circuit conditions. Upon sensing an over-current condition, the converter will switch to constant current operation and thereby begin to reduce output voltage. When the output voltage drops below 60% of its nominal value, the converter will shut down (Fig. 15). Once the converter has shut down, it will attempt to restart nominally every 200 ms with a typical 3-5% duty cycle (Fig. 16). The attempted restart will continue indefinitely until the overload or short circuit conditions are removed or the output voltage rises above 60% of its nominal value. Once the output current is brought back into its specified range, the converter automatically exits the hiccup mode and continues normal operation. For implementations where latching is required, a “Latching” option (L) is available for short circuit and OVP protections. The converters with the latching feature will latch off if either event occurs. The converter will attempt to restart after either the input voltage is removed and reapplied OR the ON/OFF pin is cycled. The converter will shut down if the output voltage across Vout(+) (Pin 8) and Vout(-) (Pin 4) exceeds the threshold of the OVP circuitry. The OVP circuitry contains its own reference, independent of the output voltage regulation loop. Once the converter has shut down, it will attempt to restart every 200 ms until the OVP condition is removed. For implementations where latching is required, a “Latching” option (L) is available for short circuit and OVP protections. Converters with the latching feature will latch off if either event occurs. The converter will attempt to restart after either the input voltage is removed and reapplied OR the ON/OFF pin is cycled. tech.support@psbel.com SQE48T20050 7 The converter will shut down under an overtemperature condition to protect itself from overheating caused by operation outside the thermal derating curves, or operation in abnormal conditions such as system fan failure. Converter with the non-latching option will automatically restart after it has cooled to a safe operating temperature. The converters meet North American and International safety regulatory requirements per UL60950 and EN60950. Basic Insulation is provided between input and output. To comply with safety agencies’ requirements, an input line fuse must be used external to the converter. A 5 A fuse is recommended for use with this product. All SQE converters are UL approved for maximum fuse rating of 15 A. To protect a group of converters with a single fuse, the rating can be increased from the recommended values above. EMC requirements must be met at the end-product system level, as no specific standards dedicated to EMC characteristics of board mounted component dc-dc converters exist. However, Bel Power Solutions tests its converters to several system level standards, primary of which is the more stringent EN55022, Information technology equipment - Radio disturbance characteristics - Limits and methods of measurement. An effective internal LC differential filter significantly reduces input reflected ripple current (Fig. 13), and improves EMC. With the addition of a simple external filter, all versions of the SQE48-Series of converters pass the requirements of Class B conducted emissions per EN55022 and FCC requirements. Please contact Bel Power Solutions Applications Engineering for details of this testing. The converter has been characterized for many operational aspects, to include thermal derating (maximum load current as a function of ambient temperature and airflow) for vertical and horizontal mounting, efficiency, startup and shutdown parameters, output ripple and noise, transient response to load step-change, overload, and short circuit. The figures are numbered as Fig. x.y, where x indicates the different output voltages, and y associates with specific plots (y = 1 for the vertical thermal derating …). For example, Fig. x.1 will refer to the vertical thermal derating for all the output voltages in general. The following pages contain specific plots or waveforms associated with the converter. Additional comments for specific data are provided below. All data presented were taken with the converter soldered to a test board, specifically a 0.060” thick printed wiring board (PWB) with four layers. The top and bottom layers were not metalized. The two inner layers, comprised of two-ounce copper, were used to provide traces for connectivity to the converter. The lack of metalization on the outer layers as well as the limited thermal connection ensured that heat transfer from the converter to the PWB was minimized. This provides a worst-case but consistent scenario for thermal derating purposes. All measurements requiring airflow were made in the vertical and horizontal wind tunnel using Infrared (IR) thermography and thermocouples for thermometry. Ensuring components on the converter do not exceed their ratings is important to maintaining high reliability. If one anticipates operating the converter at or close to the maximum loads specified in the derating curves, it is prudent to check Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2020 Bel Power Solutions & Protection BCD.00633_AB2 Asia-Pacific +86 755 298 85888 SQE48T20050 8 actual operating temperatures in the application. Thermographic imaging is preferable; if this capability is not available, then thermocouples may be used. The use of AWG #40 gauge thermocouples is recommended to ensure measurement accuracy. Careful routing of the thermocouple leads will further minimize measurement error. Refer to Fig. E for optimum measuring thermocouple location. Fig. E: Location of the thermocouple for thermal testing. Load current vs. ambient temperature and airflow rates are given in Fig. 1 and Fig. 2. Ambient temperature was varied between 25 °C and 85 °C, with airflow rates from 30 to 500 LFM (0.15 to 2.5 m/s), for vertical and horizontal converter mounting. For each set of conditions, the maximum load current was defined as the lowest of: (i) The output current at which any FET junction temperature does not exceed a maximum specified temperature (120 °C) as indicated by the thermographic image, or (ii) The temperature of the transformer does not exceed 120 °C, or (iii) The nominal rating of the converter (20 A). During normal operation, derating curves with maximum FET temperature less or equal to 120 °C should not be exceeded. Temperature at the thermocouple location shown in Fig. E should not exceed 120 °C in order to operate inside the derating curves. Efficiency vs. load current plot is shown in Fig. 3 for ambient temperature of 25 ºC, airflow rate of 300 LFM (1.5 m/s), vertical converter mounting, and input voltages of 36 V, 48 V, and 72 V. Also, a plot of efficiency vs. load current, as a function of ambient temperature with Vin = 48 V, airflow rate of 200 LFM (1 m/s) with vertical mounting is shown in Fig. 4. Fig. 5 shows the power dissipation vs. load current plot for Ta = 25 ºC, airflow rate of 300 LFM (1.5 m/s) with vertical mounting and input voltages of 36 V, 48 V, and 72 V. Also, a plot of power dissipation vs. load current, as a function of ambient temperature with Vin = 48 V, airflow rate of 200 LFM (1m/s) with vertical mounting is shown in Fig. 6. Output voltage waveforms, during the turn-on transient using the ON/OFF pin for full rated load currents (resistive load) are shown without and with external load capacitance in Fig. 7 and Fig. 8, respectively. Fig. 11 shows the output voltage ripple waveform, measured at full rated load current with a 10 µF tantalum and 1µF ceramic capacitor across the output. Note that all output voltage waveforms are measured across a 1 µF ceramic capacitor. The input reflected ripple current waveforms are obtained using the test setup shown in Fig. 12. The corresponding waveforms are shown in Fig. 13 and Fig. 14. tech.support@psbel.com SQE48T20050 Scenario #1: Initial Startup From Bulk Supply ON/OFF function enabled, converter started via application of VIN. See Figure. F. Comments ON/OFF pin is ON; system front end power is toggled on, VIN to converter begins to rise. t1 VIN crosses Undervoltage Lockout protection circuit threshold; converter enabled. t2 Converter begins to respond to turn-on command (converter turn-on delay). t3 Converter VOUT reaches 100% of nominal value. For this example, the total converter startup time (t3 - t1) is typically 4 ms. 9 VIN Time t0 ON/OFF STATE OFF ON VOUT t0 t1 t2 t t3 Figure F. Startup scenario #1. Scenario #2: Initial Startup Using ON/OFF Pin With VIN previously powered, converter started via ON/OFF pin. See Figure. G. Time t0 t1 t2 Comments VINPUT at nominal value. Arbitrary time when ON/OFF pin is enabled (converter enabled). End of converter turn-on delay. VIN ON/OFF STATE OFF t3 Converter VOUT reaches 100% of nominal value. For this example, the total converter startup time (t3- t1) is typically 4 ms. ON VOUT t0 t1 t2 t t3 Figure G. Startup scenario #2. Scenario #3: Turn-off and Restart Using ON/OFF Pin With VIN previously powered, converter is disabled and then enabled via ON/OFF pin. See Figure. H. Comments VIN and VOUT are at nominal values; ON/OFF pin ON. ON/OFF pin arbitrarily disabled; converter output falls to zero; turn-on inhibit delay period (200 ms typical) is initiated, and ON/OFF pin action is internally inhibited. t2 ON/OFF pin is externally re-enabled. If (t2 - t1) ≤ 200 ms, external action of ON/OFF pin is locked out by startup inhibit timer. If (t2 - t1) > 200 ms, ON/OFF pin action is internally enabled. t3 Turn-on inhibit delay period ends. If ON/OFF pin is ON, converter begins turn-on; if off, converter awaits ON/OFF pin ON signal; see Figure. G. t4 End of converter turn-on delay. t5 Converter VOUT reaches 100% of nominal value. For the condition (t2-t1) ≤ 200 ms, the total converter startup time (t5-t2) is typically 204 ms. For (t2-t1) > 200 ms, startup will be typically 4 ms after release of ON/OFF pin. V IN Time t0 t1 ON/OFF STATE 200 ms OFF ON V OUT t0 t1 t2 t3 t4 t5 t Figure H. Startup scenario #3. Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2020 Bel Power Solutions & Protection BCD.00633_AB2 Asia-Pacific +86 755 298 85888 SQE48T20050 25 25 20 20 Load Current [Adc] Load Current [Adc] 10 15 500 LFM (2.5 m/s) 400 LFM (2.0 m/s) 300 LFM (1.5 m/s) 200 LFM (1.0 m/s) 100 LFM (0.5 m/s) NC - 30 LFM (0.15 m/s) 10 5 15 500 LFM (2.5 m/s) 400 LFM (2.0 m/s) 300 LFM (1.5 m/s) 200 LFM (1.0 m/s) 100 LFM (0.5 m/s) NC - 30 LFM (0.15 m/s) 10 5 0 0 20 30 40 50 60 70 80 90 20 30 Ambient Temperature [°C] 50 70 80 90 Fig. 2: Available load current vs. ambient air temperature and airflow rates for converter with G height pins mounted horizontally with air flowing from pin 1 to pin 3 and maximum FET temperature  120 C, Vin = 48 V. 0.95 0.90 0.90 Efficiency 0.95 0.85 72 V 48 V 36 V 0.80 0.85 70 C 55 C 40 C 0.80 0.75 0.75 0 4 8 12 16 20 24 0 4 8 Load Current [Adc] 12 16 20 24 Load Current [Adc] Fig. 3: Efficiency vs. load current and input voltage for converter mounted vertically with air flowing from pin 1 to pin 3 at a rate of 300 LFM (1.5 m/s) and Ta = 25 C. Fig. 4: Efficiency vs. load current and ambient temperature for converter mounted vertically with Vin = 48 V and air flowing from pin 1 to pin 3 at a rate of 200 LFM (1.0 m/s). 15.00 15.00 12.00 12.00 Power Dissipation [W] Power Dissipation [W] 60 Ambient Temperature [°C] Fig. 1: Available load current vs. ambient air temperature and airflow rates for converter with G height pins mounted vertically with air flowing from pin 1 to pin 3 and maximum FET temperature  120 C, Vin = 48 V. Note: NC – Natural convection Efficiency 40 9.00 6.00 72 V 48 V 36 V 3.00 9.00 6.00 70 C 55 C 40 C 3.00 0.00 0.00 0 4 8 12 16 20 24 Load Current [Adc] Fig. 5: Power dissipation vs. load current and input voltage for converter mounted vertically with air flowing from pin 1 to pin 3 at a rate of 300 LFM (1.5 m/s) and Ta = 25 C. 0 4 8 12 16 20 24 Load Current [Adc] Fig. 6: Power dissipation vs. load current and ambient temperature for converter mounted vertically with Vin = 48 V and air flowing from pin 1 to pin 3 at a rate of 200 LFM (1.0 m/s). tech.support@psbel.com SQE48T20050 11 Fig. 7: Turn-on transient at full rated load current (resistive) with no output capacitor at Vin = 48 V, triggered via ON/OFF pin. Top trace: ON/OFF signal (5 V/div.). Bottom trace: output voltage (2 V/div.). Time scale: 2 ms/div. Fig. 8: Turn-on transient at full rated load current (resistive) plus 10,000 µF at Vin = 48 V, triggered via ON/OFF pin. Top trace: ON/OFF signal (5 V/div.). Bottom trace: output voltage (2 V/div.). Time scale: 2 ms/div. Fig. 9: Output voltage response to load current step-change (10 A – 20 A – 10 A) at Vin = 48 V. Top trace: output voltage (100 mV/div.). Bottom trace: load current (10 A/div.). Current slew rate: 0.1 A/s. Co = 1 F ceramic. Time scale: 0.2 ms/div. Fig. 10: Output voltage response to load current step-change (10 A – 20 A – 10 A) at Vin = 48 V. Top trace: output voltage (100 mV/div.). Bottom trace: load current (10 A/div.). Current slew rate: 5 A/s. Co = 470 F POS + 1 F ceramic. Time scale: 0.2 ms/div. Fig. 10a*: Output voltage response to load current step-change (10 A – 15 A – 10 A) at Vin = 48 V. Top trace: output voltage (50 mV/div.). Bottom trace: load current (2 A/div.). Current slew rate: 2.5 A/s. Co = 2x100 F TA + 1 F ceramic. Time scale: 5 s/div. Fig. 10b*: Output voltage response to load current step-change (10 A – 15 A – 10 A) at Vin = 48 V. Top trace: output voltage (50 mV/div.). Bottom trace: load current (2 A/div.). Current slew rate: 2.5 A/s. Co = 2x100 F TA + 1 F ceramic. Time scale: 5 s/div. * For models with the special feature “K”. Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2020 Bel Power Solutions & Protection BCD.00633_AB2 Asia-Pacific +86 755 298 85888 SQE48T20050 12 iS 10 H source inductance Vsource iC 33 F ESR < 1  electrolytic capacitor SQE48 DC-DC Converter 1 F ceramic Vout capacitor Fig. 11: Output voltage ripple (20 mV/div.) at full rated load current into a resistive load with Co = 10 F tantalum + 1 F ceramic and Vin = 48 V. Time scale: 1 s/div. Fig. 12: Test Setup for measuring input reflected ripple currents, ic and is. Fig. 13: Input reflected ripple current, ic (100 mA/div.), measured at input terminals at full rated load current and Vin = 48 V. Refer to Fig. 12 for test setup. Time scale: 1 s/div. Fig. 14: Input reflected ripple current, is (10 mA/div.), measured through 10 H at the source at full rated load current and Vin = 48 V. Refer to Fig. 12 for test setup. Time scale: 1 s/div. tech.support@psbel.com SQE48T20050 13 2.300±0.020 [58.42±0.51] 0.896±0.020 [22.76±0.51] 8 7 6 5 4 1 0.300 [7.62] TOP VIEW 2 0.300 [7.62] 3 0.600 [15.24] 0.450 [11.43] 0.300 [7.62] 0.150 [3.81] 0.148 [3.76] 2.000 [50.80] 0.148±0.020 [3.76±0.51] 0.140±0.020 [3.56±0.51] SQE48T Pinout (Through-Hole) SQE48T Platform Notes • • • • • • Height Option HT (Max. Height) CL (Min. Clearance) G 0.407 [10.34] 0.035 [0.89] All dimensions are in inches [mm] Pins 1-3 and 5-7 are Ø 0.040” [1.02] with Ø 0.078” [1.98] shoulder Pins 4 and 8 are Ø 0.062” [1.57] without shoulder Pin Material & Finish: Brass Alloy 360 Matte Tin over Nickel Converter Weight: 0.72 oz [20.6 g] Pin Option Product Series Input Voltage Mounting Scheme Rated Load Current Output Voltage SQE 48 T 20 050 1/8th Brick Format 36-75 V T Throughhole 20  20 A PL Pin Length ±0.005 [±0.13] A 0.188 [4.77] B 0.145 [3.68] 050  5.0 V - PAD/PIN CONNECTIONS Pad/Pin # Function 1 Vin (+) 2 ON/OFF 3 Vin (-) 4 Vout (-) 5 SENSE(-) 6 TRIM 7 SENSE(+) 8 Vout (+) ON/OFF Logic Maximum Height [HT] Pin Length [PL] Special Features N G B 0 G 0  STD (NonLatching) No Suffix  RoHS lead-solderexemption compliant L Latching Option G  RoHS compliant for all six substances N Negative P Positive Through hole Through hole G  0.407” A  0.188” B  0.145” RoHS The example above describes P/N SQE48T20050-NGB0G: 36-75 V input, through-hole mounting, 20 A @ 5.0 V output, negative ON/OFF logic, a maximum height of 0.407”, and a through the board pin length of 0.145”, standard (non-latching), and RoHS compliant. Please consult factory for the complete list of available options. Europe, Middle East +353 61 225 977 North America +1 408 785 5200 © 2020 Bel Power Solutions & Protection BCD.00633_AB2 Asia-Pacific +86 755 298 85888 SQE48T20050 14 PAD/PIN CONNECTIONS Pad/Pin # Function 1 Vin (+) 2 ON/OFF 3 Vin (-) 8 1 7 TOP VIEW 2 6 5 3 4 SIDE VIEW 4 Vout (-) 5 SENSE(-) 6 TRIM 7 SENSE(+) 8 Vout (+) SQE48T Pinout (Through-Hole) SQE48T Platform NotesPAD/PIN CONNECTIONS PIN # FUNCTION (+) • All dimensions are in1 inchesV [mm] 2 ON/OFF • Pins 1-3 and 5-7 are Ø 0.040” [1.02] V (-) 3 with Ø 0.078” [1.98] 4shoulder V (-) SENSE (-) 5 • Pins 4 and 8 are Ø 0.062” [1.57] TRIM without shoulder 76 SENSE (+) V (+) • Pin Material: CDA 145 8 • Pin Finish: Tin over Nickel • Converter Weight: 0.72 oz [20.6 g] in in out Height HT SQE48T Platform Notes: Option (Max. Height) - All dimensions are in inches [mm] - Pins Ø0.040" [9.5] [1.02] D*1-3 and 5-7 are0.374 with Ø0.078 [1.98] shoulder - Pins 4 and 8 are Ø.062" [1.57] without shoulder - Pin Material: CDA 145 - Connector Finish: Tin over Nickel CL (Min. Clearance) 0.045 [1.14] Pin Option PL Pin Length ±0.005 [±0.13] A 0.188 [4.77] B 0.145 [3.68] out ID CODE Product Series InputA Voltage B SQE 48 1/8th Brick Format 36-75 V +0.41 +0.00 +0.13 CL +0.016 HT +0.000 PL +0.005 -0.038 -0.97 -0.000 -0.00 -0.005 -0.13 CLEARENCE OFF USER BOARD 0.035 Mounting Scheme 0.035 T Rated [0.89] Load [0.89] Current 20 MAXIMUM MODULE HEIGHT PIN INTERCONNECT LENGTH Maximum 0.407 [10.34] ON/OFF 0.188 [4.77] Output Height Voltage Logic 0.407 [10.34] 0.145 [3.68] [HT] 050 - T 20  050  Through20 A 5.0INVINCHES ALL DIMENSIONS ARE hole N N Negative P Positive DIMENSIONS IN BRACKETS [ ] ARE IN MILLIMETERS Pin Length [PL] D B Special Features RoHS K G 0  STD Through hole Through hole D*  0.374” A  0.188” B  0.145” K Overall Max. Height of 9.5 mm No Suffix  RoHS lead-solderexemption compliant G  RoHS compliant for all six substances The example above describes P/N SQE48T20050-NDAKG: 36-75 V input, through-hole mounting, 20 A @ 5.0 V output, negative ON/OFF logic, a maximum height of 0.374”, and a through the board pin length of 0.188”, standard (non-latching), and RoHS compliant. Please consult factory for the complete list of available options. * Models have an overall maximum height of 0.374” [9.5 mm] and a standard non-latching feature. NUCLEAR AND MEDICAL APPLICATIONS - Products are not designed or intended for use as critical components in life support systems, equipment used in hazardous environments, or nuclear control systems. TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on the date manufactured. Specifications are subject to change without notice. tech.support@psbel.com