O
F
LI
FE
The new high performance 20 A SQL48T20033 DC-DC converter provides a
high efficiency single output, in a 1/8th brick package that is only 62% the size
of the industry-standard quarter-brick. Specifically designed for operation in
systems that have limited airflow and increased ambient temperatures, the
SQL48T20033 converter utilizes the same pin-out and Input / Output
functionality of the industry-standard quarter-bricks. In addition, a heat
spreader feature is available (-xxxBx suffix) that provides an effective thermal
interface for coldplate and heat sinking options.
The SQL48T20033 converter thermal performance is accomplished through
the use of patent-pending circuits, packaging, and processing techniques to
achieve ultra-high efficiency, excellent thermal management, and a low-body
profile.
Low-body profile and the preclusion of heat sinks minimize impedance to
system airflow, thus enhancing cooling for both upstream and downstream
devices. The use of 100% automation for assembly, coupled with advanced
electronic circuits and thermal design, results in a product with extremely high
reliability.
Operating from a wide-range 36-75 V input, the SQL48T20033 converter
provides a fully regulated 3.3 V output voltage. The outputs can be trimmed
from –20% to +10% of the nominal output voltage, thus providing outstanding
design flexibility. Employing a standard power pin-out, the SQL48T20033
converter is an ideal drop-in replacement for existing high current quarterbrick designs. Inclusion of this converter in a new design can result in
significant board space and cost savings. The designer can expect reliability
improvement over other available converters because of the SQL48T20033’s
optimized thermal efficiency.
EN
D
36-75 VDC Input; 3.3 VDC @ 20 A Output with no derating up to 70°C
(@ 48 Vin, ≥ 100 LFM)
Withstands 100 V input transient for 100ms
Fixed-frequency operation
On-board input differential LC-filter
Start-up into pre-biased load
No minimum load required
Fully protected (OTP, OCP, OVP, UVLO)
Remote output sense
Positive or negative logic ON/OFF option
Output voltage trim range: +10%/−20% with Industry Standard trim
equations
Low height of 0.375” (9.5 mm)
Approved to the latest edition of the following standards:
UL/CSA60950-1, IEC60950-1 and EN60950-1.
All materials meet UL94, V-0 flammability rating
RoHS lead-free solder and lead-solder-exempted products are
available
Telecommunications, Data communications / processing,
LAN/WAN, Servers, Workstations
SQL48T20033
2
Conditions: TA = 25 ºC, Airflow = 300 LFM (1.5 m/s), Vin = 48 VDC, unless otherwise specified.
PARAMETER
CONDITIONS / DESCRIPTION
MIN
Continuous
-0.3
TYP
MAX
UNITS
80
VDC
100
VDC
Absolute Maximum Ratings
Input Voltage
Transient (100ms)
(See Derating Curves)
Ambient (TA)
-40
85
°C
Component (TC)
-40
120
°C
FE
Operating Temperature
1
Baseplate (TB)
Storage Temperature
Isolation Characteristics
I/O Isolation
-40
105
°C
-55
125
°C
2,250
270
LI
Isolation Capacitance
Isolation Resistance
Input to Baseplate
Output to Baseplate
Feature Characteristics
MΩ
1,500
VDC
1,500
VDC
F
Remote Sense Compensation
Industry-std. equations
2, 4
Output Overvoltage Protection
Over Temperature Shutdown
Auto-Restart Period
Turn-On Time from Vin
Non-latching
120
kHz
+10
%
+10
%
140
%
Non-latching
125
°C
Applies to all protection features
200
ms
Time from UVLO to Vo = 90%VOUT(NOM)
Resistive Load
Time from ON to Vo = 90% VOUT(NOM)
Resistive Load
5
20
ms
5
20
ms
Converter Off (logic low)
-20
0.8
VDC
Converter On (logic high)
2.4
20
VDC
Converter Off (logic high)
2.4
20
VDC
Converter On (logic low)
-20
0.8
VDC
EN
D
Turn-On Time from ON/OFF Control
-20
Percent of VOUT(NOM)
O
Output Voltage Trim Range
445
3
pF
10
Switching Frequency
2
VDC
ON/OFF Control (Positive Logic option)
ON/OFF Control (Negative Logic option)
Input Characteristics
Operating Input Voltage Range
Turn-on Threshold
36
48
75
VDC
31.5
33.5
35.5
VDC
30
32
34
VDC
2.0
VDC
Input Undervoltage Lockout
Turn-off Threshold
Lockout Hysteresis Voltage
1.0
1
Reference Figure H for component (TC and TB) locations.
Vout can be increased up to 10% via the sense leads or up to 10% via the trim function. However, the total output voltage trim-up
should not exceed 10% of VOUT(NOM).
3
Trim equations are defined within this document’s “Operations” section.
2
4
When using remote sense a minimum of 100uF ceramic capacitance should be mounted between Vout(+) and Vout(-) close to pin 8
and pin 4.
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SQL48T20033
3
Maximum Input Current
3.3 Vout, Full Load @ 36 VDC In
Input Standby Current
Vin = 48V, converter disabled
Input No Load Current (No load on the output)
Vin = 48V, converter enabled
2.1
ADC
5
mADC
45
200
mADC
400
mAPK-PK
150
mARMS
30
mAPK-PK
5
mARMS
Input Reflected-Ripple Current, ic
Vin = 48 V, 20 MHz bandwidth,
Full Load (resistive) (See Fig. J)
Input Reflected-Ripple Current, iS
Input Voltage Ripple Rejection
@ 120 Hz
60
dB
Output Voltage Setpoint
VIN = 48 V, IOUT = 0 Amps, TA = 25°C
Over Line: IOUT = 20Amps, TA = 25°C
Output Regulation
Over Load: VIN=48V, , TA=25°C
Over line, load and temperature
Output Ripple and Noise – 20 MHz bandwidth
IOUT = 20 Amps,
CEXT =10 µF tantalum + 1 µF ceramic
External Load Capacitance
Plus Full Load (resistive)
1
Output Current Range
Current Limit Inception
3.25
VDC
±2
±17
mV
±2
±17
mV
3.4
VDC
100
mVPK-PK
30
15
CEXT
ESR
30
VRMS
0
1
10,000
µF
mOhm
0
20
ADC
22
26
30
30
F
Pk:
3.35
3.2
Non-latching
Short-Circuit Current
3.3
LI
Output Voltage Range
FE
Output Characteristics
ADC
Amps
Non-latching Short = 10 mΩ
RMS:
O
Dynamic Response
Load Change 50%-75%-50% of IOUT Max
Settling Time to 1% of VOUT
Efficiency
di/dt = 0.1 A/μs
CEXT = 10µF tantalum + 1µF ceramic
di/dt = 1.0 A/μs
CEXT = 470µF POS + 1µF ceramic
48V
EN
D
@ 100% Load
@ 50% Load
5
IN, TA = 25°C, 300LFM (1.5 m/s)
10
ARMS
±50
mV
±100
mV
20
µs
91
%
90
%
Environmental
Operating Humidity
RH (Non-condensing)
95
%
Storage Humidity
RH (Non-condensing)
95
%
Mechanical
No Baseplate
21.4
g
With Baseplate
32.9
g
Weight
Reliability
MTBF
Telcordia SR-332, Method I Case 1 50%
electrical stress, 40°C components
23.6
MHrs
EMI and Regulatory Compliance
Conducted Emissions
CISPR 22 B with external EMI filter network
Safely Agency Approvals
UL60950-1/CSA60950-1, EN60950-1 and
IEC60950-1
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SQL48T20033
4
FE
These power converters have been designed to be stable with no external capacitors when used in low inductance input
and output circuits. In many applications, the inductance associated with the distribution from the power source to the input
of the converter can affect the stability of the converter. The addition of a 33 μF electrolytic capacitor with an
ESR 1mΩ.
The ON/OFF pin is used to turn the power converter on or off remotely via a system signal. There are two remote control
options available, positive and negative logic, with both referenced to Vin(-). A typical connection is shown in Fig. A.
Vin (+)
SQL
48 Converter
Vout (+)
(Top View )
Vin
(+)
TRIM
Rload
LI
ON /OFF
SENSE
SENSE (-)
Vin (- )
CONTROL
INPUT
Vout (-)
Figure A. Circuit configuration for ON/OFF function.
EN
D
O
F
The positive logic version turns on when the ON/OFF pin is at logic high and turns off when at logic low. The converter is on
when the ON/OFF pin is left open. See the Electrical Specifications for logic high/low definitions.
The negative logic version turns on when the pin is at logic low and turns off when the pin is at logic high. The ON/OFF pin
can be hard wired directly to Vin(-) to enable automatic power up of the converter without the need of an external control
signal.
The ON/OFF pin is internally pulled up to 5 VDC through a resistor. A properly de-bounced mechanical switch, open-collector
transistor, or FET can be used to drive the input of the ON/OFF pin. The device must be capable of sinking up to 0.2 mA at
a low level voltage of ≤ 0.8 V. An external voltage source (±20 V maximum) may be connected directly to the ON/OFF input,
in which case it must be capable of sourcing or sinking up to 1 mA depending on the signal polarity. See the Startup
Information section for system timing waveforms associated with use of the ON/OFF pin.
The remote sense feature of the converter compensates for voltage drops occurring between the output pins of the converter
and the load. The SENSE(-) (Pin 5) and SENSE(+) ( Pin 7) pins should be connected at the load or at the point where regulation
is required (see Fig. B). When using remote sense a minimum of 100uF ceramic capacitance should be mounted between
Vout(+) and Vout(-) close to the pin 8 and pin 4.
Vin
Vin (+)
SQL
48 Converter
Vout (+)
(Top View )
Rw
100
SENSE (+)
ON /OFF
TRIM
SENSE
Rload
(-)
10
Vin (- )
Vout (-)
Rw
Figure B. Remote sense circuit configuration.
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SQL48T20033
5
CAUTION
If remote sensing is not utilized, the SENSE(-) pin must be connected to the Vout(-) pin, and the SENSE(+) pin must be
connected to the Vout(+) pin to ensure the converter will regulate at the specified output voltage. If these connections are
not made, the converter will deliver an output voltage that is slightly higher than the specified data sheet value.
FE
Because the sense leads carry minimal current, large traces on the end-user board are not required. However, sense traces
should be run side by side and located close to a ground plane to minimize system noise and ensure optimum performance.
The converter’s output overvoltage protection (OVP) circuitry senses the voltage across Vout(+) and Vout(-), and not across
the sense lines, so the resistance (and resulting voltage drop) between the output pins of the converter and the load should
be minimized to prevent unwanted triggering of the OVP.
When utilizing the remote sense feature, care must be taken not to exceed the maximum allowable output power capability
of the converter, which is equal to the product of the nominal output voltage and the allowable output current for the given
conditions.
When using remote sense, the output voltage at the converter can be increased by as much as 10% above the nominal
rating in order to maintain the required voltage across the load. Therefore, the designer must, if necessary, decrease the
maximum current (originally obtained from the derating curves) by the same percentage to ensure the converter’s actual
output power remains at or below the maximum allowable output power.
LI
The output voltage can be adjusted up 10% or down 20% relative to the rated output voltage by the addition of an externally
connected resistor. For output voltage 3.3V, trim-up to 10% is guaranteed at Vin ≥ 40V, and to 8% at Vin ≥ 36V.
The TRIM pin should be left open if trimming is not being used. To minimize noise pickup, a 0.1 µF capacitor is connected
internally between the TRIM and SENSE(-) pins.
To increase the output voltage (Fig. C) a trim resistor,
RT-INCR, should be connected between the TRIM (Pin 6) and SENSE(+) (Pin 7), with a value of
5.11(100 Δ)V ONOM 626
10.22
1.225Δ
F
RTINCR
where,
[kΩ],
O
RTINCR Required value of trim-up resistor kΩ]
VONOM Nominal value of output voltage [V]
(VO-REQ VO-NOM )
X 100
VO -NOM
EN
D
Δ
[%]
VOREQ
Desired (trimmed) output voltage [V].
When trimming up, care must be taken not to exceed the converter‘s maximum allowable output power. See the previous
section for a complete discussion of this requirement.
Vin
Vin (+)
SQL
48 Converter
Vout (+)
(Top View )
SENSE (+)
ON /OFF
R T -INCR
TRIM
Rload
SENSE (-)
Vin (-)
Vout (-)
Figure C. Configuration for increasing output voltage.
To decrease the output voltage (Fig. D), a trim resistor, RT-DECR, should be connected between the TRIM (Pin 6) and SENSE(-)
(Pin 5), with a value of:
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SQL48T20033
6
RTDECR
511
10.22
|Δ|
[kΩ]
where,
RTDECR Required value of trim-down resistor [kΩ] and Δ
is defined above.
Note:
The above equations for calculation of trim resistor values match those typically used in conventional industry-standard quarter-bricks,
eighth-bricks and sixteenth-brick models.
SQL
48 Converter
(Top View )
ON /OFF
Vin
Vout (+)
FE
Vin (+)
SENSE (+)
TRIM
Rload
R T -DECR
SENSE (-)
Vout (-)
LI
Vin (-)
Figure D. Configuration for decreasing output voltage.
Trimming/sensing beyond 110% of the rated output voltage is not an acceptable design practice, as this condition could
cause unwanted triggering of the output overvoltage protection (OVP) circuit. The designer should ensure that the difference
between the voltages across the converter’s output pins and its sense pins does not exceed 10% of VOUT(nom), or:
F
[VOUT() VOUT()] [VSENSE() VSENSE()] VO - NOM X 10% [V]
EN
D
O
This equation is applicable for any condition of output sensing and/or output trim.
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SQL48T20033
7
Input undervoltage lockout is standard with this converter. The converter will shut down when the input voltage drops below
a pre-determined voltage.
The input voltage must be typically 34 V for the converter to turn on. Once the converter has been turned on, it will shut off
when the input voltage drops typically below 32 V. This feature is beneficial in preventing deep discharging of batteries used
in telecom applications.
FE
All output circuit protection features are non-latching and operate in a “hiccup” mode. After an output protection event
occurs, the converter will be turned off, and held off for approximately 200 ms after which, the protection circuit will reset
and the converter will attempt to restart. If the fault is still present, the converter will repeat the above action. Once the fault
is removed, the converter will start normally
F
LI
The converter is protected against overcurrent or short circuit conditions. Upon sensing an overcurrent condition, the
converter will shut down.
Once this occurs, it will enter hiccup mode and attempt to restart approximately every 200 ms with an approximate duty
cycle of 9% for overcurrent and 3% for short circuit. The attempted restart will continue indefinitely until the overload or
short circuit condition is removed.
Once the output current is brought back into its specified range, the converter automatically exits the hiccup mode and
resumes normal operation.
O
The converter will shut down if the output voltage across Vout(+) and Vout(-) exceeds the threshold of the OVP circuitry. The
OVP circuitry contains its own reference, independent of the output voltage regulation loop. Once the converter has shut
down, it will attempt to restart every 200 ms until the OVP condition is removed.
EN
D
The converter will shut down under an overtemperature condition to protect itself from overheating caused by operation
outside the thermal derating curves, or operation in abnormal conditions such as system fan failure. The converter will
automatically restart after it has cooled to a safe operating temperature.
The converters are safety approved to UL/CSA609501, EN60950-1, and IEC60950-1. Basic Insulation is provided between
input and output.
The converters have no internal fuse. To comply with safety agencies requirements, an input line fuse must be used external
to the converter. A 5-A fuse is recommended for use with this product. The SQL converter is UL approved for a maximum
fuse rating of 15 A.
EMC requirements must be met at the end-product system level, as no specific standards dedicated to EMC characteristics
of board mounted component dcdc converters exist. However, Power-One tests its converters to several system level
standards, primary of which is the more stringent EN55022, Information technology equipment - Radio disturbance
characteristics - Limits and methods of measurement.
An effective internal LC differential filter significantly reduces input reflected ripple current, and improves EMC.
With the addition of a simple external filter, the SQL48T20033 converter will pass the requirements of Class B conducted
emissions per EN55022 and FCC requirements. Refer to Figures 17 – 18 for typical performance with external filter.
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SQL48T20033
8
FE
Scenario #1: Initial Startup From Bulk Supply
ON/OFF function enabled, converter started via application of VIN.
See Fig. E.
Time
Comments
t0
ON/OFF pin is ON; system front-end power is toggled
on, VIN to converter begins to rise.
t1
VIN crosses undervoltage Lockout protection circuit
threshold; converter enabled.
t2
Converter begins to respond to turn-on command
(converter turn-on delay).
t3
Converter VOUT reaches 100% of nominal value.
For this example, the total converter startup time (t3- t1) is typically
4 ms.
LI
Figure E. Startup scenario #1.
O
F
Scenario #2: Initial Startup Using ON/OFF Pin With VIN
previously powered, converter started via ON/OFF pin. See
Fig. F.
Time
Comments
t0
VINPUT at nominal value.
t1
Arbitrary time when ON/OFF pin is enabled
(converter enabled).
t2
End of converter turn-on delay.
t3
Converter VOUT reaches 100% of nominal value.
For this example, the total converter startup time (t3- t1) is typically
5 ms.
EN
D
Figure F. Startup scenario #2.
Scenario #3: Turn-off and Restart Using ON/OFF Pin With VIN
previously powered, converter is disabled and then enabled via
ON/OFF pin. See Fig. G.
Time
Comments
t0
VIN and VOUT are at nominal values; ON/OFF pin ON.
t1
ON/OFF pin arbitrarily disabled; converter output falls
to zero; turn-on inhibit delay period (200 ms typical) is
initiated, and ON/OFF pin action is internally inhibited.
t2
ON/OFF pin is externally re-enabled.
If (t2- t1) ≤ 200 ms, external action of ON/OFF
pin is locked out by startup inhibit timer.
If (t2- t1) > 200 ms, ON/OFF pin action is
internally enabled.
t3
Turn-on inhibit delay period ends. If ON/OFF pin is
ON, converter begins turn-on; if off, converter awaits
ON/OFF pin ON signal; see Figure F. t4
End of
converter turn-on delay.
t5
Converter VOUT reaches 100% of nominal value.
For the condition, (t2- t1) ≤ 200 ms, the total converter startup time
(t5- t1) is typically 205 ms. For (t2- t1) > 200 ms, startup will be
typically 5 ms after release of ON/OFF pin.
V IN
ON/OFF
STATE
200 ms
OFF
ON
V OUT
t0
t1
t2
t3 t4
t5
Figure G. Startup scenario #3.
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t
SQL48T20033
9
The converter has been characterized for many operational aspects, to include thermal derating (maximum load current as
a function of ambient temperature and airflow), efficiency, startup and shutdown parameters, output ripple and noise,
transient response to load step-change, overcurrent, and short circuit.
The following pages contain specific plots or waveforms associated with the converter. Additional comments for specific
data are provided below.
F
LI
FE
All data presented were taken with the converter soldered to a test board, specifically a 0.060” thick printed wiring board
(PWB) with four layers. The top and bottom layers were not metalized. The two inner layers, comprised of two-ounce copper,
were used to provide traces for connectivity to the converter.
The lack of metallization on the outer layers as well as the limited thermal connection ensured that heat transfer from the
converter to the PWB was minimized. This provides a worst-case but consistent scenario for thermal derating purposes.
All measurements requiring airflow were made in the vertical and/or horizontal wind tunnel using Infrared(IR) thermography
and thermocouples for thermometry.
Ensuring components on the converter do not exceed their ratings is important to maintaining high reliability. If one
anticipates operating the converter at or close to the maximum loads specified in the derating curves, it is prudent to check
actual operating temperatures in the application. Thermographic imaging is preferable; if this capability is not available, then
thermocouples may be used. The use of AWG #36 gauge thermocouples is recommended to ensure measurement accuracy.
Careful routing of the thermocouple leads will further minimize measurement error. Refer to Figure H for the optimum
measuring thermocouple location.
EN
D
O
AIR COOLED
Load current vs. ambient temperature and airflow rates are given in Figures 1 - 3. Ambient temperature was varied between
25°C and 85°C, with airflow rates from 30 to 500LFM (0.15 to 2.5m/s).
For each set of conditions, the maximum load current was defined as the lowest of:
(i)
The output current at which any FET junction temperature does not exceed a maximum temperature of 120°C as
indicated by the thermal measurement, or
(ii)
The output current at which the temperature at the thermocouple locations TC do not exceed 120°C. (Fig. H)
(iii)
The nominal rating of the converter (20A).
Thermocouple Area
(TB)
Thermocouples
(Tc)
Fig. H: Location of the thermocouple for thermal testing.
BASEPLATE w/ COLDPLATE
The maximum load current rating vs. baseplate temperature is provided in Figure 4. The baseplate temperature (T B) was
maintained ≤ 105°C, with an airflow rate of ≤ 30LFM (≤ 0.15m/s) and ambient temperature ≤ 85°C. Thermocouple
measurements (in Fig. H) were recorded with TC ≤ 120°C. The user should design for TB ≤ 105°C.
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Efficiency vs. load current is showing in Figure 5 for ambient temperature (TA) of 25ºC, airflow rate of 300LFM (1.5m/s) with
vertical mounting and input voltages of 36V, 48V, 65V and 75V. Also, a plot of efficiency vs. load current, as a function of
ambient temperature with Vin = 48V, airflow rate of 200 LFM (1 m/s) with vertical mounting is shown in Figure. 6.
FE
Power dissipation vs. load current is showing in Figure 7 for TA=25ºC, airflow rate of 300LFM (1.5m/s) with vertical mounting
and input voltages of 36V, 48V, 65V and 75V. Also, a plot of power dissipation vs. load current, as a function of ambient
temperature with Vin = 48V, airflow rate of 200 LFM (1m/s) with vertical mounting is shown in Figure. 8.
Output voltage waveforms, during the turn-on transient using the ON/OFF pin for full rated load currents (resistive load) are
shown with and without external load capacitance in Figure 9 and Figure 10.
LI
Figure 13 shows the output voltage ripple waveform, measured at full rated load current with a 10µF tantalum and a 1µF
ceramic capacitor across the output. Note that all output voltage waveforms are measured across the 1µF ceramic capacitor.
The input reflected-ripple current waveforms are obtained using the test setup shown in Fig. J. The corresponding waveforms
are shown in Figure 14, and Figure 15.
10 µH
source
inductance
33 µF
ESR < 1 Ω
electrolytic
capacitor
SQL
48
DC - DC
Converter
O
V source
iC
F
iS
1 µF
Ceramic
+ 10 µF
Tantalum
Capacitor
Vout
EN
D
Fig. J: Test setup for measuring input reflected ripple currents, ic and is.
25
20
15
500 LFM (2.5 m/s )
400 LFM (2.0 m/s )
300 LFM (1.5 m/s )
200 LFM (1.0 m/s )
100 LFM (0.5 m/s )
30 LFM (0.15 m/s)
10
5
0
20
30
40
50
60
70
80
90
Ambient Temperature [°C]
Ambient Temperature [°C]
Figure 1. Available load current vs. ambient air temperature
and airflow rates for SQL48T20033 converter mounted
vertically with air flowing from pin 3 to pin 1,
Tc temperatures ≤ 120 °C, Vin = 48 V.
Figure 2. Power derating of SQL48T20033 converter with
baseplate option and 0.25” tall horizontal-fin heatsink.
(Conditions: same as Figure 1)
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SQL48T20033
11
25
20
15
10
0
20
FE
5
30
40
50
60
70
80
90
100
110
Baseplate Temperature [°C]
Ambient Temperature [°C]
Figure 4. Coldplate cooling: Power derating of SQL48T20033xxxBx converter with baseplate option and coldplate cooling.
No thermal derating required. (Conditions: Air velocity ≤ 30LFM
(≤ 0.15m/s), Vin = 48 V, TB ≤ 105°C)
O
F
LI
Figure 3. Power derating of SQL48T20033 converter with
baseplate option and 0.91” tall horizontal-fin heatsink.
(Conditions: same as Figure 1) No thermal derating required.
Figure 6. Efficiency vs. load current and ambient temperature
for converter mounted vertically with Vin = 48 V and air flowing
from pin 3 to pin 1 at a rate of 200 LFM (1.0 m/s).
Figure 7. Power dissipation vs. load current and input voltage
converter mounted vertically with air flowing from pin 3 to pin 1
at 300 LFM (1.5 m/s) and TA = 25°C.
Figure 8. Power dissipation vs. load current and ambient
temperature for converter mounted vertically with Vin = 48V
and air flowing from pin 3 to pin 1 at a rate of 200 LFM
(1.0m/s).
EN
D
Figure 5. Efficiency vs. load current and input voltage converter
mounted vertically with air flowing from pin 3 to pin 1 at 300
LFM (1.5 m/s) and TA = 25°C.
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FE
12
Figure 10. Turn-on waveform at full rated load current
(resistive) with 10uF tant. + 1uF cer. output capacitor at
Vin=48V, triggered via ON/OFF pin. Top trace: ON/OFF signal
(5V/div.). Bottom trace: Output voltage (1V/div.).
Time scale: 2 ms/div.
O
F
LI
Figure 9. Turn-on waveform at full rated load current (resistive)
with 10,000 uF output capacitor at Vin=48V, triggered via
ON/OFF pin. Top trace: ON/OFF signal (5V/div.). Bottom trace:
Output voltage (1V/div.). Time scale: 2 ms/div.
EN
D
Figure 11. Output voltage response to load current step
change (10A – 15A – 10A) at Vin = 48 V. Top trace: output
voltage (50mV/div.) Bottom: load current (5 A/div.). Current
slew rate: 0.1 A/μs. Time scale: 200 μs /div.
Co = 10μF tantalum + 1μF ceramic
Figure 13. Output voltage ripple (20 mV/div.) at full rated load
current into a resistive load with Co = 10μF tantalum + 1μF
ceramic and Vin = 48V. Time scale: 1μs/div.
Figure 12. Output voltage response to load current step
change (10A – 15A – 10A) at Vin = 48 V. Top trace: output
voltage (50mV/div.) Bottom: load current (5 A/div.). Current
slew rate: 1 A/μs. Time scale: 200 μs /div.
Co = 470μF POS + 1μF ceramic
Figure 14. Input reflected-ripple current, is (10 mA/div.),
measured through 10 μH at the source at full rated load current
and Vin = 48 V. Refer to Fig. J for test setup.
Time scale: 1μs/div.
tech.support@psbel.com
SQL48T20033
FE
13
Figure 15. Input reflected ripple-current, ic (100 mA/div.),
measured at input terminals at full rated load current and Vin =
48 V. Refer to Fig. J for test setup. Time scale: 1 μs/div.
Figure 16. Load current (top trace, 20 A/div., 100 ms/div.) into a
10 mΩ short circuit during restart, at Vin = 48 V. Bottom trace
(20 A/div., 5 ms/div.) is an expansion of the on-time portion of
the top trace.
COMP.
DES.
LI
DESCRIPTION
C1
C3
L1
F
C4, C5
C2
3 x 1uF, 100V Ceramic
Capacitor
33uF, 100V Electrolytic
Capacitor
F4810 Bel Power Solutions
Input Filter
2200pF Ceramic Capacitor
Not Assembled
EN
D
O
Figure 17. Typical input EMI filter circuit to attenuate conducted emissions.
Figure 18. Input conducted emissions measurement (Typ.) of SQL48T20033
Conditions: VIN = 48VDC, IOUT = 20 AMPS
Europe, Middle East
+353 61 225 977
North America
+1 408 785 5200
© 2016 Bel Power Solutions & Protection
BCD.00730_AB
Asia-Pacific
+86 755 298 85888
SQL48T20033
14
2.300±0.020 [58.42±0.51]
0.896±0.020 [22.76±0.51]
8
7
6
5
4
1
0.300 [7.62]
TOP VIEW
2
0.300 [7.62]
3
0.600 [15.24]
0.450 [11.43]
0.300 [7.62]
0.150 [3.81]
0.148 [3.76]
2.000 [50.80]
0.148±0.020 [3.76±0.51]
FE
0.140±0.020 [3.56±0.51]
LI
SQL48T Pinout (Through-Hole)
0.375” [9.53] max
EN
D
O
SQL48T Platform Notes
•
All dimensions are in inches [mm]
•
Pins 1-3, 5-7 are Ø 0.040” [1.02]
with Ø 0.076” [1.93] shoulder
•
Pins 4 and 8 are Ø 0.062” [1.57]
with are Ø 0.096” [2.44] shoulder
•
Pin Material: Brass Alloy 360
•
Pin Finish: Tin over Nickel
Minimum
Clearance
[CL]
F
Height [HT]
D
0.500”+/-0.020
[12.70+/-0.51]
Pin
Option
0.040”
[1.02]
0.040”
[1.02]
PL
Pin Length
±0.005 [±0.13]
A
0.188 [4.78]
B
0.145 [3.68]
Special
Features
0
B
PAD/PIN CONNECTIONS
Pad/Pin #
Function
1
Vin (+)
2
ON/OFF
3
Vin (-)
4
Vout (-)
5
SENSE(-)
6
TRIM
7
SENSE(+)
8
Vout (+)
HEAT SPREADER INTERFACE INFORMATION
tech.support@psbel.com
SQL48T20033
15
Input
Voltage
Mounting
Scheme
Rated
Current
Output
Voltage
SQL
48
T
20
033
Maximum
Height
[HT]
Pin
Length
[PL]
Special Features
N
D
A
B
N⇒
Negative
1/8th
Brick
Format
-
ON/OFF
Logic
36-75 V
T⇒
Throughhole
20 ⇒
20 ADC
033 ⇒
3.3V
D⇒
Through hole
0.375” for -xxx0x
A⇒
0 ⇒ 2250 VDC
isolation
RoHS
G
No Suffix ⇒
RoHS leadsolderexemption
compliant
0.188”
P⇒
Positive
for -xxxBx0.520”
B⇒
B ⇒ Baseplate
option + ‘0’ above
G ⇒ RoHS
compliant for
all six
substances
FE
Product
Series
0.145”
EN
D
O
F
LI
The example above describes P/N SQL48T20033-NDABG: 36-75V input, through-hole, 20 A @ 3.3 V output, negative ON/OFF logic, maximum
height of 0.52”, 0.188” pin length, 2250 VDC isolation, integral heat spreader (Baseplate) and RoHS compliant for all 6 substances. Consult factory
for availability of other options.
NUCLEAR AND MEDICAL APPLICATIONS - Products are not designed or intended for use as critical components in life support systems,
equipment used in hazardous environments, or nuclear control systems.
TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on
the date manufactured. Specifications are subject to change without notice.
Europe, Middle East
+353 61 225 977
North America
+1 408 785 5200
© 2016 Bel Power Solutions & Protection
BCD.00730_AB
Asia-Pacific
+86 755 298 85888
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