ZY2160G-R1

ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output Member of the Applications • Low voltage, high density systems with Intermediate Bus Architectures (IBA) • Point-of-load regulators for high performance DSP, FPGA, ASIC, and microprocessor applications • Industrial computing, servers, and storage • Broadband, networking, optical, and wireless communications systems • Active memory bus terminators Benefits • Integrates digital power conversion with intelligent power management • Eliminates the need for external power management components and communication bus • Completely programmable via pin strapping and one external resistor • One part that covers all applications • Reduces board space, system cost and complexity, and time to market Family Features • RoHS lead free and lead-solder-exempt products are available • Wide input voltage range: 8V–14V • High continuous output current: 60A • Wide programmable output voltage range: 0.5V– 2.75V • Active digital current share • Output voltage margining • Overcurrent and overtemperature protections • Overvoltage and undervoltage protections, and Power Good signal tracking the output voltage setpoint • Tracking during turn-on and turn-off with guaranteed slew rates • Sequenced and cascaded modes of operation • Single-wire line for frequency synchronization between multiple POLs • Programmable feedback loop compensation • Differential output voltage sense • Enable control • Flexible fault management and propagation • Start-up into the load pre-biased up to 100% • Current sink capability • Real time current measurements, monitoring, and reporting • Industry standard size through-hole single-in-line package: 2.4”x0.55” • Low height of 1.1” • Wide operating temperature range: 0 to 70ºC • UL 60950-1/CSA 22.2 No. 60950-1-07 Second Edition, IEC 60950-1: 2005, and EN 60950-1:2006 Description Power-One’s point-of-load converters are recommended for use with regulated bus converters in an Intermediate Bus Architecture (IBA). The ZY2160 is an intelligent, fully programmable step-down point-of-load DC-DC module integrating digital power conversion and power management. The ZY2160 completely eliminates the need for external components for sequencing, tracking, protection, monitoring, and reporting. Performance parameters of the ZY2160 are programmable by pin strapping and an external resistor and can be changed by the user at any time during product development and service without a need for a communication bus. Reference Documents TM No-Bus POL Converters. Application Note ® Z-One POL Converters. Eutectic Solder Process Application Note ® Z-One POL Converters. Lead-Free Process Application Note ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com Page 1 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 1. Ordering Information ZY 21 60 y – Product family: Z-One Module Series: No-Bus POL Converter Output Current: 60A RoHS compliance: No suffix - RoHS compliant with Pb solder 1 exemption G - RoHS compliant for all six substances Dash zz 2 Packaging Option : R1 – 30 pcs Tray Q1 – 1 pc sample for evaluation only ______________________________________ 1 The solder exemption refers to all the restricted materials except lead in solder. These materials are Cadmium (Cd), Hexavalent chromium (Cr6+), Mercury (Hg), Polybrominated biphenyls (PBB), Polybrominated diphenylethers (PBDE), and Lead (Pb) used anywhere except in solder. 2 Packaging option is used only for ordering and not included in the part number printed on the POL converter label. Example: ZY2160G-R3: A 30-piece tray of RoHS compliant POL converters. Each POL converter is labeled ZY2160G. 2. Absolute Maximum Ratings Stresses in excess of the absolute maximum ratings may cause performance degradation, adversely affect longterm reliability, and cause permanent damage to the POL converter. 3. Parameter Conditions/Description Min Max Units Operating Temperature Controller Case Temperature -40 100 °C Input Voltage 250ms Transient 15 VDC Environmental and Mechanical Specifications Parameter Conditions/Description Min Nom Max Units Ambient Temperature Range 0 70 °C Storage Temperature (Ts) -55 125 °C Weight 33 grams Operating Vibration (sinusoidal) Frequency Range Magnitude Sweep Rate Repetitions in each axis (Min-Max-Min Sweep) 5 0.5 1 2 Non-Operating Shock (half sine) Acceleration Duration Number of shocks in each axis 50 11 10 G ms MTBF Calculated Per Telcordia Technologies SR-332 18.5 MHrs Peak Reflow Temperature ZY2160 Peak Reflow Temperature ZY2160G Lead Plating ZY2160 and ZY2160G 100% Matte Tin Moisture Sensitivity Level JEDEC J-STD-020C 3 ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com 500 245 Hz G oct/min sweeps 220 °C 260 °C Page 2 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 4. Electrical Specifications Specifications apply at the input voltage from 8V to 14V, output load from 0 to 60A, ambient temperature from 0°C to 70°C, output capacitance consisting of 110µF ceramic and 220µF tantalum, and the CCA=1 unless otherwise noted. 4.1 Input Specifications Parameter Conditions/Description Input voltage (VIN) Min Nom 8 Max Units 14 VDC Undervoltage Lockout Threshold Ramping Up Ramping Down 6.9 5.7 VDC VDC Input Current VIN=12V, POL is OFF 29 mADC Maximum Input Current VIN=8V, VOUT=2.1V 4.2 17.5 ADC Max Units 60 ADC 2.75 VDC Output Specifications Parameter Conditions/Description Output Current (IOUT) VIN MIN to VIN MAX 2 Output Voltage Range (VOUT) Programmable with a resistor between TRIM and MARGIN pins Default (no resistor) Min -40 Nom 1 0.5 0.5 VDC VIN=12V, IOUT=0.5*IOUT MAX, room temperature ±1.5% or 20mV whichever is greater %VOUT 3 VIN MIN to VIN MAX ±0.5 %VOUT 3 0 to IOUT MAX ±0.5 %VOUT Dynamic Regulation Peak Deviation Settling Time 50% - 75% - 50% load step Slew rate 1A/µs, COUT=660µF to 10% of peak deviation 330 100 mV µs Output Voltage Peak-to-Peak Ripple and Noise BW=20MHz Full Load VIN=12V, VOUT=0.75V VIN=12V, VOUT=1.0V VIN=12V, VOUT=1.8V VIN=12V, VOUT=2.5V 15 20 25 30 mV mV mV mV Efficiency FSW=500kHz Full Load Room temperature VIN=12V, VOUT=0.5V VIN=12V, VOUT=0.75V VIN=12V, VOUT=1.0V VIN=12V, VOUT=1.2V VIN=12V, VOUT=1.5V VIN=12V, VOUT=1.8V VIN=12V, VOUT=2.5V 78.8 82.3 85.5 87.4 89.3 90.6 92.5 % % % % % % % Temperature Coefficient VIN=12V, IOUT=0.5*IOUT MAX 50 ppm/°C Switching Frequency 3 phases combined Output Voltage Setpoint 3 Accuracy Line Regulation Load Regulation 450 500 550 1 kHz At the negative output current (bus terminator mode) efficiency of the ZY2160 degrades resulting in increased internal power dissipation. Maximum allowable negative current is limited to 40A. 2 ZY2160 is a step-down converter, thus the output voltage is always lower than the input voltage as show in Error! Reference source not found.. 3 Digital PWM has an inherent quantization uncertainty of ±6.25mV that is not included in the specified static regulation parameters. ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com Page 3 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 4.3 Protection Specifications Parameter Conditions/Description Min Nom Max Units Output Overcurrent Protection Type Non-Latching, 130ms period Threshold 140 Threshold Accuracy %IOUT -25 25 %IOCP.SET Output Overvoltage Protection Type Latching Threshold Follows the output voltage setpoint Threshold Accuracy Measured at VO.SET=2.5V Delay From instant when threshold is exceeded until the turn-off command is generated 130 1 -2 %VO.SET 2 %VOVP.SET μs 6 Output Undervoltage Protection Type Non-Latching, 130ms period Threshold Follows the output voltage setpoint Threshold Accuracy Measured at VO.SET=2.5V Delay From instant when threshold is exceeded until the turn-off command is generated 75 -2 %VO.SET 2 %VUVP.SET μs 6 Overtemperature Protection Type Non-Latching, 130ms period Turn Off Threshold Temperature is increasing 120 °C Turn On Threshold Temperature is decreasing after module was shut down by OTP 110 °C Threshold Accuracy -5 5 °C Delay From instant when threshold is exceeded until the turn-off command is generated High Logic VOUT is inside the PG window and stable VOUT is outside of the PG window or ramping up/down Lower Threshold Follows the output voltage setpoint 90 %VO.SET Upper Threshold Follows the output voltage setpoint 110 %VO.SET Delay From instant when threshold is exceeded until status of PG pin changes 6 μs Threshold Accuracy Measured at VO.SET=2.5V μs 6 Power Good Signal (PGOOD pin) N/A Low -2 2 ___________________ 1 Minimum OVP threshold is 1.0V ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com Page 4 of 14 %VO.SET ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 4.4 Feature Specifications Parameter Conditions/Description Min Nom Max Units Current Share (CS pin) Type Current Share Accuracy Active, Single Line IOUT MIN≥20%*IOUT NOM ±20 %IOUT Tracking Rising Slew Rate Proportional to SYNC frequency 0.1 V/ms Falling Slew Rate Proportional to SYNC frequency -0.5 V/ms Enable (EN pin) Positive (enables the output when EN pin is open or pulled high) EN Pin Polarity EN High Threshold 2.3 VDC EN Low Threshold 1.0 Open Circuit Voltage VDC 3.3 VDC Turn-On Delay From EN pin changing state to VOUT starting to ramp up 0 ms Turn-Off Delay From EN pin changing state to VOUT reaching 0V 11 ms Feedback Loop Compensation (CCA pin) CCA pin is open Recommended COUT/ESR range, combination of ceramic + tantalum 50/5 + 220/40 100/5 + 470/40 400/5 + 2000/20 µF/mΩ µF/mΩ CCA pin is connected to GND Recommended COUT/ESR range, ceramic 100/5 220/5 400/5 µF/mΩ +20 %IOUT Output Current Monitoring (CS pin) Output Current Monitoring Accuracy 30%*IOUT NOM < IOUT < IOUT NOM VIN=12V Conversion Ratio Duty Cycle of the negative pulse corresponding to 100% of nominal current -20 74 % Remote Voltage Sense (-VS and +VS pins) Type Differential Voltage Drop Compensation Between +VS and VOUT 300 mV Voltage Drop Compensation Between -VS and PGND 100 mV ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com Page 5 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 4.5 Signal Specifications Parameter Conditions/Description Min Nom Max Units VDD Internal supply voltage 3.15 3.3 3.45 V 0.3 x VDD V VDD + 0.5 V 0.45 x VDD V SYNC Line ViL_s LOW level input voltage -0.5 ViH_s HIGH level input voltage Vhyst_s Hysteresis of input Schmitt trigger IoL_s LOW level sink current V(SYNC)=0.5V 14 60 mA Ipu_s Pull-up current source V(SYNC)=0V 300 1000 μA Tr_s Maximum allowed rise time 10/90%VDD 300 ns Cnode_s Added node capacitance 10 pF Freq_s Clock frequency of external SYNC line 0.75 x VDD 0.25 x VDD 5 475 525 Tsynq Sync pulse duration 22 28 T0 Data=0 pulse duration 72 78 kHz % of clock cycle % of clock cycle Inputs: CCA, EN, IM Iup_x Pull-up current source V(X)=0 25 110 μA ViL_x LOW level input voltage -0.5 0.3 x VDD V ViH_x HIGH level input voltage 0.7 x VDD VDD+0.5 V Vhyst_x Hysteresis of input Schmitt trigger 0.1 x VDD 0.3 x VDD V RdnL_x External pull down resistance pin forced low 10 kΩ Power Good and OK Inputs/Outputs Iup_PG Pull-up current source V(PG)=0 25 110 μA Iup_OK Pull-up current source V(OK)=0 175 725 μA ViL_x LOW level input voltage -0.5 0.3 x VDD V ViH_x HIGH level input voltage 0.7 x VDD VDD+0.5 V Vhyst_x Hysteresis of input Schmitt trigger 0.1 x VDD 0.3 x VDD V IoL_x LOW level sink current at 0.5V 4 20 mA 0.84 3.10 mA -0.5 0.3 x VDD V VDD+0.5 V 0.45 x VDD V 60 mA 100 ns Current Share/Sense Bus Iup_CS Pull-up current source at V(CS)=0V ViL_CS LOW level input voltage ViH_CS HIGH level input voltage Vhyst_CS Hysteresis of input Schmitt trigger IoL_CS LOW level sink current V(CS)=0.5V Tr_CS Maximum allowed rise time 10/90% VDD ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com 0.75 x VDD 0.25 x VDD 14 Page 6 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 5. Typical Performance Characteristics Vo [V] 3.0 2.75 2.5 2.1 2.0 1.5 1.0 0.5 8.0 9.0 10.5 9.6 10.0 11.0 12.0 13.0 14.0 Vi [V] Figure 1. Output Voltage as a Function of Input Voltage Efficiency Curves 95 95 90 90 Efficiency, % Efficiency, % 5.1 85 80 85 80 Vo=0.75V Vo=1.0V Vo=1.8V Vo=2.5V Vo=1.2V 75 Vo=0.75V Vo=1.0V Vo=1.8V Vo=2.5V Vo=1.2V 75 0 10 20 30 40 50 60 Output Current, A 10 20 30 40 50 Output Current, A Figure 2. Efficiency vs. Load. Vin=9.6V ZD-01966 Rev. 1.3, 11-Oct-2011 0 www.power-one.com Figure 3. Efficiency vs. Load. Vin=12V Page 7 of 14 60 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 95 5.2 Turn-On Characteristics Efficiency, % 90 85 80 Vin=9.6V Vin=12V 75 0.5 1 1.5 Output Voltage, V 2 2.5 Figure 4. Efficiency vs. Output Voltage, Iout=60A 95 Efficiency, % 90 Figure 6. Tracking Turn-On. Vin=12V, Ch1 – V1, Ch2 – V2, Ch3 – V3 85 Vo=0.5V Vo=1.8V Vo=2.5V 5.3 Turn-Off Characteristics 80 75 8 9 10 11 Input Voltage, V 12 13 14 Figure 5. Efficiency vs. Input Voltage. Iout=60A Figure 7. Tracking Turn-Off Vin=12V, Ch1 – V1, Ch2 – V2, Ch3 – V3 ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com Page 8 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 5.4 Transient Response The pictures below show the deviation of the output voltage in response to the 50%-75%-50% step load at 1.0A/μs. In all tests the POL converter had a total of 660μF ceramic and tantalum capacitors connected across the output pins. The speed of the transient response was varied by selecting different CCA settings. Figure 9. Vin=12V, Vout=2.5V. CCA=0 Figure 8. Vin=12V, Vout=2.5V. CCA=1 5.5 Thermal Derating Curve 60 Load Current, A 50 40 0 LFM 100 LFM (0.5 m/s) 200 LFM (1 m/s) 300 LFM (1.5 m/s) 400 LFM (2 m/s) 500 LFM (2.5 m/s) 30 20 25 35 45 55 65 75 Ambient Temperature, C Figure 10. Thermal Derating Curves. Vin=12V, Vout=2.5V ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com Page 9 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 6. Typical Application IBV ENABLE CS SYNC TRIM OK CS PGOOD SYNC MARGIN OK PGOOD TRIM MARGIN EN EN VIN VIN VIN VIN POL2 POL4 22uF 22uF 4.7uF CCA +VS VOUT VOUT VOUT VOUT +VS VOUT VOUT VOUT VOUT GND GND GND GND GND GND -VS IM CS SYNC TRIM OK 220uF 47uF 47uF 22uF GND GND GND GND GND GND -VS IM Vo1 CS SYNC TRIM PGOOD Vo2 220uF 47uF 47uF 22uF OK PGOOD MARGIN MARGIN EN EN VIN VIN VIN VIN POL1 POL3 22uF 22uF 4.7uF 22uF 22uF 4.7uF CCA CCA +VS VOUT VOUT VOUT VOUT +VS VOUT VOUT VOUT VOUT IM 22uF 22uF 4.7uF CCA GND GND GND GND GND GND -VS 220uF 47uF 47uF 22uF IM GND GND GND GND GND GND -VS Vo3 220uF 47uF 47uF 22uF Figure 11. Complete Schematic of Application with Three Independent Outputs. Intermediate Bus Voltage is from 8V to 14V. In this application four POL converters are configured to deliver three independent output voltages. POL1 and POL2 are connected in parallel for increased output current. Output voltages are programmed with the resistors connected between TRIM and MARGIN pins of individual converters. POL1 is configured as a master (IM pin is grounded) and all other POL converters are synchronized to the switching frequency of POL1. All converters are controlled by the common ENABLE signal. Turn-on and turn-off processes of the system are illustrated by pictures in Figure 6 and Figure 7. ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com Page 10 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 7. Pin Assignments and Description Pin Name Pin Number Pin Type Buffer Type Pin Description OK 3 I/O PU Fault Status SYNC 5 I/O PU Frequency Synchronization Line PGOOD 4 I/O PU Power Good CS 6 I/O PU Current Share/Sense IM 16 I PU Master Mode CCA 15 I PU Compensation Coefficient Address MARGIN 14 A EN 9 I TRIM 1 A -VS 10 I A Negative Voltage Sense Connect to the negative point close to the load +VS 11 I A Positive Voltage Sense Connect to the positive point close to the load VOUT GND VIN 18, 20, 22,24 7, 8, 17, 19, 21, 23 12, 13 Output Voltage Margining PU Enable Output Voltage Trim P Output Voltage P Power Ground P Input Voltage Notes Connect to OK pin of other Z- POLs. Leave open, if not used Connect to SYNC pin of other Z-POLs or to an external clock generator Connect to CS pin of other Z-POLs connected in parallel Tie to GND to make the POL the clock master or leave open to synchronize to external clock Tie to GND for 0 or leave open for 1 To program the output voltage, connect a resistor between MARGIN and TRIM POL is ON when the pin is high or floating. POL is OFF when the pin is low or connected to GND To program the output voltage, connect a resistor between MARGIN and TRIM Legend: I=input, O=output, I/O=input/output, P=power, A=analog, PU=internal pull-up ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com Page 11 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 8. Safety The ZY2160 POL converters do not provide isolation from input to output. The input devices powering ZY2160 must provide relevant isolation requirements according to all IEC60950 based standards. Nevertheless, if the system using the converter needs to receive safety agency approval, certain rules must be followed in the design of the system. In particular, all of the creepage and clearance requirements of the end-use safety requirements must be observed. These requirements are included in UL60950 - CSA6095000 and EN60950, although specific applications may have other or additional requirements. The ZY2160 POL converters have no internal fuse. If required, the external fuse needs to be provided to protect the converter from catastrophic failure. Refer to the “Input Fuse Selection for DC/DC converters” application note on www.power-one.com for proper selection of the input fuse. Both input traces and the chassis ground trace (if applicable) must be capable of conducting a current of 1.5 times the value of the fuse without opening. The fuse must not be placed in the grounded input line. Abnormal and component failure tests were conducted with the POL input protected by a fastacting 32V, 25A, fuse. If a fuse rated greater than 25A is used, additional testing may be required. In order for the output of the ZY2160 POL converter to be considered as SELV (Safety Extra Low Voltage), according to all IEC60950 based standards, the input to the POL needs to be supplied by an isolated secondary source providing a SELV also. 9. 9.1 Pin and Feature Description OK, Fault Status The open drain input/output with the internal pull-up resistor. The POL converter pulls its OK pin low, if a fault occurs. Pulling low the OK input by an external circuitry turns off the POL converter. 9.2 SYNC, Frequency Synchronization Line The bidirectional input/output with the internal pull-up resistor. If the POL converter is configured as a master, the SYNC line propagates clock to other POL converters. If the POL converter is configured ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com as a slave, the internal clock recovery circuit synchronizes the POL converter to the clock of the SYNC line. 9.3 IM, Interleave Mode The input with the internal pull-up resistor. When the pin is left floating, the switching frequency is determined by an external clock applied to the SYNC pin. Pulling the IM pin low configures a POL converter as a master. The master determines the clock on the SYNC line. 9.4 PG, Power Good The open drain input/output with the internal pull-up resistor. The pin is pulled low by the POL converter, if the output voltage is outside of the window defined by the Power Good High and Low thresholds. Note: See the No-Bus Application Note for recommendations on PG deglitching. 9.5 CCA, Compensation Coefficient Address Inputs with internal pull-ups to select one of 2 sets of digital filter coefficients optimized for different characteristics of output capacitance. 9.6 CS, Current Share/Sense Bus The open drain digital input/output with the internal pull-up resistor. The duty cycle of the digital signal is proportional to the output current of the POL converter. External capacitive loading of the pin shall be avoided. 9.7 MARGIN, Output Voltage Margining The output of the 2V internal voltage reference that is used to program the output voltage of the POL converter. 9.8 TRIM, Output Voltage Trim The input of the TRIM comparator for the output voltage programming. The output voltage is programmed by a single resistor connected between MARGIN and TRIM pins. 9.9 EN, Enable The input with the internal pull-up resistor. The POL converter is turned off, when the pin is pulled low 9.10 –VS and +VS The differential voltage input of the POL converter feedback loop. Page 12 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output where RTRIM is the value of the trim resistor in kΩ and ΔV% is the absolute value of desired margining expressed in percents of the nominal output voltage. 10. Application Information 10.1 Output Voltage Programming Resistance of the trim resistor is determined from the equation below: RTRIM = 20 × (5.5 − VOUT ) , kΩ VOUT where VOUT is the desired output voltage in Volts. If the RTRIM is open or the TRIM pin is shorted to PGND, the VOUT=0.5V. During normal operation the resistors are removed from the circuit by the switches. The “Margining Down” switch is normally closed shorting the resistor RDOWN while the “Margining Up” switch is normally open disconnecting the resistor RUP. An alternative configuration of the margining circuit is shown in Figure 13. In the configuration both switches are normally open that may be advantageous in some implementations. 10.2 Output Voltage Margining Margining can be implemented by changing the resistance between the REF and TRIM pins. Margining Down Switch (normally closed) POL POL TRIM R DOWN R UP RDOWN Margining Down Switch (normally open) R TRIM TRIM GND In the schematic shown in Figure 12, the nominal output voltage is set with the trim resistor RTRIM calculated from the equation in the paragraph 10.1. Resistors RUP and RDOWN are added to margin the output voltage up and down respectively and determined from the equations below. 20 × RTRIM  5 × RTRIM − ∆V %  ×  , kΩ 20 + RTRIM  ∆V %  ∆V %   R DOWN = (20 + RTRIM ) ×   , kΩ  100 − ∆V %  ZD-01966 Rev. 1.3, 11-Oct-2011 GND Figure 13. Alternative Margining Configuration RUP and RDOWN for this configuration are determined from the following equations: Figure 12. Margining Configuration RUP = R TRIM R UP MARGIN Margining Up Switch (normally open) MARGIN Margining Up Switch (normally open) www.power-one.com RUP = 20 × RTRIM  5 × RTRIM − ∆V %  ×  , kΩ 20 + RTRIM  ∆V %  R DOWN = Caution: 20 × RTRIM  100 − ∆V %  ×  , kΩ 20 + RTRIM  ∆V %  Noise injected into the TRIM node may affect accuracy of the output voltage and stability of the POL converter. Always minimize the PCB trace length from the TRIM pin to external components to avoid noise pickup. TM Refer to No-Bus POL Converters. Application Note on www.power-one.com for more application information on this and other product features. Page 13 of 14 ZY2160 60A No-Bus POL Data Sheet 8V to 14V Input • 0.5V to 2.75V Output 11. Mechanical Drawings All Dimensions are in mm Tolerances: XX.X: ±0.1 XX.XX: ±0.05 Figure 14. Mechanical Drawing Figure 15. Recommended Footprint – Top View Notes: 1. NUCLEAR AND MEDICAL APPLICATIONS - Power-One products are not designed, intended for use in, or authorized for use as critical components in life support systems, equipment used in hazardous environments, or nuclear control systems without the express written consent of the respective divisional president of Power-One, Inc. 2. TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on the date manufactured. Specifications are subject to change without notice. ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com Page 14 of 14