LP2202

Preliminary Datasheet LP2202 250mA,Dual Channel Ultra-Fast CMOS LDO Regulator General Description The LP2202 is a dual channel, low noise, and low dropout regulator sourcing up to 250mA at each channel. The range of output voltage is from 1.2V to 3.6V by operating from 2.5V to 5.5V input. LP2202 offers 2% accuracy, extremely low dropout voltage (220mV @ 250mA), and extremely low ground current, only 25µA per LDO. The shutdown current is near zero current which is suitable for battery-power devices. Other features include current limiting, over temperature, output short circuit protection. LP2202 is short circuit thermal folded back protected. LP2202 lowers its OTP trip point from 165°C to 110°C when output short circuit occurs (VOUT < 0.4V) providing maximum safety to end users. LP2202 can operate stably with very small ceramic output capacitors, reducing required board space and component cost. LP2202 is available in fixed output voltages in the SOT-23-6 package. Features Wide Operating Voltage Ranges : 2.5V to 5.5V  Low-Noise for RF Application High PSRR 70dB at 1kHz No Noise Bypass Capacitor Required  Fast Response in Line/Load Transient TTL-Logic-Controlled Shutdown Input Dual LDO Outputs (300mA/300mA) High Output Accuracy 2% Ultra-low Quiescent Current 27uA Thermal Shutdown Protection Thermal Shutdown Protection Tiny SOT-23-6 and 8-Lead DFN Package RoHS Compliant and 100% Lead (Pb)-Free Applications CDMA/GSM Cellular Handsets Smart mobile phone Battery-Powered Equipment DSC Sensor Wireless Card Ordering Information LP2202 - □□ □□ □ F: Pb-Free Package Type B6: SOT23-6 Out1/Out2 Voltage Type 18/28: 1.8V/2.8V 25/28: 2.5V/2.8V 28/28: 2.8V/2.8V Pin Configurations Typical Application Circuit VIN 5 Vin LP2202 Vout2 1 1uF 4 3 EN1 EN2 Vout1 GND 6 2 1uF VOUT2 SOT23-6 (Top View) 1uF VOUT1 Marking Information Please see website. Chip Enable LP2202 – Ver. 1.0 Datasheet Dec.-2006 Page 1 of 8 Preliminary Functional Pin Description Pin No. 1 2 3 4 5 6 Datasheet LP2202 Pin Name VOUT2 GND EN2 EN1 VIN VOUT1 Pin Function Channel 2 Output Voltage Common Ground Chip Enable2 (Active High) Chip Enable1 (Active High) Supply Input Channel 1 Output Voltage Function Block Diagram LP2202 – Ver. 1.0 Datasheet Dec.-2006 Page 2 of 8 Preliminary Absolute Maximum Ratings Datasheet LP2202 Supply Input Voltage------------------------------------------------------------------------------------------------------6V Power Dissipation, PD @ TA = 25°C SOT23-6 ----------------------------------------------------------------------------------------------------455mW Package Thermal Resistance SOT23-6, θJA ----------------------------------------------------------------------------------------------------------220°C/W Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------------260°C Storage Temperature Range ----------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility HBM (Human Body Mode) -------------------------------------------------------------------------------------------2kV MM(Machine-Mode)-----------------------------------------------------------------------------------------------------200V Recommended Operating Conditions Operation Junction Temperature Range -----------------------------------------------------------−40°C to 125°C Operation Ambient TemperatureRange---------------------------------------------------------------−40°C to 85°C Electrical Characteristics (VIN = VOUT + 1V, CIN = COUT = 1µF, TA = 25° C, unless otherwise specified) Parameter Output Voltage Accuracy Current Limit Quiescent Current Symbol ΔVOUT ILIM IQ Test Conditions IOUT = 1mA RLOAD = 1Ω VEN ≥ 1.2V, IOUT = 0mA IOUT = 200mA, VOUT > Dropout Voltage VDROP 2.8V IOUT = 250mA, VOUT > 2.8V Line Regulation Load Regulation Standby Current EN Input Bias Current Logic-Low EN Threshold Voltage Logic-High Voltage Output Noise Voltage Power Supply Rejection Rate f = 100Hz f = 10kHz TSD PSRR COUT = 1µF, IOUT = 10mA VIH ΔVLINE ΔLOAD ISTBY IIBSD VIL VIN = (VOUT + 1V) to 5.5V, IOUT = 1mA 1mA < IOUT < 300mA VEN = GND, Shutdown VEN = GND or VIN VIN = 3V to 5.5V, Shutdown VIN = 3V to 5.5V, Start-Up 10Hz to 100kHz, IOUT = 200mA COUT = 1µF 1.2 100 −75 −65 165 dB °C uVRMS 0.01 0 Min −2 360 Typ -450 75 170 220 Max +2 700 110 200 mV 300 0.3 0.6 1 100 0.4 V % % μA nA Units % mA μA Thermal Shutdown Temperature LP2202 – Ver. 1.0 Datasheet Dec.-2006 Page 3 of 8 Preliminary Typical Operating Characteristics Datasheet LP2202 LP2202 – Ver. 1.0 Datasheet Dec.-2006 Page 4 of 8 Preliminary Datasheet LP2202 LP2202 – Ver. 1.0 Datasheet Dec.-2006 Page 5 of 8 Preliminary Datasheet LP2202 Start-up Function Enable Function Applications Information Like any low-dropout regulator, the external capacitors used with the LP2202 must be carefully selected for regulator stability and performance. Using a capacitor whose value is > 1µF on the LP2202 input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The LP2202 is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1µF with ESR is > 25mΩ on the LP2202 output ensures stability. The LP2202 still works well with output capacitor of other types due to the wide stable ESR range. Figure 1 shows the curves of allowable ESR range as a function of load current for various output capacitor values. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located not more than 0.5 inch from the VOUT pin of the LP2202 and returned to a clean analog ground. The LP2202 features an LDO regulator enable/disable function. To assure the LDO regulator will switch on, the EN turn on control level must be greater than 1.2 volts. The LDO regulator will go into the shutdown mode when the voltage on the EN pin falls below 0.4 volts. For to protecting the system, the LP2202 have a quick-discharge function. If the enable function is not needed in a specific application, it may be tied to VIN to keep the LDO regulator in a continuously on state. Thermal Considerations Thermal protection limits power dissipation in LP2202. When the operation junction temperature exceeds 165°C, the OTP circuit starts the thermal shutdown function turn the pass element off. The pass element turn on again after the junction temperature cools by 30°C. For continue operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is : PD = (VIN−VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) − TA ) /θJA Where TJ(MAX) is the maximum operation junction LP2202 – Ver. 1.0 Datasheet Dec.-2006 Page 6 of 8 Preliminary Datasheet temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of LP2202, where TJ(MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance (θJA is layout dependent) for SOT23-6 package is 250°C/W. PD(MAX) = (125°C−25°C) / 250 = 400mW (SOT23-6) PD(MAX) = (125°C−25°C) / 165 = 606mW The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. LP2202 LP2202 – Ver. 1.0 Datasheet Dec.-2006 Page 7 of 8 Preliminary Packaging Information Datasheet LP2202 LP2202 – Ver. 1.0 Datasheet Dec.-2006 Page 8 of 8