LNK3207P

LinkSwitch-TN2 Family Highly Energy Efficient Off-line Switcher IC with Integrated System Level Protection for Low Component-Count Power Supplies Product Highlights Highest Performance and Design Flexibility • • • • Supports buck, buck-boost and flyback topologies Excellent load and line regulation Selectable device current limit 66 kHz operation with accurate current limit • Allows the use of low-cost off-the-shelf inductors • Reduces size and cost of magnetics and output capacitor • Frequency jittering reduces EMI filter complexity • Pin-out simplifies PCB heat sinking FB + Wide Range High-Voltage DC Input D BP/M S + LinkSwitch-TN2 DC Output PI-7841-041816 Enhanced Safety and Reliability Features Figure 1. Typical Buck Converter Application (See Application Examples Section for Other Circuit Configurations). EcoSmart™– Extremely Energy Efficient Figure 2. Package Options. P: PDIP-8C, G: SMD-8C, D: SO-8C. • • • • • Auto-restart for short-circuit and open loop faults Output overvoltage protection (OVP) Line input overvoltage protection (OVL) Hysteretic over-temperature protection (OTP) Extended creepage between DRAIN pin and all other pins improves field reliability • 725 V MOSFET rating for excellent surge withstand • 900 V MOSFET rating series for industrial or extra safety margin • • • • Standby supply current VIN or VO < VIN 4. Optocoupler feedback - Accuracy only limited by reference choice - Low cost non-safety rated optocoupler - No pre-load required 5. Fail-safe – output is not subjected to input voltage if the internal power MOSFET fails 6. Minimum no-load consumption Table 2 (cont). Common Circuit Configurations using LinkSwitch-TN2. LinkSwitch-TN2 Layout Considerations In the buck or buck-boost converter configuration, since the SOURCE pins in LinkSwitch-TN2 are switching nodes, the copper area connected to SOURCE should be minimized to minimize EMI within the thermal constraints of the design. In the boost configuration, since the SOURCE pins are tied to DC return, the copper area connected to SOURCE can be maximized to improve heat sinking. Figures 9a, 9b and 9c are printed circuit board layout design examples for the circuit schematic shown in Figure 8. The loop formed between the LinkSwitch-TN2, inductor (L1), freewheeling diode (D1), and output capacitor (C2) should be kept as small as possible. The BYPASS pin capacitor C1 should be located physically close to the SOURCE (S) and BYPASS (BP) pins. To minimize direct coupling from switching nodes, the LinkSwitch-TN2 should be placed away from AC input lines. It may be advantageous to place capacitors C4 and C5 in-between LinkSwitch-TN2 and the AC input. The second rectifier diode D4 is optional, but may be included for better EMI performance and higher line surge withstand capability. Figure 9a. Recommended Printed Circuit Layout for LinkSwitch-TN2 using P Package. 8 www.power.com Rev. Q 06/23 LinkSwitch-TN2 Figure 9b. Recommended Printed Circuit Layout for LinkSwitch-TN2 using G Package. Figure 9c. Recommended Printed Circuit Layout for LinkSwitch-TN2 using D Package. 9 www.power.com Rev. Q 06/23 LinkSwitch-TN2 Quick Design Checklist As with any power supply design, all LinkSwitch-TN2 designs should be verified for proper functionality on the bench. The following minimum tests are recommended: 1. Adequate DC Rail Voltage – Check that the minimum DC input voltage does not fall below 70 VDC at maximum load, minimum input voltage. 2. Correct Diode Selection – UF400x series diodes with reverse recovery time of 75 ns or better are recommended only for designs that operate in MDCM at an ambient of 70 °C or below. For designs operating in continuous conduction mode (CCM) and/ or higher ambients, then a diode with a reverse recovery time of 35 ns or better, such as the BYV26C, is recommended. 3. Maximum Drain Current – Verify that the peak drain current is below the data sheet peak drain specification under worst-case conditions of highest line voltage, maximum overload (just prior to auto-restart) and highest ambient temperature. 4. Thermal Check – At maximum output power, minimum input voltage and maximum ambient temperature, verify that the LinkSwitch-TN2 SOURCE pin temperature is 100 °C or below. This ensures adequate margin due to variations in RDS(ON) from part to part. If the device temperature of the IC exceeds 85 °C with ambient temperature of 25 °C, it is recommended the next bigger device in the family should be selected for the application. A battery powered thermocouple meter is recommended to make measurements when the SOURCE pins are a switching node. Alternatively, the ambient temperature may be raised to indicate margin to thermal shutdown. In a LinkSwitch-TN2 design using a buck or buck-boost converter topology, the SOURCE pin is a switching node. Oscilloscope measurements should therefore be made with probe grounded to a DC voltage, such as primary return or DC input rail, and not to the SOURCE pins. The power supply input must always be supplied from an isolated source when doing measurements (e.g. via an isolation transformer). 10 www.power.com Rev. Q 06/23 LinkSwitch-TN2 Absolute Maximum Ratings(1,5) DRAIN Pin Voltage: LNK320x.........................................-0.3 to 725 V LNK329x..........................................-0.3 to 900 V DRAIN Pin Peak Current: LNK3202........................................600 mA2 LNK3204......................................1230 mA2 LNK3205......................................2460 mA2 LNK3206......................................3750 mA2 LNK3207......................................3750 mA2 LNK3208......................................6300 mA2 LNK3209.................................... 10200 mA2 LNK3294........................................968 mA2 LNK3296......................................3194 mA2 FEEDBACK Pin Voltage................................................... -0.3 V to 7 V FEEDBACK Pin Current...........................................................100 mA BYPASS Pin Voltage.........................................................0.3 V to 7 V Storage Temperature ..............................................-65 °C to 150 °C Operating Junction Temperature3 .............................-40 °C to 150 °C Lead Temperature4 ................................................................ 260 °C Notes: 1. All voltages referenced to SOURCE, TA = 25 °C. 2. See Figure 15 and Figure 23, for VDS > 400 V. 3. Normally limited by internal circuitry. 4. 1/16 in. from case for 5 seconds. 5. Maximum ratings specified may be applied, one at a time, without causing permanent damage to the product. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect product reliability. Thermal Resistance Thermal Resistance: P or G Package: (qJA) ........................................ 70 °C/W2; 60 °C/W3 (qJC)1 ........................................................ 11 °C/W D Package: (qJA) ......................................100 °C/W(2; 80 °C/W3 (qJC)1 ........................................................ 30 °C/W Parameter Symbol Notes: 1. Measured on pin 8 (SOURCE) close to plastic interface. 2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad. 3. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad. Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 10 (Unless Otherwise Specified) Min Typ Max 62 66 70 Units Control Functions Output Frequency fOSC TJ = 25 °C Maximum Duty Cycle DCMAX S2 Open FEEDBACK Pin Turnoff Threshold Current IFB FEEDBACK Pin Voltage at Turnoff Threshold FEEDBACK Pin Instant Shutdown Current Peak-Peak Jitter 4 kHz LNK320x 66 69 73 LNK329x 65 68 72 VBP = 5.0 V to 5.5 V TJ = 25 °C 44 49 54 mA VFB VBP = 5.0 V to 5.5 V TJ = 25 °C 1.97 2.00 2.03 V IFB(SD) TJ = 25 °C 520 675 800 mA FEEDBACK Pin Instant Shutdown Delay FEEDBACK Pin Voltage at Shutdown Current Average VFB(SD) IS1 DRAIN Pin Supply Current IS2 % TJ = 25 °C 2 Switch Cycles VBP = 5.0 V to 5.5 V TJ = 25 °C 3.3 V VFB = 2.1 V (MOSFET Not Switching) See Note A FEEDBACK Open (MOSFET Switching) See Notes A, B LNK32xx 75 LNK3208/9 95 LNK3202 98 160 LNK3204 113 180 LNK3205 141 220 LNK3206 165 250 mA LNK3207 190 290 LNK3208 275 405 LNK3209 300 460 LNK3294 120 170 LNK3296 225 320 mA 11 www.power.com Rev. Q 06/23 LinkSwitch-TN2 Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 10 (Unless Otherwise Specified) Min Typ Max ICH1 VBP = 0 V TJ = 25 °C -11 -7 -3 -7.5 -5 -2.5 4.7 5.0 5.2 V 6 8 mA 4.9 5.2 5.5 V LNK32xx 0.37 0.47 0.57 LNK3208/9 0.35 0.47 0.60 Units Control Functions (cont.) BYPASS Pin Charge Current BYPASS Pin Voltage BYPASS Pin Shutdown Threshold Current BYPASS Pin Shunt Voltage ICH2 VBP = 4 V TJ = 25 °C VBP IBP(SD) TJ = 25 °C VBP(SHUNT) IBP = 2 mA BYPASS Pin Voltage Hysteresis VBP(H) BYPASS Pin Supply Current IBP(SC) See Note C 55 mA V mA Circuit Protection di/dt = 55 mA/ms TJ = 25 °C di/dt = 250 mA/ms TJ = 25 °C di/dt = 65 mA/ms TJ = 25 °C di/dt = 415 mA/ms TJ = 25 °C di/dt = 75 mA/ms TJ = 25 °C di/dt = 500 mA/ms TJ = 25 °C di/dt = 95 mA/ms TJ = 25 °C di/dt = 610 mA/ms TJ = 25 °C Standard Current Limit (CBP = 0.1 mF, See Note D, H) ILIMIT di/dt = 95 mA/ms TJ = 25 °C di/dt = 610 mA/ms TJ = 25 °C di/dt = 165 mA/ms TJ = 25 °C di/dt = 1000 mA/ms TJ = 25 °C di/dt = 165 mA/ms TJ = 25 °C di/dt = 1000 mA/ms TJ = 25 °C di/dt = 65 mA/ms TJ = 25 °C di/dt = 415 mA/ms TJ = 25 °C di/dt = 95 mA/ms TJ = 25 °C di/dt = 610 mA/ms TJ = 25 °C LNK3202 LNK3204 LNK3205 LNK3206 LNK3207 LNK3208 LNK3209 LNK3294 LNK3296 126 136 146 149 170 191 240 257 275 278 317 356 350 375 401 394 448 502 450 482 515 510 580 650 725 780 835 893 1015 1137 970 1040 1110 1131 1285 1440 1200 1300 1400 1413 1600 1787 240 257 275 278 317 356 450 482 515 510 580 650 mA 12 www.power.com Rev. Q 06/23 LinkSwitch-TN2 Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 10 (Unless Otherwise Specified) Min Typ Max 70 80 90 104 119 134 180 205 230 227 258 289 227 259 291 292 332 372 325 370 415 408 464 520 545 620 695 730 830 930 739 840 941 941 1070 1199 925 1050 1175 1194 1350 1506 180 205 230 227 258 289 325 370 415 408 464 520 LNK3202 See Note I 373 534 687 LNK3204 See Note I 356 475 594 LNK3205 See Note I 412 531 650 LNK3206 See Note I 442 591 734 LNK3207 See Note I 656 875 1094 LNK3208 See Note I 435 580 725 LNK3209 See Note I 442 591 734 Units Circuit Protection (cont.) di/dt = 28 mA/ms TJ = 25 °C di/dt = 170 mA/ms TJ = 25 °C di/dt = 65 mA/ms TJ = 25 °C di/dt = 415 mA/ms TJ = 25 °C di/dt = 75 mA/ms TJ = 25 °C di/dt = 500 mA/ms TJ = 25 °C di/dt = 95 mA/ms TJ = 25 °C di/dt = 610 mA/ms TJ = 25 °C Reduced Current Limit (CBP = 1 mF, See Note D, H) ILIMIT(RED) di/dt = 95 mA/ms TJ = 25 °C di/dt = 610 mA/ms TJ = 25 °C di/dt = 165 mA/ms TJ = 25 °C di/dt = 1000 mA/ms TJ = 25 °C di/dt = 165 mA/ms TJ = 25 °C di/dt = 1000 mA/ms TJ = 25 °C di/dt = 65 mA/ms TJ = 25 °C di/dt = 415 mA/ms TJ = 25 °C di/dt = 95 mA/ms TJ = 25 °C di/dt = 610 mA/ms TJ = 25 °C Minimum On-Time tON(MIN) LNK3202 LNK3204 LNK3205 LNK3206 LNK3207 LNK3208 LNK3209 LNK3294 LNK3296 mA ns 13 www.power.com Rev. Q 06/23 LinkSwitch-TN2 Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 10 (Unless Otherwise Specified) Min Typ Max LNK3294 See Note I 356 480 599 LNK3296 See Note I 350 550 Units Circuit Protection (cont.) Minimum On-Time tON(MIN) ns Leading Edge Blanking Time tLEB TJ = 25 °C See Note E 300 450 Thermal Shutdown Temperature TSD See Note F 135 142 Thermal Shutdown Hysteresis TSDH See Note F LNK32xx Internal Soft-Start fOSC(SS) LNK3208/9 760 ns 150 °C 75 °C Soft-Start Period See Note E 256 Cycles Soft-Start Frequency 33 kHz Soft-Start Period 1 64 Cycles Soft-Start Frequency 1 16.5 kHz Soft-Start Period 2 64 Cycles Soft-Start Frequency 2 22 kHz Soft-Start Period 3 128 Cycles Soft-Start Frequency 3 33 kHz Output LNK3202 ID = 13 mA LNK3204 ID = 25 mA LNK3205 ID = 35 mA ON-State Resistance RDS(ON) TJ = 25 °C 48 55.2 TJ = 100 °C 76 88.4 TJ = 25 °C 24 27.6 TJ = 100 °C 38 44.2 TJ = 25 °C 12 13.8 TJ = 100 °C 19 22.1 LNK3206 ID = 45 mA TJ = 25 °C 7 8.1 TJ = 100 °C 11 12.9 LNK3207 ID = 45 mA TJ = 25 °C 7 8.1 TJ = 100 °C 11 12.9 TJ = 25 °C 4.25 4.85 TJ = 100 °C 5.78 6.60 TJ = 25 °C 2.70 3.20 TJ = 100 °C 3.80 4.37 TJ = 25 °C 17 19.6 TJ = 100 °C 27 31 TJ = 25 °C 5.3 6.1 TJ = 100 °C 8.4 9.7 LNK3208 ID = 45 mA LNK3209 ID = 45 mA LNK3294 ID = 83 mA LNK3296 ID = 163 mA W 14 www.power.com Rev. Q 06/23 LinkSwitch-TN2 Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 10 (Unless Otherwise Specified) IDSS1 VBP = 5.4 V VFB ≥2.1 V VDS = 80% BVDSS TJ = 125 °C IDSS2 VBPP = 5.4 V VDSS = 325 V TJ = 25 °C Min Typ Max Units Output (cont.) OFF-State Drain Leakage Current Breakdown Voltage VBP = 5.4 V VFB ≥2.1 V TJ = 25 °C BVDSS DRAIN Pin Supply Voltage TJ = 25 °C Auto-Restart ON-Time t AR(ON) Auto-Restart OFF-Time t AR(OFF) Auto-Restart Duty Cycle DC AR 200 mA 15 LNK320X 725 LNK329X 900 LNK3202 to LNK3207 18 LNK3208 to LNK3209 LNK3294, LNK3296 25 TJ = 25 °C See Note G TJ = 25 °C See Note G V V 50 First Off Period 150 Subsequent Periods 1500 Subsequent Periods 3 ms ms % NOTES: A. Total current consumption is the sum of IS1 and IDSS when FEEDBACK pin voltage is = 2.1 V (MOSFET not switching) and the sum of IS2 and IDSS when FEEDBACK pin is shorted to SOURCE (MOSFET switching). B. Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the DRAIN. An alternative is to measure the BYPASS pin current at 5.1 V. C. This current is only intended to supply an optional optocoupler connected between the BYPASS and FEEDBACK pins and not any other external circuitry. D. For current limit at other di/dt values, refer to Figures 21 and 22. E. This parameter is guaranteed by design. F. This parameter is derived from characterization. G. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency). H. The BP/M capacitor value tolerance should be equal or better than indicated below across the ambient temperature range of the target application. I. Measured using circuit in Figure 12 with 50 W drain pull-up. The width of the drain pulse is measured as the time from VFALL = 42 V to VRISE = 40 V (VDR = 50 V), for LNK32x6/x5/x4 and as the time from VFALL = 32 V to VRISE = 30 V on rising edge (VDR = 35 V), for LNK3202. Nominal BP/M Pin Capacitor Value Tolerance Relative to Minimal Capacitor Value Min Max 0.1 mF -60% +100% 1 mF -50% +100% 15 www.power.com Rev. Q 06/23 LinkSwitch-TN2 470 kΩ 470 Ω 5W S2 S1 BP/M FB D 50 V 50 V 0.1 µF S S S S PI-7850-033016 Figure 10. LinkSwitch-TN2 General Test Circuit. 50 Ω FB D BP/M S 0.1 µF VDR PI-7899-031816 Figure 12. LinkSwitch-TN2 Minimum On-Time Test Circuit. Figure 11. LinkSwitch-TN2 Duty Cycle Measurement. T1 VDR VFALL T2 VRISE TON_MIN = T2 - T1 0V PI-7898-031716 Figure 13. LinkSwitch-TN2 Minimum On-Time Measurement. 16 www.power.com Rev. Q 06/23 LinkSwitch-TN2 1.0 0.7 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 100 125 150 0 Drain Voltage VDS (V) Junction Temperature (°C) Figure 15. Maximum Allowable Drain Current vs. Drain Voltage. 25 °C 0.20 100 °C 0.15 Scaling Factors: LNK3202 1.00 LNK3204 2.05 LNK3205 4.10 LNK3206 6.25 LNK3207 6.25 LNK3208 10.5 LNK3209 17.0 0.10 0.05 0 0 2 4 6 8 1000 100 10 1 10 12 14 16 18 20 0 Drain Voltage VDS (V) 1.0 0.8 Normalized ILIM = 1 Scaling Factors: LNK3202 55 mA/µs LNK3204 65 mA/µs LNK3205 75 mA/µs LNK3206 95 mA/µs LNK3207 95 mA/µs LNK3208 165 mA/µs LNK3209 165 mA/µs 0.2 0.0 -50 0 50 136 mA 257 mA 375 mA 482 mA 780 mA 1040 mA 1300 mA 100 Junction Temperature (˚C) Figure 18. Current Limit vs. Temperature. 150 Default Current Limit at High di/dt (Normalized to 25 ˚C) PI-8112b-051022 Default Current Limit at Low di/dt (Normalized to 25 ˚C) 1.2 0.4 50 100 150 200 250 300 350 400 450 Drain Voltage (V) Figure 17. COSS vs. Drain Voltage. Figure 16. Output Characteristics. 0.6 Scaling Factors: LNK3202 1.00 LNK3204 2.05 LNK3205 4.10 LNK3206 6.25 LNK3207 6.25 LNK3208 10.5 LNK3209 17.0 1.2 PI-8111b-051022 Drain Current IDS (A) PI-7851j-050922 0.30 Drain Capacitance (pF) Figure 14. Breakdown vs. Temperature. 0.25 100 200 300 400 500 600 700 800 PI-7853j-050922 0.9 -50 -25 Scaling Factors: LNK3202 1.00 LNK3204 2.05 LNK3205 4.10 LNK3206 6.25 LNK3207 6.25 LNK3208 10.5 LNK3209 17.0 0.6 Drain Current IDS (A) PI-2213-012301 Breakdown Voltage (Normalized to 25 °C) 1.1 PI-7932i-050922 Typical Performance Characteristics 1.0 0.8 Normalized ILIM = 1 Scaling Factors: LNK3202 250 mA/µs 170 mA LNK3204 415 mA/µs 317 mA LNK3205 500 mA/µs 448 mA LNK3206 580 mA/µs 580 mA LNK3207 610 mA/µs 1015 mA LNK3208 1000 mA/µs 1285 mA LNK3209 1000 mA/µs 1600 mA 0.6 0.4 0.2 0.0 -50 0 50 100 150 Junction Temperature (˚C) Figure 19. Current Limit vs. Temperature. 17 www.power.com Rev. Q 06/23 LinkSwitch-TN2 1.0 0.8 0.6 0.4 0.2 0.0 -50 0 50 100 150 1.4 PI-8114b-051022 PI-8113-092716 Output Frequency (Normalized to 25 ˚C) 1.2 Normalized Default Current Limit Typical Performance Characteristics 1.2 1.0 0.8 0.6 0.4 0.2 0.0 1 2 Figure 20. Output Frequency vs. Junction Temperature. LNK3202 LNK3204 LNK3205 LNK3206 LNK3207 LNK3208 LNK3209 55 mA/µs 65 mA/µs 75 mA/µs 95 mA/µs 95 mA/µs 165 mA/µs 165 mA/µs 3 4 136 mA 257 mA 375 mA 482 mA 780 mA 1040 mA 1300 mA 5 6 7 Figure 21. Default Current Limit vs. di/dt. 1.4 PI-8115b-0512022 Normalized Reduced Current Limit Normalized Normalized di/dt = 1 ILIM = 1 Normalized di/dt Junction Temperature (˚C) 1.2 1.0 0.8 0.6 0.4 0.2 0.0 Scaling Factors: 1 2 Scaling Factors: Normalized Normalized di/dt = 1 ILIM = 1 LNK3202 LNK3204 LNK3205 LNK3206 LNK3207 LNK3208 LNK3209 28 mA/µs 65 mA/µs 75 mA/µs 95 mA/µs 95 mA/µs 165 mA/µs 165 mA/µs 3 4 80 mA 205 mA 259 mA 370 mA 620 mA 840 mA 1050 mA 5 6 7 Normalized di/dt Figure 22. Reduced Current Limit vs. di/dt. 18 www.power.com Rev. Q 06/23 LinkSwitch-TN2 2 0.6 Drain Current IDS (A) Scaling Factors: LNK3x94 1.0 LNK3x96 3.0 PI-8957-040319 Drain Current (A) 2.5 1.5 1 0.5 0 0.5 100 °C 0.3 0.2 0.1 0 125 250 375 500 625 750 875 1000 0 5 Drain Voltage (V) 10 15 20 Drain Voltage VDS (V) 10000 Scaling Factors: LNK3294 1.0 LNK3296 3.3 1000 PI-8832-021419 Figure 24. Output Characteristics. Figure 23. Maximum Allowable Drain Current vs. Drain Voltage. Drain Capacitance (pF) 25 °C 0.4 Current Pulse Width ≤ 500 ns 0 Scaling Factors: LNK3294 1.0 LNK3296 3.3 PI-8831-092618 Typical Performance Characteristics 900 V 100 10 1 0 100 200 300 400 500 Drain Voltage (V) Figure 25. COSS vs. Drain Voltage. 19 www.power.com Rev. Q 06/23 LinkSwitch-TN2 1.0 0.8 0.6 Scaling Factors: Normalized Normalized di/dt = 1 ILIM = 1 0.4 LNK3294 LNK3296 65 mA/µs 95 mA/µs 250 mA 480 mA 0.2 0.0 1 2 3 4 5 6 1.4 PI-8914-020719 1.2 Normalized Standard Current Limit 1.4 PI-8913-020719 Normalized Standard Current Limit Typical Performance Characteristics 900 V 1.2 1.0 0.8 0.6 Scaling Factors: Normalized Normalized di/dt = 1 ILIM = 1 0.4 LNK3294 LNK3296 65 mA/µs 95 mA/µs 197 mA 368 mA 0.2 0.0 7 1 2 3 4 5 6 Figure 26. Normalized Current Limit vs. di/dt. Figure 27. Normalized Current Limit vs. di/dt. 0.8 0.6 0.4 Scaling Factors: Normalized ILIM = 1 LNK3294 LNK3296 65 mA/µs 95 mA/µs 250 mA 480 mA 0.2 0.0 -50 -30 -10 10 30 50 70 90 110 130 150 1.0 0.8 0.6 0.4 Normalized ILIM = 1 LNK3294 LNK3296 65 mA/µs 95 mA/µs 197 mA 368 mA 0.2 0.0 -50 -30 -10 10 30 50 70 90 110 130 150 Junction Temperature (°C) Figure 30. Reduced Current Limit at Low Ramp Rate. Reduced Current Limit at High di/dt (Normalized to 25 °C) PI-8917-020719 Reduced Current Limit at Low di/dt (Normalized to 25 °C) 0.4 Scaling Factors: 283 mA 577 mA 0.0 -50 -30 -10 10 30 50 70 90 110 130 150 Figure 29. Standard Current Limit at High Ramp Rate. 0.8 0.6 415 mA/µs 610 mA/µs Junction Temperature (°C) Figure 28. Standard Current Limit at Low Ramp Rate. 1.0 Normalized ILIM = 1 LNK3294 LNK3296 0.2 Junction Temperature (°C) 1.2 Scaling Factors: 1.2 PI-8918-020719 1.0 1.2 7 PI-8916-020719 PI-8915-020719 1.2 Default Current Limit at High di/dt (Normalized to 25 °C) Normalized di/dt Default Current Limit at Low di/dt (Normalized to 25 °C) Normalized di/dt 1.0 0.8 0.6 0.4 Scaling Factors: Normalized ILIM = 1 LNK3294 LNK3296 415 mA/µs 610 mA/µs 225 mA 460 mA 0.2 0.0 -50 -30 -10 10 30 50 70 90 110 130 150 Junction Temperature (°C) Figure 31. Reduced Current Limit at High Ramp Rate. 20 www.power.com Rev. Q 06/23 LinkSwitch-TN2 PDIP-8C (P Package) -E- .06 in [1.41 mm] ⊕ D S .004 (.10) ∅.03 in [0.86 mm] .10 in [2.54 mm] Typ .240 (6.10) .260 (6.60) .30 in [7.62 mm] ∅.06 in 0.200 in [1.41 mm] [5.08 mm] Pin 1 -D- .356 (9.05) .387 (9.83) .057 (1.45) .068 (1.73) (NOTE 6) .125 (3.18) .145 (3.68) -T- .30 in [7.62 mm] .015 (.38) MINIMUM SEATING PLANE .118 (3.00) .140 (3.56) .100 (2.54) BSC .014 (.36) .022 (.56) .048 (1.22) .068 (1.73) ⊕T .137 (3.48) MINIMUM E D S .010 (.25) M .008 (.20) .015 (.38) .300 (7.62) BSC (NOTE 7) .300 (7.62) .390 (9.91) Notes: 1. Package dimensions conform to JEDEC specification MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP) package with .300 inch row spacing. 2. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 3. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 4. Pin locations start with Pin 1, and continue counter-clock-wise to Pin 8 when viewed from the top. The notch and/or dimple are aids in locating Pin 1. Pin 3 is omitted. 5. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 6. Lead width measured at package body. P08C 7. Lead spacing measured with the leads constrained to be perpendicular to plane T. PI-3933b-092920 21 www.power.com Rev. Q 06/23 LinkSwitch-TN2 SMD-8C (G Package) ⊕ D S .004 (.10) .046 .060 .060 .046 -E- .080 .086 Pin 1 .100 (2.54) (BSC) -D- .137 (3.48) MINIMUM .286 Pin 1 Solder Pad Dimensions .356 (9.05) .387 (9.83) .420 .057 (1.45) .068 (1.73) (NOTE 5) .125 (3.18) .145 (3.68) .032 (.81) .043 (1.09) .186 .372 (9.45) .388 (9.86) ⊕ E S .010 (.25) .240 (6.10) .260 (6.60) Notes: 1. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 2. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 3. Pin locations start with Pin 1, and continue counter-clockwise to Pin 8 when viewed from the top. Pin 3 is omitted. 4. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 5. Lead width measured at package body. 6. D and E are referenced datums on the package body. .048 (1.22) .068 (1.73) .009 (.23) .004 (.10) .004 (.10) .012 (.30) .036 (0.91) .044 (1.12) 0 °- 8° G08C PI-4015b-072320 22 www.power.com Rev. Q 06/23 LinkSwitch-TN2 SO-8C (D Package) 4 B 0.10 (0.004) C A-B 2X 2 DETAIL A 4.90 (0.193) BSC A 4 8 D 5 2 3.90 (0.154) BSC GAUGE PLANE SEATING PLANE 6.00 (0.236) BSC o 0-8 C 1.04 (0.041) REF 2X 0.10 (0.004) C D 1 Pin 1 ID 4 0.40 (0.016) 1.27 (0.050) 0.20 (0.008) C 2X 7X 0.31 - 0.51 (0.012 - 0.020) 0.25 (0.010) M C A-B D 1.27 (0.050) BSC 1.35 (0.053) 1.75 (0.069) 0.25 (0.010) BSC 1.25 - 1.65 (0.049 - 0.065) DETAIL A 0.10 (0.004) 0.25 (0.010) 0.10 (0.004) C H 7X SEATING PLANE C Reference Solder Pad Dimensions + Notes: 1. JEDEC reference: MS-012. 2.00 (0.079) + D07C 0.17 (0.007) 0.25 (0.010) 1.27 (0.050) 4.90 (0.193) + + 0.60 (0.024) 2. Package outline exclusive of mold flash and metal burr. 3. Package outline inclusive of plating thickness. 4. Datums A and B to be determined at datum plane H. 5. Controlling dimensions are in millimeters. Inch dimensions are shown in parenthesis. Angles in degrees. PI-4526-012315 23 www.power.com Rev. Q 06/23 LinkSwitch-TN2 PDIP-8C (P) and SMD-8C (G) PACKAGE MARKING B A A. B. C. D. 1630 LNK3204P 3Z380J C D Power Integrations Registered Trademark Assembly Date Code (last two digits of year followed by 2-digit work week) Product Identification (Part #/Package Type) Lot Identification Code PI-8117-093016 SO-8C (D) PACKAGE MARKING B A A. B. C. D. 1630 LNK3202D 4D426E C D Power Integrations Registered Trademark Assembly Date Code (last two digits of year followed by 2-digit work week) Product Identification (Part #/Package Type) Lot Identification Code PI-8116-092816 24 www.power.com Rev. Q 06/23 LinkSwitch-TN2 MSL Table Part Number MSL Rating LNK3202P LNK3204P LNK3294P LNK3205P LNK3206P LNK3207P LNK3208P LNK3209P LNK3294P LNK3296P N/A LNK3202G LNK3204G LNK3294G LNK3205G LNK3206G LNK3207G LNK3208G LNK3209G LNK3294G LNK3296G 3 LNK3202D LNK3204D LNK3205D LNK3206D LNK3207D LNK3208D LNK3209D 1 ESD and Latch-Up Test Conditions Results Latch-up at 125 °C EIA/JESD78 Human Body Model ESD EIA/JESD22-A114-A > ±2 kV on all pins, except DRAIN Pin for LNK3202 ±1.5 kV Machine Model ESD EIA/JESD22-A115-A > ±200 V on all pins > ±100 mA or > 1.5 × VMAX on all pins Part Ordering Information • LinkSwitch Product Family • TN2 Series Number • MOSFET Rating 0 725 V 9 900 V • Package Identifier (All RoHS Compliant and Halogen Free) G Plastic Surface Mount SMD-8C P Plastic PDIP-8C D Plastic SO-8C (725 V Family only) • Tape & Reel and Other Options LNK 3204 G - TL TL Tape and Reel, 1 k pcs minimum for G Package. 2.5 k pcs for D Package. Not available for P Package. 25 www.power.com Rev. Q 06/23 LinkSwitch-TN2 Revision Notes Date A Preliminary release of 725 V parts. 04/16 B Introduction release of 725 V parts. 07/16 C Production release of 725 V parts. D Added IC images on page 1. 10/14/16 10/16 E Updated Note D, Figure 16, VFB parameter. 11/8/16 F Updated Figures 12 and 13 Captions. Corrected DRAIN Pin Peak Current to match Figure 15 and Corrected Note 2 in Absolute Maximum Ratings Section. 01/06/17 G Production release of LNK3294 and LNK3296 parts. 02/19 H Updated Figure 23. 04/19 I Added Max values for IS2 and added IDSS2 at TJ - 125 °C. 08/19 J Updated ESD and Latch-Up table. 01/20 K Updated per PCN-20321. 08/20 L Updated per PCN-20331 and added size 7. 10/20 M Updated VBP(SHUNT) Min and Max values. 10/21/20 N Introduction release of LNK3208 part. 04/22 O Introduction release of LNK3209 part. 05/22 P Production release of LNK3208 and LNK3209 parts. 06/22 Q Updated Minimum DRAIN Pin Supply Voltage. 06/23 26 www.power.com Rev. Q 06/23 LinkSwitch-TN2 Notes 27 www.power.com Rev. Q 06/23 For the latest updates, visit our website: www.power.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set forth at www.power.com/ip.htm. Life Support Policy POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: 1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Power Integrations, the Power Integrations logo, CAPZero, ChiPhy, CHY, DPA-Switch, EcoSmart, E-Shield, eSIP, eSOP, HiperLCS, HiperPLC, HiperPFS, HiperTFS, InnoSwitch, Innovation in Power Conversion, InSOP, LinkSwitch, LinkZero, LYTSwitch, SENZero, TinySwitch, TOPSwitch, PI, PI Expert, PowiGaN, SCALE, SCALE-1, SCALE-2, SCALE-3 and SCALE-iDriver, are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2023, Power Integrations, Inc. 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