LNK574DG-TL

LNK574/576 LinkZero-LP Zero No-Load or Zero Standby Consumption with up to 1 mW Output Load Product Highlights + Lowest System Cost with Zero Standby (1 mW Output Power) • Automatically enters low consumption power-down mode when load drops below ~0.2% of full load for LNK576 and ~0.6% for LNK574 • Detects load reconnection and automatically restarts regulation • Simple upgrade to existing LinkSwitch-LP designs • Very accurate IC parameter tolerances improve system manu- facturing yield LNK574DG • Suitable for low-cost clampless designs • Frequency jittering greatly reduces EMI filter cost • Extended package creepage improves system field reliability Advanced Protection/Safety Features (a) Typical Application Schematic for LNK574DG. • Accurate hysteretic thermal shutdown protection – automatic • • • • recovery reduces field returns Universal input range allows worldwide operation Auto-restart reduces delivered power by >85% during short-circuit and open-loop fault conditions Simple ON/OFF control, no loop compensation needed High bandwidth provides excellent transient load response with no overshoot + EcoSmart™– Energy Efficient D • No-load or standby (1 mW output power) consumption as low as LNK576DG 50 kW, device operation is not guaranteed. If for any reason the FEEDBACK pin is floated, the IC will stop switching. maximum power threshold, the IC transitions into the constant current (CC) region. In this region, the FEEDBACK pin voltage begins to reduce as the power supply output voltage falls. In order to maintain a constant output current, the internal oscillator frequency is reduced in this region until it reaches typically 48% of the starting frequency. When the FEEDBACK pin voltage drops below the auto-restart threshold (typically 0.9 V on the FEEDBACK pin), the power supply enters the auto-restart mode. In this mode, the power supply will turn off for 1.2 s and then turn back on for 170 ms. The auto-restart function reduces the average output current during an output short-circuit condition. Open-Loop Condition on the FEEDBACK Pin When an open-loop condition on the FEEDBACK pin is detected, an internal pull up current source pulls the FEEDBACK pin up to above 1.70 V and LinkZero-LP stops switching after 160 clock cycles for LNK574 or 416 clock cycles for LNK576. Applications Example The circuit shown in Figure 4 is a typical isolated zero no-load 6 V, 350 mA, constant voltage, and constant current (CV/CC) output power supply using LinkZero-LP. AC input differential filtering is accomplished by the π filter formed by C1, C2 and L1. The proprietary frequency jitter feature of the LinkZero-LP eliminates the need for any Y capacitor or common-mode inductor. Wire-wound resistor RF1 is a fusible, flame proof resistor which is used as a fuse as well as to limit inrush current. Wire-wound types are recommended for designs that operate ≥132 VAC to withstand the instantaneous power when AC is first applied as C1 and C2 charge. The power supply utilizes simplified bias winding voltage feedback, enabled by the LinkZero-LP ON/OFF control. The voltage across C5 is determined by the FEEDBACK pin reference voltage and the resistor divider formed by R3 and R4. Capacitor C4 provides high frequency filtering on the FEEDBACK pin to avoid switching cycle pulse bunching. The FEEDBACK pin reference voltage, which varies with load, is set to 1.37 V at no-load and gradually increases to 1.70 V at full load to provide cable drop compensation. In the constant voltage (CV) region, the LinkZero-LP device enables/disables switching cycles to maintain the FEEDBACK pin reference voltage. Diode D6 and low cost ceramic capacitor C5 provide rectification and filtering of the primary feedback winding waveform. At increased loads, beyond the The LinkZero-LP device is self biased through the DRAIN pin. However, to improve efficiency at high-line, an external bias may be added using optional components diode D5 and resistor R2. The power-down (PD) mode duty cycle and the no-load power consumption is determined by the BYPASS pin capacitor C3. No-load power consumption can be reduced by a capacitor with higher value. Higher C3 capacitor values will tend to increase the output ripple in PD mode – See LinkZero-LP Design Considerations section below. A clampless primary circuit is achieved due to the very accurate tolerance current limit trimming techniques used in manufacturing the LinkZero-LP, plus the transformer construction techniques used. The peak drain voltage is therefore limited to typically less than 550 V at 265 VAC, providing significant margin to the 700 V minimum drain voltage specification (BVDSS). Output rectification and filtering is achieved with output rectifier D7 and filter capacitor C7. Due to the auto-restart feature, the average short-circuit output current is significantly less than 1 A, allowing low current rating and low cost rectifier D7 to be used. Output circuitry is designed to handle a continuous short-circuit on the power supply output. Although not necessary in this design, a preload resistor may be used at the output of the supply to reduce output voltage at no-load. C6 R5 220 pF 5.1 Ω 100 V 5 D1 1N4007 D2 1N4007 6 V, 350 mA 9 4 8 NC RF1 10 Ω 2W C7 330 µF 16 V D7 SS15 RTN 2 1 C1 3.3 µF 400 V 85 - 265 VAC D3 1N4007 D4 1N4007 R1 4.7 kΩ C2 3.3 µF 400 V D VO T1 EF16 Rated Output Power = VR × IR LinkZero-LP U1 LNK574DG FB D5 1N4148 R2 82 kΩ VR R3 113 kΩ 1% C5 220 nF 50 V D6 DL4003 BP/M S L1 1.0 mH C3 220 nF 50 V R4 9.09 kΩ 1% IR C4 1 nF 50 V IO PI-5510-082310 PI-6086-072110 Figure 4. Schematic of 2.1 W, 6 V, 350 mA, 0.00 W Adapter/Charger. 4 Rev. D 11/15 www.power.com LNK574/576 LinkZero-LP Power-Down (PD) Mode Design Considerations The LinkZero-LP goes into PD mode when the output power supply load is reduced enough that 160 for LNK574 or 416 for LNK576 consecutive switching cycles are skipped twice with only one active switching cycle in between the two sets of 160 for LNK574 or 416 for LNK576 skipped switching cycles. This corresponds to ~0.6% for LNK574 or ~0.2% for LNK576 of the full load power capability of the LinkZero-LP. Even when the power supply output load is completely removed, any preload resistor on the output and the components connected to the bias winding still represent a load on the transformer. The feedback circuitry connected to the bias winding should therefore be designed to represent