LNK584-586
LinkZero-AX
Zero Standby Consumption Integrated Off-Line Switcher
Product Highlights
Lowest System Cost with Zero Standby Consumption
• Simple system configuration provides zero consumption standby/
•
•
•
•
power-down with user controlled wake up
Very tight IC parameter tolerances improves system manufacturing
yield
Suitable for low-cost clampless designs
Frequency jittering greatly reduces EMI filter cost
Extended package creepage improves system field reliability
+
+ DC
PIN 85% during short-circuit
and open-loop fault conditions
Simple ON/OFF control, no loop compensation needed
High bandwidth provides fast turn on with no overshoot
FB
BP/M
CBP
Power
Down
Pulse
≥2.5 ms
Reset/Wake
Up Pulse
PI-5909-120710
Figure 1. Typical Application Schematic.
EcoSmart™– Energy Efficient
• Standby/power-down consumption less than 3 mW at
325 VDC input (Note 1)
• Easily meets all global energy efficiency regulations with no added
components
• ON/OFF control provides constant efficiency to very light loads
Output Power Table
Applications
LNK584DG
• Ultra low consumption isolated or non-isolated standby and auxiliary
supplies
Description
LinkZero™-AX combines extremely low standby/power-down energy
use with the industry’s lowest component count standby supply
solution. Below 3 mW at 230 VAC in power-down (PD) mode meets IEC
62301 definition of zero power consumption and is immeasurable on
most power meters. LinkZero-AX is set into power-down mode using
an external signal to pull the FEEDBACK pin high for 2.5 ms. Such an
external signal can be generated by a system micro controller or
infrared controller. In power-down mode the BYPASS pin remains
regulated allowing the LinkZero-AX to be woken up with a reset pulse
to pull the BYPASS pin below a reset threshold (1.5 V). Ultra low
system consumption is therefore achieved without needing to
disconnect the input voltage with a relay.
Product3
230 VAC ±15%
85-265 VAC
Open Frame2
Open Frame2
3W
3W
LNK584GG
3W
3W
LNK585DG
4.5 W
4W
LNK585GG
5W
4.5 W
LNK586DG
6W
5W
LNK586GG
6.5 W
5.5 W
Table 1. Output Power Table.
Notes:
1. IEC 62301 Clause 4.5 rounds standby power use below 5 mW to zero.
2. Maximum practical continuous power in an open frame design with adequate
heat sinking, measured at 50 °C ambient.
3. Packages: D: SO-8C, G: SMD-8C.
LinkZero-AX is designed to be used in isolated or non-isolated
converters. In either, the tightly specified FEEDBACK (FB) pin voltage
reference enables universal input primary side regulated power
supplies that cost effectively replace unregulated linear transformer
and other switched mode supplies. The start-up and operating power
are derived directly from the DRAIN pin. The internal oscillator
frequency is jittered to significantly reduce both quasi-peak and
average EMI, minimizing filter cost.
www.power.com
November 2015
This Product is Covered by Patents and/or Pending Patent Applications.
LNK584-586
BYPASS/
MULTI FUNCTION
(BP/M)
PU
OPEN LOOP
PULL UP
OVERVOLTAGE
PROTECTION
+
+
GENERATOR
FEEDBACK REF
1.70 V
3V
6.5 V
5.85 V
4.85 V
+
AUTO-RESTART
COUNTER
FEEDBACK
(FB)
RESET
+
DRAIN
(D)
REGULATOR
5.85 V
+
BYPASS PIN
UNDERVOLTAGE
-
FAULT
CURRENT LIMIT
+
JITTER
-
VI
0.9 V
LIMIT
CLOCK
CC CUT BACK
1.70 V - 0.9 V
ADJ
DCMAX
S
Q
R
Q
OSCILLATOR
SYSTEM
POWER
DOWN
POWER
DOWN
COUNTER
160 fOSC
CYCLES
RESET
LEADING
EDGE
BLANKING
PU
PI-5912-111412
SOURCE
(S)
Figure 2. Functional Block Diagram.
Pin Functional Description
DRAIN (D) Pin:
The power MOSFET drain connection provides internal operating
current for both start-up, steady-state and power-down mode
operation.
BYPASS/MULTI-FUNCTIONAL (BP/M) Pin:
An external bypass capacitor, 0.1 mF or greater for the internally
generated 5.85 V supply is connected to this pin. The minimum value
of capacitor is 0.1 mF for internal circuit operation. Higher values may
be required to enter power-down mode (see LinkZero-AX PowerDown (PD) Mode Design Considerations). An overvoltage protection
disables MOSFET switching if the current into the pin exceeds 6.5 mA
(ISD).
FEEDBACK (FB) Pin:
During normal operation, switching of the power MOSFET is
controlled by this pin. MOSFET switching is disabled when a voltage
greater than an internal VFB reference voltage is applied to this pin.
The VFB reference voltage is internally set to 1.70 V. LinkZero-AX
goes into auto-restart mode when the FEEDBACK pin voltage has
come down to 0.9 V.
G Package (SMD-8C)
BP/M
1
FB
2
8
S
7
S
6
D
5
4
3a
D Package (SO-8C)
BP/M
FB
8
2
7
6
S
S
1
D
4
5
S
S
S
S
3b
PI-5910-090810
Figure 3. Pin Configuration.
SOURCE (S) Pin:
This pin is the power MOSFET source connection. It is also the
ground reference for the BYPASS and FEEDBACK pins.
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LNK584-586
LinkZero-AX Functional Description
LinkZero-AX comprises a 700 V power MOSFET switch with a power
supply controller on the same die. Unlike conventional PWM (pulse
width modulation) controllers, it uses a simple ON/OFF control to
regulate the output voltage. The controller consists of an oscillator,
feedback (sense and logic) controller, 5.85 V regulator, BYPASS pin
undervoltage protection, over-temperature protection, frequency
jittering, current limit protection, and leading edge blanking. The
controller includes a proprietary power-down mode that automatically
reduces standby consumption to levels that are immeasurable on
most power meters.
Power-Down Mode
The internal controller will go into power-down mode when 160
switching cycles are skipped. This can occur due to the FEEDBACK
pin being pulled high using an external power-down pulse signal or
due to a light load condition where the total loading on the
transformer (output plus feedback circuit loads) has reduced to
~0.6% of full load. The device then operates in an ultra low
consumption power-down mode where switching is disabled
completely. The controller wakes up (or is reset) when the BYPASS
pin is pulled below 1.5 V and then released to be recharged through
the internal drain connected 5.85 V regulator block (see Figure 2).
When the BYPASS capacitor recharges to the VBP BYPASS pin
threshold, the device starts switching and operates normally. If the
FEEDBACK pin is pulled high such that 160 cycles are again skipped,
the device returns to power-down mode operation as described
above. In applications with dynamic loads it may not be desirable to
go into power-down mode under light or no-load conditions.
Techniques to ensure this is avoided are discussed in the LinkZero-AX
power-down Mode Design Considerations section.
Oscillator
The typical oscillator frequency is internally set to an average of
100 kHz. An internal circuit senses the duty cycle of the MOSFET
switch conduction-time and adjusts the oscillator frequency so that
during long conduction intervals (low-line voltage) the frequency is
about 100 kHz and at short conduction intervals (high-line voltage)
the oscillator frequency is about 78 kHz. This internal frequency
adjustment is used to make the peak power point constant over line
voltage. Two signals are generated from the oscillator: the maximum
duty cycle signal (DCMAX) and the clock signal that indicates the
beginning of a switching cycle.
Output Power Limiting
When the FEEDBACK pin voltage at full load falls below 1.70 V, the
oscillator frequency linearly reduces to typically 60% at the autorestart threshold voltage of 0.9 V. This function limits the power
supply output current and power.
5.85 V Regulator
The BYPASS pin voltage is regulated by drawing a current from the
DRAIN whenever the MOSFET is off if needed to charge up the
BYPASS pin to a typical voltage of 5.85 V. When the MOSFET is on,
LinkZero-AX runs off of the energy stored in the bypass capacitor.
Extremely low power consumption of the internal circuitry allows
LinkZero-AX to operate continuously from the current drawn from the
DRAIN pin. A bypass capacitor value of 0.1 µF is sufficient for both
high frequency decoupling and energy storage.
6.5 V Shunt Regulator and 8.5 V Clamp
In addition, there is a shunt regulator that helps maintain the BYPASS
pin at 6.5 V when current is provided to the BYPASS pin externally.
This facilitates powering the device externally through a resistor from
the bias winding or power supply output in non-isolated designs, to
decrease device dissipation and increase power supply efficiency.
The 6.5 V shunt regulator is only active in normal operation, and
when in power-down mode a clamp at a higher voltage (typical 8.5 V)
will clamp the BYPASS pin.
BYPASS Pin Undervoltage Protection
The BYPASS pin undervoltage circuitry disables the power MOSFET
when the BYPASS pin voltage drops below 4.85 V. Once the BYPASS
pin voltage drops below 4.85 V, it must rise back to 5.85 V to enable
(turn on) the power MOSFET.
BYPASS Pin Overvoltage Protection
If the BYPASS pin gets pulled above 6.5 V and the current into the
shunt exceeds 6.5 mA a latch will be set and the power MOSFET will
stop switching. To reset the latch the BYPASS pin has to be pulled
down to below 1.5 V.
Over-Temperature Protection
The thermal shutdown circuit senses the die temperature. The
threshold is set at 142 °C typical with a 70 °C hysteresis. When the
die temperature rises above this threshold (142 °C) the power
MOSFET is disabled and remains disabled until the die temperature
falls by 70 °C, at which point the MOSFET is re-enabled.
The oscillator incorporates circuitry that introduces a small amount of
frequency jitter, typically 6% of the switching frequency, to minimize
EMI. The modulation rate of the frequency jitter is set to 1 kHz to
optimize EMI reduction for both average and quasi-peak
measurements. The frequency jitter, which is proportional to the
oscillator frequency, should be measured with the oscilloscope
triggered at the falling edge of the DRAIN voltage waveform. The
oscillator frequency is gradually reduced when the FEEDBACK pin
voltage is lowered below 1.70 V.
Current Limit
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (ILIMIT), the power
MOSFET is turned off for the remainder of that cycle. The leading
edge blanking circuit inhibits the current limit comparator for a short
time (tLEB) after the power MOSFET is turned on. This leading edge
blanking time has been set so that current spikes caused by
capacitance and rectifier reverse recovery time will not cause
premature termination of the MOSFET conduction.
Feedback Input Circuit CV Mode
The feedback input circuit reference is set at 1.70 V. When the
FEEDBACK pin voltage reaches a VFB reference voltage (1.70 V), a low
logic level (disable) is generated at the output of the feedback circuit.
This output is sampled at the beginning of each cycle. If high, the
power MOSFET is turned on for that cycle (enabled), otherwise the
power MOSFET remains off (disabled). Since the sampling is done
only at the beginning of each cycle, subsequent changes in the
FEEDBACK pin voltage during the remainder of the cycle are ignored.
Auto Restart
In the event of a fault condition such as output short-circuit,
LinkZero-AX enters into auto-restart operation. An internal counter
clocked by the oscillator gets reset every time the FEEDBACK pin
voltage exceeds the FEEDBACK pin auto-restart threshold voltage
(VFB(AR) typical 0.9 V). If the FEEDBACK pin voltage drops below VFB(AR)
for more than 145 ms to 170 ms depending on the line voltage, the
power MOSFET switching is disabled. The auto-restart alternately
enables and disables the switching of the power MOSFET at a duty
cycle of typically 12% until the fault condition is removed.
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Rev. C 11/15
LNK584-586
Open-Loop Condition on the FEEDBACK Pin
When an open-loop condition on the FEEDBACK pin is detected, an
internal current source pulls up the FEEDBACK pin to above the VFB
(1.70 V), the part stops switching and after 160 clock cycles goes into
latched power-down mode.
Applications Example
The circuit shown in Figure 4 is a typical non-isolated 5 V, 300 mA
output auxiliary power supply using LinkZero-AX. Isolated
configurations are also fully compatible with the LinkZero-AX where
the FEEDBACK pin receives a signal from a primary feedback/bias
winding or through an optocoupler. The circuit of Figure 4 is typical
of auxiliary supplies in white goods where isolation is often not
required. AC input differential filtering is accomplished by the π filter
formed by C1, C2 and L3. The proprietary frequency jitter feature of
the LinkZero-AX eliminates the need for any Y capacitor or commonmode inductor. Wire-wound resistor RF1 is a fusible, flame proof
resistor which is used as a fuse as well as to limit inrush current.
Wire wound types are recommended for designs that operate
>132 VAC to withstand the instantaneous power dissipated when AC
is first applied.
The output voltage is directly sensed through feedback resistors R3
and R9, and regulated by LinkZero-AX (U1) via the FEEDBACK pin.
Capacitor C7 provides high frequency filtering on the FEEDBACK pin
to filter noise and to avoid switching cycle pulse bunching. The
controller in U1 receives feedback from the output through feedback
resistors R9 and R3. Based on that feedback, it enables or disables
the switching of its integrated MOSFET to maintain output regulation.
Switching cycles are skipped once the FEEDBACK pin threshold
voltage (1.70 V) is exceeded. When the voltage on the FEEDBACK pin
falls below the disable threshold (1.70 V), switching cycles are
re-enabled. By adjusting the ratio of enabled to disabled switching
cycles the output voltage is regulated. At increased loads, beyond
the output peak power point, where all switching cycles are enabled,
the FEEDBACK pin voltage begins to reduce as the power supply
output voltage falls. Under this condition the switching frequency is
also reduced to limit the maximum output overload power. When the
FEEDBACK pin voltage drops below the auto-restart threshold
(typically 0.9 V on the FEEDBACK pin), the power supply enters the
auto-restart mode. In this mode, the power supply will turn off for
approximately 1.2 s and then turn back on for approximately 145 ms.
The auto-restart function reduces the average output current during
an output short-circuit condition.
The LinkZero-AX device is self biased through the DRAIN pin. An
optional external bias, can be derived either from a third winding or
from an output voltage rail in non-isolated designs. By providing an
external supply current in excess of IS2 (310 mA for the LNK584) the
internal 5.85 V regulator circuit is disabled providing a simple way to
reduce device temperature and improve efficiency, especially at
high-line.
A clampless primary circuit is achieved due to the very tight tolerance
current limit device, plus the transformer construction techniques
used. The peak drain voltage is therefore limited to typically less than
550 V at 265 VAC, providing significant margin to the 700 V minimum
drain voltage specification (BVDSS).
Output rectification and filtering is achieved with output rectifier D6
and filter capacitor C6. Due to the auto-restart feature, the average
C4
R8 220 pF
5.1 Ω 100 V
L3
1 mH
D6
SS15
R2
4.7 kΩ
D1
1N4007
L4
1.8 µH
T1
3 EE16 8
D2
1N4007
1
10
C6
220 µF
25 V
C9
330 nF
50 V
C1
3.3 µF
400 V
R9
1 kΩ
1%
LinkZero-AX
U1
LNK584DG
C2
3.3 µF
400 V
D
Q1
MMBT3904
FB
BP/M
R16
750 Ω
S
D3
1N4007
5 V, 300 mA
RTN
RF1
10 Ω
2W
85 - 265
VAC
C8
R13 56 µF
510 Ω 16 V
D4
1N4007
R12
20 kΩ
R10
20 kΩ
PD Set
R11
100 Ω
C5
150 nF
25 V
C10
47 µF
25 V
C7
1 nF
50 V
R3
511 Ω
1%
SW1
Q2
MMBT3904
PD Reset
R4
10 kΩ
R14
2 kΩ
RTN
PI-6121-101210
Figure 4. Schematic of Non-Isolated 1.5 W, 5 V, 300 mA, 0.00 W Standby Consumption Power Supply.
4
Rev. C 11/15
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LNK584-586
short-circuit output current is significantly less than 1 A, allowing low
current rating and low cost rectifier D6 to be used. Output circuitry is
designed to handle a continuous short-circuit on the power supply
output. In this design a preload resistor R13 is used at the output of
the supply to prevent automatic triggering of the power-down mode
when the load is removed.
LinkZero-AX Power-Down (PD) Mode
Design Considerations
LinkZero-AX goes into power-down mode when 160 consecutive
switching cycles have been skipped. This condition occurs when the
output load is low or the FEEDBACK pin is pulled high (for example
through Q1 and R16 in Figure 4). The value of the BYPASS pin
capacitor must be high enough to sustain enough current through
R16 for more than the period of 160 switching cycles to successfully
trigger the power-down mode. At low-line input voltage (90 VAC) the
160 switching cycle period is ~1.6 ms as the internal oscillator
frequency is 100 kHz. However as the input line voltage increases,
the internal oscillator frequency is gradually reduced to keep the
maximum output power relatively constant. At high-line (265 VAC)
therefore, the internal oscillator frequency can be as low as 78 kHz
(see parameter table Note C). Therefore to provide sufficient margin
to ensure power-down mode is triggered it is recommended that the
power-down pulse (see Figure 1) is 2.5 ms (200 switching cycles at
80 kHz). LinkZero-AX stops switching once the power-down mode is
triggered. The IC does not resume switching until the BYPASS pin is
pulled below 1.5 V using the reset/wake up pulse (see Figure 1) and
then allowed to recharge back up to 5.85 V through the drain
connected 5.85 V regulator block. Transistor Q2 or mechanical switch
SW1 can be used for resetting the power-down mode either
electronically or mechanically.
It is important to design the power supply to ensure that load
transients and other external events do not unintentionally trigger
power-down mode by causing 160 consecutive switching cycles to be
skipped. It is recommended that a preload resistor is added to draw
~2% of the full load current (12 mA at 5 V in a 3 W power supply).
Although this reduces full load efficiency slightly, it has no influence
on the power consumption during power-down mode since the power
supply output is fully discharged under this condition. Low value
feedback resistors may also be used as a preload too. Recommended
value of the feedback resistors is such that they should draw ~1% of
full load current. Finally a capacitor in parallel to the high side
feedback resistor can be used to increase the speed of the loop (C9
in Figure 4).
These recommendations apply for full load to zero load transients.
For applications with more limited load range, the preload and the
capacitor in parallel to the high side feedback resistor may not be
necessary.
Layout Considerations
LinkZero-AX Layout Considerations
Layout
See Figure 5 for a recommended circuit board layout for LinkZero-AX
(U1).
Single Point Grounding
Use a single point ground (Kelvin) connection from the input filter
capacitor to the area of copper connected to the SOURCE pins.
Bypass Capacitor (CBP), FEEDBACK Pin Noise Filter Capacitor
(CFB) and Feedback Resistors
To minimize loop area, these two capacitors should be physically
located as near as possible to the BYPASS and SOURCE pins, and
FEEDBACK pin and source pins respectively. Also note that to
minimize noise pickup, feedback resistors RFB1 and RFB2 are placed
close to the FEEDBACK pin.
Primary Loop Area
The area of the primary loop that connects the input filter capacitor,
transformer primary and LinkZero-AX should be kept as small as
possible.
Primary Clamp Circuit
An external clamp may be used to limit peak voltage on the DRAIN
pin at turn off. This can be achieved by using an RCD clamp or a
Zener (~200 V) and diode clamp across the primary winding. In all
cases, to minimize EMI, care should be taken to minimize the circuit
path from the clamp components to the transformer and LinkZero-AX
(U1).
Thermal Considerations
The copper area underneath the LinkZero-AX (U1) acts not only as a
single point ground, but also as a heat sink. As it is connected to the
quiet source node, this area should be maximized for good heat
sinking of U1. The same applies to the cathode of the output diode.
Y Capacitor
The placement of the Y-type capacitor (if used) should be directly
from the primary input filter capacitor positive terminal to the
common/return terminal of the transformer secondary. Such a
placement will route high magnitude common-mode surge currents
away from U1. Note: If an input π EMI filter is used, the inductor in
the π filter should be placed between the negative terminals on the
input filter capacitors.
Output Diode (DO)
For best performance, the area of the loop connecting the secondary
winding, the output diode (DO) and the output filter capacitor (CO)
should be minimized. In addition, sufficient copper area should be
provided at the anode and cathode terminals of the diode for heat
sinking. A larger area is preferred at the electrically “quiet” cathode
terminal. A large anode area can increase high frequency conducted
and radiated EMI. Resistor RS and CS represent the secondary side
RC snubber.
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Rev. C 11/15
LNK584-586
DB
CB
RS
CS
DBP
RBP
DO
RFB2
CFB
CO
CBP
RFB1
R6
Transformer
U1
J3
–
HV DC
IN
T1
+
–
+
LV DC
OUT
PI-6098-092410
Figure 5. PCB Layout of a 2.1 W, 6 V, 350 mA Charger.
Quick Design Checklist
As with any power supply design, all LinkZero-AX designs should be
verified on the bench to make sure that component specifications are
not exceeded under worst-case conditions. The following minimum
set of tests is strongly recommended:
1. Maximum drain voltage – Verify that VDS does not exceed 660 V at
the highest input voltage and peak (overload) output power. This
margin to the 700 V BVDSS specification gives margin for design
variation, especially in clampless designs.
2. Maximum drain current – At maximum ambient temperature,
maximum input voltage and peak output (overload) power, verify
drain current waveforms for any signs of transformer saturation
and excessive leading-edge current spikes at start-up. Repeat
under steady state conditions and verify that the leading-edge
current spike event is below ILIMIT(MIN) at the end of the tLEB(MIN).
Under all conditions, the maximum drain current should be below
the specified absolute maximum ratings.
3. Thermal check – At specified maximum output power, minimum
input voltage and maximum ambient temperature, verify that the
temperature specifications are not exceeded for LinkZero-AX,
transformer, output diode and output capacitors. Enough thermal
margin should be allowed for part-to-part variation of the RDS(ON) of
LinkZero-AX as specified in the data sheet. Under low-line and
maximum power, maximum LinkZero-AX source pin temperature
of 100 °C is recommended to allow for these variations.
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LNK584-586
Absolute Maximum Ratings(1,6)
DRAIN Voltage .........................................................-0.3 V to 700 V
Peak DRAIN Current(2): LNK584....................................200 (375) mA
LNK585.................................... 370 (680) mA
LNK586....................................440 (825) mA
Peak Negative Pulsed Drain Current(3).....................................-100 mA
Feedback Voltage ............................................................ -0.3 V to 9 V
Feedback Current ....................................................................100 mA
BYPASS Pin Voltage ........................................................ -0.3 V to 9 V
BYPASS Pin Voltage in Power-Down Mode(7)...................-0.3 V to 11 V
Storage Temperature .................................................-65 °C to 150 °C
Operating Junction Temperature(4)............................-40 °C to 150 °C
Lead Temperature(5) .............................................................. 260 °C
Notes:
1. All voltages referenced to SOURCE, TA = 25 °C.
2. Higher peak DRAIN current allowed while DRAIN source voltage
does not exceed 400 V.
3. Duration not to exceed 2 ms.
4. Normally limited by internal circuitry.
5. 1/16 in. from case for 5 seconds.
6. Maximum ratings specified may be applied, one at a time without
causing permanent damage to the product. Exposure to
Absolute Maximum ratings for extended periods of time may
affect product reliability.
7. Maximum current into pin is 300 mA.
Thermal Resistance
Thermal Resistance: D Package:
(qJA) ................................... 100 °C/W(2); 80 °C/W(3)
(qJC) ......................................................30 °C/W(1)
G Package:
(qJA) .....................................70 °C/W(2); 60 °C/W(3)
(qJC) ...................................................... 11 °C/W(1)
Parameter
Notes:
1. Measured on the SOURCE pin close to plastic interface.
2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. copper clad.
3. Soldered to 1 sq. in. (645 mm2), 2 oz. copper clad.
Symbol
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
(Unless Otherwise Specified)
Min
Typ
Max
Units
fOSC
TJ = 25 °C
VFB = 1.70 V, See Note B
93
100
107
kHz
Control Functions
Output Frequency
Frequency Jitter
Peak-Peak Jitter Compared to
Average Frequency, TJ = 25 °C
±3
%
TJ = 25 °C
VFB = VFB(AR)
60
%
%
Ratio of Output
Frequency at
Auto-Restart to fOSC
fOSC(AR)
fOSC
Maximum Duty Cycle
DCMAX
60
63
FEEDBACK Pin Voltage
VFB
1.63
1.70
1.77
V
FEEDBACK Pin Voltage
at Auto-Restart
VFB(AR)
0.8
0.9
1.05
V
Minimum Switch
ON-Time
tON(MIN)
IS1
DRAIN Supply Current
IS2
700
Feedback Voltage > VFB
(MOSFET not Switching)
0.9 V ≤ VFB ≤ 1.70 V
(MOSFET Switching)
ns
200
260
LNK584
260
310
LNK585
275
330
LNK586
285
340
mA
mA
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Rev. C 11/15
LNK584-586
Parameter
Symbol
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
(Unless Otherwise Specified)
Min
Typ
Max
LNK584
-5.5
-3.8
-1.8
LNK585-586
-7.0
-5.3
-3.3
LNK584
-3.8
-2.5
-1.0
LNK585-586
-4.8
-3.5
-2.0
Units
Control Functions (cont.)
ICH1
BYPASS Pin
Charge Current
ICH2
VBP = 0 V,
TJ = 25 °C
VBP = 4 V,
TJ = 25 °C
mA
BYPASS Pin Voltage
VBP
5.60
5.85
6.10
V
BYPASS Pin
Voltage Hysteresis
VBP(H)
0.8
1.0
1.2
V
BYPASS Pin
Shunt Voltage
BPSHUNT
6.1
6.5
6.9
V
BYPASS Pin
Supply Current
IBPSC
See Note D
84
mA
Circuit Protection
Current Limit
Power Coefficient
ILIMIT
I2 f
di/dt = 40 mA/ms
TJ = 25 °C
LNK584
126
136
146
di/dt = 75 mA/ms
TJ = 25 °C
LNK585
232
250
268
di/dt = 90 mA/ms
TJ = 25 °C
LNK586
279
300
321
di/dt = 40 mA/ms
TJ = 25 °C
LNK584
1665
1850
2091
di/dt = 75 mA/ms
TJ = 25 °C
LNK585
5625
6250
7063
di/dt = 90 mA/ms
TJ = 25 °C
LNK586
8100
9000
10170
mA
A2Hz
Leading Edge
Blanking Time
tLEB
TJ = 25 °C
220
265
BYPASS Pin Shutdown
Threshold Current
ISD
VBP = BPSHUNT
See Note F
5.0
6.5
8.0
mA
Thermal Shutdown
Temperature
TSD
See Note A
135
142
150
°C
Thermal Shutdown
Hysteresis
TSD(H)
See Note A
70
OFF-State Drain Leakage
in Power-Down Mode
IDSS(PD)
TJ = 25 °C, VDRAIN = 325 V
See Figure 21
6.5
9
mA
BYPASS Pin Overvoltage
Protection in Power-Down
Mode
VBP(PDP)
IBP = 300 mA
-5 °C ≤ TJ ≤ 100 °C
7.0
8.5
10.9
V
BYPASS Pin Power-Up
Reset Threshold (in
Power-Down Mode or at
Power Supply Start-up)
VBP(PU)
1.5
3
4
V
ns
°C
Power-Down (PD) Mode
8
Rev. C 11/15
www.power.com
LNK584-586
Parameter
Symbol
Conditions
SOURCE = 0 V; TJ = -40 to 125 °C
(Unless Otherwise Specified)
Min
Typ
Max
Units
Power-Down (PD) Mode (cont.)
BYPASS Pin Voltage in
Power-Down Mode
BYPASS Pin PowerDown to Power-Up
Threshold Delta
BYPASS Pin Supply
Current in Power-Down
Mode
VBP(PD)
IBP = 500 mA
4
VBP(PD) - VBP(PU)
VBP = VBP(PD)
See Note E
IBPSC(PD)
V
0.5
V
500
mA
Output
LNK584
ID = 13 mA
ON-State
Resistance
RDS(ON)
LNK585
ID = 26 mA
LNK586
ID = 33 mA
Breakdown
Voltage
BVDSS
TJ = 25 °C
48
55
TJ = 100 °C
76
88
TJ = 25 °C
24
28
TJ = 100 °C
38
44
TJ = 25 °C
19
22
TJ = 100 °C
30
35
VBP = 6.2 V, TJ = 25 °C
DRAIN Supply
Voltage
Auto-Restart
ON-Time
t AR
Auto-Restart
Duty Cycle
Output Enable Delay
tEN
VIN = 85 VAC, TJ = 25 °C,
See Note C
W
700
V
50
V
145
ms
11
%
See Figure 8
14
ms
NOTES:
A. This parameter is derived from characterization.
B. Output frequency specification applies to low-line input voltage in the final application. The controller is designed to reduce output
frequency by approximately 20% at high-line input voltages to balance low-line and high-line maximum output power.
C. The auto-restart on-time/off-time is increased by 20% from low to high-line voltage input (85 VAC to 265 VAC).
D. IBPSC is the current that can be supplied from the BYPASS pin at 5.85 V when in normal switching mode of operation to power an optional
external circuit. The current will be supplied from the Drain via the internal BYPASS pin voltage regulator. When calculating the power
consumption the IBPSC (84 mA max) and the drain voltage has to be taken into account. More current can be sourced during power-down
mode – see Note E.
IBPSC(PD) is the current that can be supplied from the BYPASS pin at 4 V when in power-down mode to power an optional external circuit. The
current will be supplied from the Drain via the internal BYPASS pin voltage regulator. Lower current is available during normal operation –
see Note D. If the external circuit requires current in excess of IBP(PD) in power-down mode, it must be supplied from an external source such
as a bias winding. The IBP(PD) current adds to power supply power consumption during power-down mode – for example at 230 VAC (325
VDC rectified DC rail voltage) the power consumption with be 325 × IBP(PD).
E. LinkZero-AX shuts down if the current into the BYPASS pin reaches ISD at the BPSHUNT voltage.
9
www.power.com
Rev. C 11/15
LNK584-586
BP/M
S
FB
S
S
0-2 V
0.1 µF
S1
D
470 Ω
5W
S
50 V
PI-6067-072110
Figure 6. General Test Circuit.
DCMAX
(internal signal)
tP
FB
tEN
VDRAIN
tP =
1
fOSC
PI-3707-112503
Figure 8. Output Enable Timing.
PI-4021-101305
DRAIN Current (mA)
Figure 7. Duty Cycle Measurement.
100
2 ∝s
0
-100
Time (∝s)
Figure 9. Peak Negative Pulsed DRAIN Current Waveform.
10
Rev. C 11/15
www.power.com
LNK584-586
Typical Performance Characteristics
1.0
0.9
-50 -25
0
25
50
PI-6065-071910
1.2
Output Frequency
(Normalized to 25 °C)
PI-2213-012301
Breakdown Voltage
(Normalized to 25 ° C)
1.1
1.0
0.8
0.6
0.4
0.2
0
75 100 125 150
-50
-25
Junction Temperature (° C)
Figure 10. Breakdown vs. Temperature.
25
50
75
100 125
Figure 11. Frequency vs. Temperature.
1.0
0.8
PI-4057-071905
Current Limit
(Normalized to 25 °C)
1.2
1.1
FEEDBACK Pin Voltage
(Normalized to 25 °C)
PI-6066-071910
1.4
1.0
0.6
0.4
0.2
0.9
0
-50
0
50
100
-50 -25
150
0
25
50
75 100 125 150
Temperature (°C)
Temperature (°C)
Figure 12. Current Limit vs. Temperature.
Figure 13. FEEDBACK Pin Voltage vs. Temperature.
5
4
3
2
1
PI-3927-083104
6
200
175
DRAIN Current (mA)
PI-2240-012301
7
BYPASS Pin Voltage (V)
0
Junction Temperature (°C)
150
125
100
75
50
25
0
0
0
0.2
0.4
0.6
0.8
Time (ms)
Figure 14. BYPASS Pin Start-up Waveform (CBP = 0.22 mF).
1.0
0
2
4
6
8 10 12 14 16 18 20
DRAIN Voltage (V)
Figure 15. Output Characteristics.
11
www.power.com
Rev. C 11/15
LNK584-586
Typical Performance Characteristics (cont.)
100
Frequency (kHz)
100
10
PI-6068-071910
110
PI-3928-083104
Drain Capacitance (pF)
1000
90
80
70
1
60
0
100
200
300
400
500
0
600
10
Drain Voltage (V)
50
60
70
30
20
10
0
-10
PI-6071-071910
40
0
-2
FEEDBACK Pin Current
PI-6070-071910
FEEDBACK Pin Current
40
Figure 17. Frequency Reduction vs. Duty Cycle (Line Voltage).
50
-20
-4
-6
-8
-10
-12
-14
-16
-18
-20
-30
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8
7.0
FEEDBACK Pin Voltage
FEEDBACK Pin Voltage
Figure 18. FEEDBACK Pin Input Characteristics.
Figure 19. FEEDBACK Pin Input Characteristics During Output
Power Limiting (1.70 V to 0.9 V).
Auto-Restart
PI-6111-081810
10
9
Drain Current (µA)
PI-6139-091010
FEEDBACK Pin Current (µA)
30
Duty Cycle (%)
Figure 16. CDSS vs. Drain Voltage.
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
-11
-12
-13
-14
-15
20
8
7
6
5
4
3
2
1
0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Frequency Normalized to 1
Figure 20. Frequency Cut Back During Output Power Limiting.
-50
-25
0
25
50
75
100 125
Temperature (°C)
Figure 21. Typical Drain Current vs. Temperature in
Power-Down Mode.
12
Rev. C 11/15
www.power.com
LNK584-586
SO-8C (D Package)
4
B
0.10 (0.004) C A-B 2X
2
DETAIL A
4.90 (0.193) BSC
A
4
8
D
5
2 3.90 (0.154) BSC
GAUGE
PLANE
SEATING
PLANE
6.00 (0.236) BSC
0-8
C
1.04 (0.041) REF
2X
0.10 (0.004) C D
Pin 1 ID
1
4
1.35 (0.053)
1.75 (0.069)
0.25 (0.010)
BSC
0.40 (0.016)
1.27 (0.050)
0.20 (0.008) C
2X
7X 0.31 - 0.51 (0.012 - 0.020)
0.25 (0.010) M C A-B D
1.27 (0.050) BSC
o
1.25 - 1.65
(0.049 - 0.065)
DETAIL A
0.10 (0.004)
0.25 (0.010)
7X
0.10 (0.004) C
H
SEATING PLANE
C
Reference
Solder Pad
Dimensions
+
2.00 (0.079)
+
D07C
0.17 (0.007)
0.25 (0.010)
1.27 (0.050)
4.90 (0.193)
+
+
0.60 (0.024)
Notes:
1. JEDEC reference: MS-012.
2. Package outline exclusive of mold flash and metal burr.
3. Package outline inclusive of plating thickness.
4. Datums A and B to be determined at datum plane H.
5. Controlling dimensions are in millimeters. Inch dimensions
are shown in parenthesis. Angles in degrees.
PI-4526-040110
13
www.power.com
Rev. C 11/15
LNK584-586
SMD-8C (G Package)
⊕ D S .004 (.10)
.046 .060
.060 .046
-E-
.080
.086
Pin 1
.137 (3.48)
MINIMUM
Solder Pad Dimensions
.420
.367 (9.32)
.387 (9.83)
.057 (1.45)
.068 (1.73)
(NOTE 5)
.125 (3.18)
.145 (3.68)
.032 (.81)
.037 (.94)
.286
Pin 1
.100 (2.54) (BSC)
-D-
.186
.372 (9.45)
.388 (9.86)
⊕ E S .010 (.25)
.240 (6.10)
.260 (6.60)
Notes:
1. Controlling dimensions are
inches. Millimeter sizes are
shown in parentheses.
2. Dimensions shown do not
include mold flash or other
protrusions. Mold flash or
protrusions shall not exceed
.006 (.15) on any side.
3. Pin locations start with Pin 1,
and continue counter-clockwise to Pin 8 when viewed
from the top. Pin 3 is omitted.
4. Minimum metal to metal
spacing at the package body
for the omitted lead location
is .137 inch (3.48 mm).
5. Lead width measured at
package body.
6. D and E are referenced
datums on the package
body.
.048 (1.22)
.053 (1.35)
.004 (.10)
.009 (.23)
.004 (.10)
.012 (.30)
.036 (0.91)
.044 (1.12)
0°- 8°
G08C
PI-4015-101507
14
Rev. C 11/15
www.power.com
LNK584-586
SO-8C PACKAGE MARKING
B
A
A.
B.
C.
D.
1535
LNK586DG
3V576D
C
D
Power Integrations Registered Trademark
Assembly Date Code (last two digits of year followed by 2-digit work week)
Product Identification (Part #/Package Type)
Lot Identification Code
PI-6623-040615
SMD-8C PACKAGE MARKING
B
A
A.
B.
C.
D.
1535
LNK586GG
86217G
C
D
Power Integrations Registered Trademark
Assembly Date Code (last two digits of year followed by 2-digit work week)
Product Identification (Part #/Package Type)
Lot Identification Code
PI-6624-040615
15
www.power.com
Rev. C 11/15
LNK584-586
MSL Table
Part Number
MSL Rating
LNK584DG
LNK585DG
LNK586DG
1
LNK584GG
LNK585GG
LNK586GG
4
ESD and Latch-Up
Test
Conditions
Results
Latch-up at 125 °C
JESD78C
Human Body Model ESD
ANSI/ESDA/JEDEC JS-001-2014
Passes ±2000 V on all pins
Machine Model ESD
JESD22-A115C
Passes ±200 V on all pins
> ±100 mA or > 1.5 V (max) on all pins
Part Ordering Information
• LinkSwitch Product Family
• AX Series Number
• Package Identifier
D
Plastic SO-8C
G
Plastic SMD-8C
• Package Material
G
GREEN: Halogen Free and RoHS Compliant
• Tape & Reel and Other Options
Blank
LNK 584
D G - TL
TL
Standard Configurations
Tape & Reel, 2.5 k pcs minimum for D package, 1 k pcs minimum for G Package.
16
Rev. C 11/15
www.power.com
LNK584-586
Notes
17
www.power.com
Rev. C 11/15
Revision Notes
Date
A
Initial release.
10/10
B
Added LNK585 and LNK586.
05/11
B
Corrected Figure 2.
C
Updated with new Brand Style. Added Package Marking, ESD and MSL tables.
11/14/12
11/15
For the latest updates, visit our website: www.power.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations
does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY
HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one
or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of
Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set
forth at http://www.power.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose
failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or
death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS,
HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are trademarks of Power
Integrations, Inc. Other trademarks are property of their respective companies. ©2015, Power Integrations, Inc.
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Customer Service:
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