TNY178PN

TNY174-180 TinySwitch-LT Family Energy Efficient, Offline Switcher with Enhanced Flexibility and Extended Power Range Product Highlights Lowest System Cost with Enhanced Flexibility • 650 V rated integrated MOSFET • Simple ON/OFF control, no loop compensation needed • Selectable current limit through BP/M capacitor value • Higher current limit extends peak power or, in open frame applications, maximum continuous power • Lower current limit improves efficiency in enclosed adapters/ chargers • Allows optimum TinySwitch-LT choice by swapping devices with no other circuit redesign • Tight I2f parameter tolerance reduces system cost • Maximizes MOSFET and magnetics power delivery • Minimizes max overload power, reducing cost of transformer, primary clamp & secondary components • ON-time extension – extends low-line regulation range/hold-up time to reduce input bulk capacitance • Self-biased: no bias winding or bias components • Frequency jittering reduces EMI filter costs • Pin-out simplifies heat sinking to the PCB • SOURCE pins are electrically quiet for low EMI Enhanced Safety and Reliability Features • Accurate hysteretic thermal shutdown protection with automatic recovery eliminates need for manual reset • Auto-restart delivers IDIS (MOSFET Not Switching) See Note A EN Open (MOSFET Switching at fOSC) See Note B kHz % 290 mA V mA TNY174P/D 275 370 TNY175P/D 295 410 TNY176P/D 310 440 TNY177P/D 365 480 TNY178P/D 445 605 TNY179P 510 700 TNY180P 630 850 mA 11 www.power.com Rev. J 10/20 TNY174-180 Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 14 (Unless Otherwise Specified) Min Typ Max Units TNY174 -6 -3.8 -1.8 TNY175-179 -8.3 -5.4 -2.5 TNY180 -9.7 -6.8 -3.9 TNY174 -4.1 -2.3 -1 TNY175-179 -5 -3.5 -1.5 TNY180 -6.6 -4.6 -2.1 5.6 5.85 6.15 V 0.80 0.95 1.20 V 6.0 6.4 6.7 V TNY174P 233 250 267 TNY174D 233 250 273 TNY175P 256 275 294 TNY175D 256 275 300 TNY176P 326 350 374 TNY176D 326 350 382 TNY177P 419 450 481 TNY177D 419 450 491 TNY178P 512 550 588 TNY178D 512 550 599 di/dt = 130 mA/ms TJ = 25 °C See Note E TNY179P 605 650 695 di/dt = 150 mA/ms TJ = 25 °C See Note E TNY180P 698 750 802 Control Functions (cont.) ICH1 VBP/M = 0 V, TJ = 25 °C See Note C, D BP/M Pin Charge Current ICH2 BP/M Pin Voltage VBP/M BP/M Pin Voltage Hysteresis VBP/MH BP/M Pin Shunt Voltage VSHUNT VBP/M = 4 V, TJ = 25 °C See Note C, D See Note C IBP = 2 mA mA Circuit Protection di/dt = 50 mA/ms TJ = 25 °C See Note E di/dt = 55 mA/ms TJ = 25 °C See Note E di/dt = 70 mA/ms TJ = 25 °C See Note E Standard Current Limit (BP/M Capacitor = 0.1 mF) See Note D ILIMIT di/dt = 90 mA/ms TJ = 25 °C See Note E di/dt = 110 mA/ms TJ = 25 °C See Note E mA 12 Rev. J 10/20 www.power.com TNY174-180 Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 14 (Unless Otherwise Specified) Min Typ Max TNY174P 196 210 233 TNY174D 196 210 237 TNY175P 233 250 277 TNY175D 233 250 283 TNY176P 256 275 305 TNY176D 256 275 311 TNY177P 326 350 388 TNY177D 326 350 396 TNY178P 419 450 499 TNY178D 419 450 508 di/dt = 130 mA/ms TJ = 25 °C See Notes E TNY179P 512 550 610 di/dt = 150 mA/ms TJ = 25 °C See Notes E TNY180P 605 650 721 TNY174P 196 210 233 TNY174D 196 210 237 TNY175P 326 350 388 TNY175D 326 350 396 TNY176P 419 450 499 TNY176D 419 450 509 TNY177P 512 550 610 TNY177D 512 550 622 TNY178P 605 650 721 TNY178D 605 650 734 di/dt = 130 mA/ms TJ = 25 °C See Notes E TNY179P 698 750 833 di/dt = 150 mA/ms TJ = 25 °C See Notes E TNY180P 791 850 943 Units Circuit Protection (cont.) di/dt = 50 mA/ms TJ = 25 °C See Note E di/dt = 55 mA/ms TJ = 25 °C See Note E di/dt = 70 mA/ms TJ = 25 °C See Notes E Reduced Current Limit (BP/M Capacitor = 1 mF) See Note D ILIMITred di/dt = 90 mA/ms TJ = 25 °C See Notes E di/dt = 110 mA/ms TJ = 25 °C See Notes E di/dt = 50 mA/ms TJ = 25 °C See Notes E, F di/dt = 55 mA/ms TJ = 25 °C See Notes E di/dt = 70 mA/ms TJ = 25 °C See Notes E Increased Current Limit (BP/M Capacitor = 10 mF) See Note D ILIMITinc di/dt = 90 mA/ms TJ = 25 °C See Notes E di/dt = 110 mA/ms TJ = 25 °C See Notes E mA mA 13 www.power.com Rev. J 10/20 TNY174-180 Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 14 (Unless Otherwise Specified) Min Typ Max TNY174-180P 0.9 × I2 f I2 f 1.12 × I2 f TNY174-178D 0.9 × I2f I2 f 1.16 × I2 f TNY174-180P 0.9 × I2 f I2 f 1.16 × I2 f TNY174-178D 0.9 × I2f I2 f 1.20 × I2 f TNY174-180P 0.9 × I2 f I2 f 1.16 × I2 f TNY174-178D 0.9 × I2f I2 f 1.20 × I2 f Units Circuit Protection (cont.) Standard Current Limit, I2f = ILIMIT(TYP)2 × fOSC(TYP) Power Coefficient I2f Reduced Current Limit, I2f = ILIMITred(TYP)2 × fOSC(TYP) Increased Current Limit, I2f = ILIMITinc(TYP)2 × fOSC(TYP) A2Hz Initial Current Limit IINIT See Figure 19 TJ = 25 °C, See Note G 0.75 × ILIMIT(MIN) Leading Edge Blanking Time tLEB TJ = 25 °C See Note G 170 Current Limit Delay tILD TJ = 25 °C See Note G, H Thermal Shutdown Temperature TSD Thermal Shutdown Hysteresis TSDH BP/M Pin Shutdown Threshold Current ISD 4 6.5 9 mA VBP/M(RESET) 1.6 2.6 3.6 V TJ = 25 °C 28 32 TJ = 100 °C 42 48 TJ = 25 °C 19 22 TJ = 100 °C 29 33 TJ = 25 °C 14 16 TJ = 100 °C 21 24 BP/M Pin Power-Up Reset Threshold Voltage 135 mA 215 ns 150 ns 142 150 75 °C °C Output TNY174P/D ID = 25 mA ON-State Resistance RDS(ON) TNY175P/D ID = 28 mA TNY176P/D ID = 35 mA W 14 Rev. J 10/20 www.power.com TNY174-180 Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 14 (Unless Otherwise Specified) Min Typ Max TJ = 25 °C 7.8 9.0 TJ = 100 °C 11.7 13.5 TJ = 25 °C 5.2 6.0 TJ = 100 °C 7.8 9.0 TJ = 25 °C 3.9 4.5 TJ = 100 °C 5.8 6.7 Units Output (cont.) TNY177P/D ID = 45 mA TNY178P/D ID = 55 mA ON-State Resistance RDS(ON) TNY179P ID = 65 mA IDSS1 OFF-State Drain Leakage Current IDSS2 Breakdown Voltage BVDSS TNY180P ID = 75 mA TJ = 25 °C 2.6 3.0 TJ = 100 °C 3.9 4.5 VBP/M = 6.2 V TNY174-176 50 TNY177-178 100 TNY179-180 200 VEN = 0 V VDS = 520 V TJ = 125 °C See Note I VDS = 375 V, TJ = 50 °C See Note G, I VBP/M = 6.2 V VEN = 0 V VBP = 6.2 V, VEN = 0 V, See Note J, TJ = 25 °C DRAIN Supply Voltage Auto-Restart ON-Time at fOSC Auto-Restart Duty Cycle W mA 15 650 V 50 V t AR TJ = 25 °C See Note K 64 ms DC AR TJ = 25 °C 3 % 15 www.power.com Rev. J 10/20 TNY174-180 NOTES: A. IS1 is an accurate estimate of device controller current consumption at no-load, since operating frequency is so low under these conditions. Total device consumption at no-load is the sum of IS1 and IDSS2. B. Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the DRAIN. An alternative is to measure the BP/M pin current at 6.1 V. C. BP/M pin is not intended for sourcing supply current to external circuitry. D To ensure correct current limit it is recommended that nominal 0.1 mF / 1 mF / 10 mF capacitors are used. In addition, the BP/M capacitor value tolerance should be equal or better than indicated below across the ambient temperature range of the target application. The minimum and maximum capacitor values are guaranteed by characterization. Nominal BP/M Pin Cap Value Tolerance Relative to Nominal Capacitor Value Min Max 0.1 mF -60% +100% 1 mF -50% +100% 10 mF -50% NA E. For current limit at other di/dt values, refer to Figure 21. F. TNY174 does not set an increased current limit value, but with a 10 mF BP/M pin capacitor the current limit is the same as with a 1 mF BP/M pin capacitor (reduced current limit value). G. This parameter is derived from characterization. H. This parameter is derived from the change in current limit measured at 1X and 4X of the di/dt shown in the ILIMIT specification. I. IDSS1 is the worst-case OFF-state leakage specification at 80% of BVDSS and maximum operating junction temperature. IDSS2 is a typical specification under worst-case application conditions (rectified 265 VAC) for no-load consumption calculations. J. Breakdown voltage may be checked against minimum BVDSS specification by ramping the DRAIN pin voltage up to but not exceeding minimum BVDSS. K. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency). 16 Rev. J 10/20 www.power.com TNY174-180 470 Ω 5W S2 470 Ω S D S1 S S S BP/M EN 50 V 10 V 0.1 µF NOTE: This test circuit is not applicable for current limit or output characteristic measurements. PI-4774-073107 Figure 14. General Test Circuit. DCMAX t2 HV (internal signal) t1 tP 90% 90% EN DRAIN VOLTAGE 0V t D= 1 t2 tEN VDRAIN 10% tP = PI-2048-050798 1 fOSC PI-4780-060915 Figure 15. Duty Cycle Measurement. Figure 16. Output Enable Timing. PI-4279-013006 0.8 Figure 17. Current Limit Envelope. 17 www.power.com Rev. J 10/20 TNY174-180 Typical Performance Characteristics 1.0 0.9 -50 -25 0 25 50 PI-4280-012306 1.2 Output Frequency (Normalized to 25 °C) PI-2213-012301 Breakdown Voltage (Normalized to 25 °C) 1.1 1.0 0.8 0.6 0.4 0.2 0 75 100 125 150 -50 Junction Temperature (°C) 0.8 0.6 0.4 0.2 0 50 100 PI-4775-073107 1.0 0.8 TNY174 TNY175 TNY176 TNY177 TNY178 TNY179 TNY180 0.6 0.4 0.2 1 2 3 4 100 TCASE=25 °C TCASE=100 °C PI-4083-112018 1000 Drain Capacitance (pF) PI-4776-060915 Drain Current (mA) Note: For the normalized current limit value, use the typical current limit specified for the appropriate BP/M capacitor. Normalized di/dt Scaling Factors: TNY174 1.0 TNY175 1.5 TNY176 2.0 TNY177 3.5 TNY178 5.5 TNY179 7.3 TNY180 11 50 Normalized di/dt = 1 50 mA/µs 55 mA/µs 70 mA/µs 90 mA/µs 110 mA/µs 130 mA/µs 150 mA/µs Figure 21. Current Limit vs. di/dt. 300 0 100 125 0 150 Figure 20. Standard Current Limit vs. Temperature. 150 75 1.2 Temperature (°C) 200 50 1.4 Normalized Current Limit PI-4102-010906 Standard Current Limit (Normalized to 25 °C) 1 250 25 Figure 19. Frequency vs. Temperature. 1.2 0 0 Junction Temperature (°C) Figure 18. Breakdown vs. Temperature. -50 -25 100 Scaling Factors: TNY174 1.0 TNY175 1.5 TNY176 2.0 TNY177 3.5 TNY178 5.5 TNY179 7.3 TNY180 11 10 1 0 2 4 6 8 DRAIN Voltage (V) Figure 22. Output Characteristic. 10 0 100 200 300 400 500 600 Drain Voltage (V) Figure 23. COSS vs. Drain Voltage. 18 Rev. J 10/20 www.power.com TNY174-180 Typical Performance Characteristics (cont.) Scaling Factors: TNY174 1.0 TNY175 1.5 TNY176 2.0 TNY177 3.5 TNY178 5.5 TNY179 7.3 TNY180 11 40 Power (mW) PI-4778-060915 50 30 20 10 0 0 200 400 600 DRAIN Voltage (V) Figure 24. Drain Capacitance Power. 19 www.power.com Rev. J 10/20 TNY174-180 PDIP-8C (P Package) -E- .06 in [1.41 mm] ⊕ D S .004 (.10) ∅.03 in [0.86 mm] .10 in [2.54 mm] Typ .240 (6.10) .260 (6.60) .30 in [7.62 mm] ∅.06 in 0.200 in [1.41 mm] [5.08 mm] Pin 1 -D- .356 (9.05) .387 (9.83) .057 (1.45) .068 (1.73) (NOTE 6) .125 (3.18) .145 (3.68) -T- .30 in [7.62 mm] .015 (.38) MINIMUM SEATING PLANE .118 (3.00) .140 (3.56) .100 (2.54) BSC .014 (.36) .022 (.56) .048 (1.22) .068 (1.73) ⊕T .137 (3.48) MINIMUM E D S .010 (.25) M .008 (.20) .015 (.38) .300 (7.62) BSC (NOTE 7) .300 (7.62) .390 (9.91) Notes: 1. Package dimensions conform to JEDEC specification MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP) package with .300 inch row spacing. 2. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 3. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 4. Pin locations start with Pin 1, and continue counter-clock-wise to Pin 8 when viewed from the top. The notch and/or dimple are aids in locating Pin 1. Pin 3 is omitted. 5. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 6. Lead width measured at package body. P08C 7. Lead spacing measured with the leads constrained to be perpendicular to plane T. PI-3933b-092920 20 Rev. J 10/20 www.power.com TNY174-180 SO-8C (D Package) 4 B 0.10 (0.004) C A-B 2X 2 DETAIL A 4.90 (0.193) BSC A 4 8 D 5 2 3.90 (0.154) BSC GAUGE PLANE SEATING PLANE 6.00 (0.236) BSC o 0-8 C 0.25 (0.010) BSC 1.04 (0.041) REF 2X 0.10 (0.004) C D 1 Pin 1 ID 4 2X 7X 0.31 - 0.51 (0.012 - 0.020) 0.25 (0.010) M C A-B D 1.27 (0.050) BSC 1.35 (0.053) 1.75 (0.069) 0.40 (0.016) 1.27 (0.050) 0.20 (0.008) C 1.25 - 1.65 (0.049 - 0.065) DETAIL A 0.10 (0.004) 0.25 (0.010) 0.10 (0.004) C H 7X SEATING PLANE 0.17 (0.007) 0.25 (0.010) C Reference Solder Pad Dimensions + 2.00 (0.079) + 4.90 (0.193) + + 1.27 (0.050) D07C Notes: 1. JEDEC reference: MS-012. 2. Package outline exclusive of mold flash and metal burr. 3. Package outline inclusive of plating thickness. 4. Datums A and B to be determined at datum plane H. 5. Controlling dimensions are in millimeters. Inch dimensions are shown in parenthesis. Angles in degrees. 0.60 (0.024) PI-4526-012315 Part Ordering Information • TinySwitch Product Family • Series Number • Package Identifier P Plastic DIP-8C D Plastic Surface Mount SO-8C • Lead Finish N Pure Matte Tin (Pb-Free) (Not available in D Package) G RoHS Compliant and Halogen Free (D Package only) • Tape & Reel and Other Options Blank TNY 178 P N - TL TL Standard Configuration Tape & Reel, 2.5 k pcs for D Package. Not available for P Package. 21 www.power.com Rev. J 10/20 Revision Notes Date A Initial release. B Minor text change. 08/07 C Updated Part Ordering Information section with Halogen Free and added D package part. Corrected electrical symbol mF in three locations under Circuit Protection in Parameter Table. 07/09 03/10 D Added TNY177D. 08/12 E Added TNY178D. 09/13 F Updated with new PI Brand Style. 12/15 G Updated PDIP-8C (P Package) per PCN-16232. 08/16 H Initial web release. 11/18 I Updated per DSC-20391. 09/20 J Updated PDIP-8C package. 10/20 08/10/07 For the latest updates, visit our website: www.power.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set forth at www.power.com/ip.htm. Life Support Policy POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: 1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Power Integrations, the Power Integrations logo, CAPZero, ChiPhy, CHY, DPA-Switch, EcoSmart, E-Shield, eSIP, eSOP, HiperPLC, HiperPFS, HiperTFS, InnoSwitch, Innovation in Power Conversion, InSOP, LinkSwitch, LinkZero, LYTSwitch, SENZero, TinySwitch, TOPSwitch, PI, PI Expert, PowiGaN, SCALE, SCALE-1, SCALE-2, SCALE-3 and SCALE-iDriver, are trademarks of Power Integrations, Inc. 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