PT5139-HT-TP

PT5139 Dual H-Bridge Motor Driver DESCRIPTION FEATURES The PT5139 is a dual bridge motor driver which has two H-bridge drivers, and can drive two DC brush motors, a bipolar stepper motor, solenoids, or other inductive loads. It operates from 2.7V to 15V, and can deliver load current up to 700mA per channel. The output driver block of each H-bridge consists of N-channel power MOSFETS configured as an H-bridge to drive the motor windings. Each H-bridge includes circuitry to regulate or limit the winding current. The internal safety features include sinking and sourcing current limits implemented with external sensors, under-voltage lockout, over current protection (OCP) and thermal shutdown. An over-temperature output flag is available to indicate thermal shutdown. The PT5139 is packaged in 16-pin, 5.0mm×6.4mm TSSOP-EP and TSSOP, 3mm×3mm and 4mmx4mm QFN package with an exposed thermal pad on the back.       Wide Power Supply Voltage Range: 2.7V to 15V Two Internal Full-Bridge Drivers Internal Charge Pump for the High-Side Driver Low Quiescent Current: 1.1mA Low Sleep Current: 1μA Thermal Shutdown and Under-Voltage Lockout Protection Over Current Protection (OCP) Over-Temperature Output Flag Thermally-Enhanced Surface-Mount Package Low MOSFET On Resistance (HS: 600mΩ; LS: 570 mΩ)     APPLICATIONS      Digital Still Cameras POS Printers Video Security Camera Robotics Battery Powered Toys BLOCK DIAGRAM VIN VDD Charge Pump Internal Regulator & Bandgap BST UVLO & Thermal Shutdown VIN AIN1 Gate Driver AIN2 AOUT1 Current Sense Input Signal Pre-process AOUT2 OCP BIN1 ASEN Logic BIN2 VIN FAULT Gate Driver BOUT1 Current Sense nSLEEP BOUT2 OCP Wake up BSEN GND Tel: 886-2-66296288‧Fax: 886-2-29174598‧ http://www.princeton.com.tw‧2F, No.233-1, Baociao Rd., Sindian Dist., New Taipei City 23145, Taiwan PT5139 APPLICATION CIRCUIT VIN VIN BST C3 2.2μF BST VDD C3 2.2μF C2 0.1μF VIN VIN C1 10μF AIN1 C2 0.1μF AIN2 AIN2 AOUT1 AOUT1 BIN1 MOTOR BIN1 AOUT2 BIN2 AOUT2 BIN2 ASEN ASEN RASEN Fault FAULT RASEN BOUT1 Fault FAULT BOUT1 MOTOR BOUT2 BOUT2 ON OFF nSLEEP C1 10μF AIN1 BSEN ON OFF RBSEN nSLEEP WindingA WindingB VDD MOTOR BSEN RBSEN GND GND Dual DC Motor Application V1.1 Stepper Motor Application 2 February 2017 PT5139 ORDER INFORMATION Valid Part Number PT5139-HT PT5139-TX PT5139 PT5139 Package Type Top Code 16-Pin, HTSSOP 16-Pin, TSSOP 16-Pin, QFN (3x3mm) 16-Pin, QFN(4x4mm) PT5139-HT PT5139-TX PT5139 PT5139 AIN1 AOUT1 2 15 AIN2 ASEN 3 14 VDD AOUT2 4 13 GND 13 AIN2 16 14 AIN1 1 15 nSLEEP nSLEEP 16 AOUT1 PIN CONFIGURATION ASEN 1 12 VDD AOUT2 2 11 GND PT5139 PT5139 BOUT2 3 10 VIN BSEN 6 11 BST BSEN 4 9 BST BOUT1 7 10 BIN2 FAULT 8 9 BIN1 5 6 7 8 BIN2 VIN BIN1 12 FAULT 5 BOUT1 BOUT2 Note: The exposed pad for TSSOP16-EP and QFN package need to be connected to GND. V1.1 3 February 2017 PT5139 PIN DESCRIPTION Pin No. Pin Name I/O Description QFN-16 TSSOP-16 ASEN I/O Channel A current sense. Connect to current sensor resistor for Channel A 1 3 AOUT2 O Connecting to motor winding A. 2 4 BOUT2 O Connecting to motor winding B. 3 5 BSEN I/O Channel B current sense. Connect to current sensor resistor for Channel B 4 6 BOUT1 O Connecting to motor winding B. 5 7 FAULT OD Fault output. Logic low when in over-temperature fault condition. 6 8 BIN1 I Bridge B input 1 to control BOUT1. (200K internal pull down resistor to GND.) 7 9 BIN2 I Bridge B input 2 to control BOUT2. (200K internal pull down resistor to GND.) 8 10 BST I/O Charge Pump Output. Connect a 10nF to 100nF ceramic capacitor to VIN. 9 11 VIN Power Device power supply. Ranges from 2.7V to 15V. A 10-µF ceramic bypass capacitor to GND is recommended. 10 12 GND GND Device ground. (Both the GND pin and device PowerPAD must be connected to ground.) 11 13 VDD Power Internal control and logic supply voltage. Connect a 2.2μF capacitor from VDD to GND. VDD is for internal use only. Do not connect any external load to VDD pin. 12 14 AIN2 I Bridge A input 2 to control AOUT2. (200K internal pull down resistor to GND.) 13 15 AIN1 I Bridge A input 1 to control AOUT1. (200K internal pull down resistor to GND.) 14 16 nSLEEP I Sleep mode input. Logic high to enable device, logic low to enter low-power sleep mode and reset all internal logic.(200K internal pull down resistor to GND.) 15 1 AOUT1 O Connect to motor winding A. 16 2 V1.1 4 February 2017 PT5139 OPERATION DESCRIPTION The PT5139 device is an integrated motor driver solution for brushed DC or bipolar stepper motors. The device integrates two NMOS H-bridges and current regulation circuitry. The PT5139 can be powered with a supply voltage from 2.7 to 15 V and can provide an output current up to 700mA. The motor output current can be either controlled by an external pulse width modulator (PWM) or internal PWM current controller. The current regulation (internal PWM current control) is a fixed off time PWM slow decay. The PT5139 includes a lower power sleep mode, which lets the system save power when not driving the motor. It also provides the fault protections include: under-voltage lockout (UVLO) and over-temperature protection (OTP). EXTERNAL PWM CURRENT CONTROL The motor current can be regulated by applying external PWM signals on the input pins AIN1, AIN2, BIN1 and BIN2. The AIN1 and AIN2 input pins control the state of the AOUT1 and AOUT2; similarly, the BIN1 and BIN2 input pins control the state of the BOUT1 and BOUT2. Table 1 shows the logic. VIN AIN1 AIN2 Gate Driver AOUT1 AOUT2 WindingA SENA VTRIP MOTOR RSENA A/BIN1 L L H H Figure 1: Full-Bridge Control Circuit A/BIN2 L H L H A/BOUT1 High Impedance GND VIN GND A/BOUT2 High Impedance VIN GND GND Table1: Full-Bridge Gate Logic In external PWM control mode, the winding’s inductive current ramps up when the high-side MOSFET is on and freewheels during the high side MOSFET’s off time to cause the recirculation current. To handle this recirculation current, the H-bridge can operate in two different states: fast decay and slow decay, both of which are shown in Figure 2 for forward operation and Figure 3 for reverse operation. VIN VIN AOUT1 AOUT1 AOUT2 Slow Decay Fast Decay Forward Slow Decay Fast Decay Forward Figure 2: Forward Operation V1.1 AOUT2 Figure 3: Reverse Operation 5 February 2017 PT5139 For fast decay mode, the H-bridge is disabled and recirculation current flows through the body diodes. For slow decay mode, the current circulates through the two low-side MOSFETS. To PWM using fast decay, the PWM signal is applied to one input pin while the other is held low. To using slow decay mode, one input is held high and apply the PWM signal to other input pin. See Table 2 for more configuration details and Figure 4 for detailed waveforms. Figure 4: External PWM Current Control Waveform A/BIN1 A/BIN2 Mode H (PWM) L (PWM) L L H H L (PWM) H (PWM) L L H (PWM) L (PWM) L (PWM) H (PWM) H H Forward Fast Decay Reverse Fast Decay Forward Slow Decay Reverse Slow Decay Table 2: PWM Control INTERNAL PWM CURRENT CONTROL An internal constant off-time PWM current control circuit will regulate the motor current as the following: When an H-bridge is enabled, current rises through the winding at a rate dependent on the DC voltage and inductance of the winding. The current increases in the motor winding, which is sensed by an external sense resistor (RSENSE). During the initial blanking time TBLANK (2.7μs), the high-side MOSFET always turns on in spite of current limit detection. This blanking time also sets the minimum on time of the PWM when operating in current chopping mode. After the blanking time, if the voltage across RSENSE reaches the internal reference voltage threshold VTRIP (185mV), the bridge disables the current by shuts off the high-side MOSFET. After that, the H-bridge switches to slow decay mode. Winding current is decreases and recirculated by enabling both of the low-side FETs in the bridge.In this slow decay mode, the current freewheels through one low-side MOSFET and the body diode of the other low-side MOSFET to short the winding. This mode enables both two low-side MOSFETs, which feature a lower voltage drop and lower power dissipation during decay operation. The slow decay mode is held until the internal clock reaches it’s constant off time (typically 21μs). After the fixed off time the high-side MOSFET is enable and the winding current will increase again. The cycle then repeats. Calculate the current limit as: ILIMIT = Vtrip Rsense Example: If a 1-Ω sense resistor is used, the chopping current will be 185 mV/1 Ω = 185 mA. If current control is not needed, the xSEN pins should be connected directly to ground. V1.1 6 February 2017 PT5139 SLEEP MODE Driving nSLEEP low will put the device into a low power sleep state. In this state, the H-bridges are disabled, the gate drive charge pump is stopped, all internal logic is reset, and all internal clocks are stopped. All inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time (up to 1 ms) needs to pass before the motor driver becomes fully operational. BLANKING TIME An internal blanking time TBLANK blanks the output of the current sense comparator when the outputs are switched, which is also the minimum on time for high-side MOSFET. There is usually a current spike during the switching transition due to the body diode’s reverse-recovery current or the distributed inductance or capacitance. This blanking time is filtering the current spike and prevents it from erroneously shutting down the high-side MOSFET. OVER CURRENT PROTECTION (OCP) An analog current limit circuit on each FET limits the current through the FET by limiting the gate drive. If this analog current limit persists for longer than the OCP deglitch time (2.7μs), all FETs in the H-bridge will be disabled and the FAULT pin will be driven low. The driver will be re-enabled after the OCP retry period (tOCP) has passed. FAULT becomes high again at this time. If the fault condition is still present, the cycle repeats. If the fault is no longer present, normal operation resumes and FAULT remains deasserted. Please note that only the H-bridge in which the OCP is detected will be disabled while the other bridge will function normally. Over current conditions are detected independently on both high- and low-side devices; that is, a short to ground, supply, or across the motor winding will all result in an over current shutdown. Over current protection does not use the current sense circuitry used for PWM current control, so it functions even without presence of the xSEN resistors. THERMAL SHUTDOWN (TSD) If the die temperature exceeds safe limits (typically 170ºC), all FETs in the H-bridge will be disabled and the nFAULT pin will be driven low. Once the die temperature has fallen to a safe level (typically 140ºC), operation will automatically resume. UNDERVOLTAGE LOCKOUT (UVLO) If at any time the voltage on the VM pin falls below the undervoltage lockout threshold voltage, all circuitry in the device will be disabled, and all internal logic will be reset. Operation will resume when VM rises above the UVLO threshold. nFAULT is driven low in the event of an undervoltage condition. V1.1 7 February 2017 PT5139 APPLICATION INFORMATION Driver Mode: The PT5139 could be configured for both full step and half-step modes by sequentially energizing the two windings. Fullstep drive energizes two winding phases at any given time. The stator windings are energized as per the sequence shown in Table 3. There are a total of four steps for one cycle in the sequence: AB AB ABAB. Half-step energizes the stator windings as per the sequence shown in Table 4. There are a total of 8 steps for one cycle: ABBABAABBABA. Figure 5: Signal Logic Sequences for Full-Step and Half-Step Sequence(Full Step) A B 1 ✓ ✓ A B 2 ✓ ✓ 3 ✓ ✓ 4 ✓ ✓ Table 3: Full-Step Drive Sequence Sequence(Half Step) A B 1 ✓ ✓ 2 3 4 5 6 7 ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ A B 8 ✓ Table 4: Half-Step Drive Sequence Note: ✓ item is the selected winding voltage. V1.1 8 February 2017 PT5139 POWER SUPPLY AND LAYOUT GUIDE The inductance between the power supply and the motor drive system limits the rate current can change from the power supply. If the local bulk capacitance is too small, the system responds to excessive current demands or dumps from the motor with a change in voltage. When adequate bulk capacitance is used, the motor voltage remains stable and high current can be quickly supplied. The datasheet generally provides a recommended value, but system-level testing is required to determine the appropriate sized bulk capacitor. The voltage rating for bulk capacitors should be higher than the operating voltage, to provide margin for cases when the motor transfers energy to the supply. Figure 6 : Example Setup of Motor Drive System with External Power Supply The VM pin should be bypassed to GND using low-ESR ceramic bypass capacitors with a recommended value of 10μF rated for VM. This capacitor should be placed as close to the VM pin as possible with a thick trace or ground plane connection to the device GND pin. A low-ESR ceramic capacitor must be placed in between the VM and BST pins. PTC recommends a value of 0.1μF rated for 25 V. Place this component as close to the pins as possible. Bypass VDD to ground with a 2.2-μF ceramic capacitor rated 6.3V. Place this bypass capacitor as close to the pin as possible. The printed circuit board (PCB) should use a heavy ground-plane. The PT5139 must be soldered directly onto the board for better electrical and thermal performance. The sense resistors should be placed as close as possible to the part for accurate current detection. The PT5139 uses an exposed pad, which provides a path for enhanced thermal dissipation. The thermal pad should be soldered directly to copper on the PCB. Thermal vias are often used to transfer heat to other layers of the PCB. Figure 7: QFN-16 V1.1 Figure 8: TSSOP-16 9 February 2017 PT5139 DESIGN EXAMPLE Below is a design example following the application guidelines for the specifications: The detailed application schematic is shown in Figure 9. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. VIN = 2.7V-15V, IOUT = 400mA VIN BST VDD C1 2.2μF C2 0.1μF PT5139 VIN AIN1 C5 100nF C4 10μF C3 100μF AIN2 AOUT1 BIN1 AOUT2 BIN2 ASEN Fault FAULT BOUT1 BOUT2 ON OFF nSLEEP WindingB RASEN 470mΩ WindingA MOTOR BSEN RBSEN GND 470mΩ Figure 9: Detailed Application Schematic V1.1 10 February 2017 PT5139 ABSOLUTE MAXIMUM RATING Parameter Symbol Rating Unit VIN -0.3 ~ +18 V AOUTx Voltage VAOUTx -0.3 ~ +VIN+1V V BOUTx Voltage VBOUTx -0.3 ~ +VIN+1V V BST Voltage VBST -0.3 ~ +VIN+7V V Sense Voltage VSENx -0.3 ~ +0.5 V All Other Pins - -0.3 ~ +6.5 V Junction Temperature TJ 150 ℃ Lead Temperature TL 260 ℃ Operating Temperature TOPR -40 ~ +85 ℃ Storage Temperature TSTG -40 ~ +150 ℃ Power Supply Voltage Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. RECOMMENDED OPERATING CONDITIONS Parameter Rating Symbol Min. Typ. Max. Unit Supply Voltage VIN 2.7 - 15 V Output Current IA/BOUT - 700 - mA TJ -40 50 125 ℃ Operating Junction Temperature THERMAL RESISTANCE θJA θJC Unit QFN 16(3X3mm) 60 12 ℃/W QFN 16(4X4mm) 46 10 ℃/W TSSOP 16-EP (5.0x6.4mm) 45 10 ℃/W TSSOP 16 103 38 ℃/W Parameter Note: Measure on JESD51-7, 4-layer PCB V1.1 11 February 2017 PT5139 ELECTRICAL CHARATERISTICS Nominal conditions: VIN=5V, Ta=+25℃ Parameter Symbol Conditions Min. Typ. Max. Unit VIN - 2.7 - 15 V IIN nSLEEP=1, IOUT=0, Output disable - - 1.1 mA IIN_SLEEP nSLEEP=0, VIN=5V - - 1 μA VF IOUT=500mA - - 1 V - 600 - mΩ - 780 - mΩ - 570 - mΩ - 730 - mΩ Power Supply Input Supply Voltage Quiescent Current Integrated MOSFETs Body-Diode Forward Voltage RHS Output On Resistance RLS IOUT=500mA, VIN=5V TJ=25°C IOUT=500mA, VIN=5V TJ=85°C IOUT=500mA, VIN=5V TJ=25°C IOUT=500mA, VIN=5V TJ=85°C Control Logic UVLO Threshold (Rising) VIN_RISE - - - 2.7 V VHYS - - 80 - mV Input Logic ‘Low’ Threshold VIL - - - 0.6 V Input Logic ‘High’ Threshold VIH - 2 - - V nSLEEP Logic, Low VSLEEP_L - - - 0.4 V nSLEEP Logic, High VSLEEP_H - 2 - - V RPD nSLEEP and Logic input pin - 200 - kΩ VFAULT_L Flag triggered by OTP 1mA Current - - 200 mV ILEAK_FAULT VFAULT=5V - - 1 μA TOFF - - 21 - μs Propagation Delay Time (On) TON_DELAY INx high to OUTx on 10mA Source Current - 80 - ns Propagation Delay Time (Off) TOFF_DELAY INx low to OUTx off - 250 - ns 200 300 650 ns - 1 1.5 ms UVLO Hysteresis Input pulldown resistance Fault Output Logic, Low Fault Output Leakage Current Constant Off Time Cross Over Delay TCROSS Sleep Mode Wakeup Time TWAKE V1.1 HS off to LS on or LS off to HS on for one bridge arm Sleep inactive high to full bridge turn on (VBST=100nF) 12 February 2017 PT5139 Parameter Symbol Conditions Min. Typ. Max. Unit VTRIP - - 185 - mV TBLANK - 2.1 2.7 3.3 μs - 1.7 - A Protection Circuitry Current Limit Sense Trip Voltage Blanking Time Over current protection trip level IOCP Over current protection period TOCP - - 1.6 - ms Thermal Shutdown TSD - - 170 - ℃ - - - 30 - ℃ Thermal Shutdown Hysteresis V1.1 13 February 2017 PT5139 TYPICAL CHARACTERISTICS Quiescent Current vs. Temperature Vin=15V Quiescent current (mA) 1.1 1.05 1 0.95 0.9 0.85 0.8 -50 BST Voltage vs. Temperature Vin=9V 6 5 5.5 4.5 5 4 3.5 3 2.5 4.5 4 3.5 3 2 0 2 4 6 8 10 12 Input Voltage (V) 14 -50 16 130 10 40 70 100 130 0.195 0.19 0.185 0.18 0.175 -50 -20 10 40 70 100 130 Temperature (°C) Temperature Rise vs. Output Current 2.9 70 2.8 60 2.7 50 Temperature (°C) Blanking Time (us) -20 Temperature(°C) Blanking Time vs. Temperature 2.6 2.5 2.4 2.3 Vin=9V, Full step (100HZ), Ta=25°C Open Frame, test based on EVB single channel two channels 40 30 20 10 0 2.2 -50 -20 10 40 70 Temperature(°C) V1.1 100 0.2 2.5 2 10 40 70 Temperature (°C) Sense Trip Voltage vs. Temperature Sense Trip Voltage (V) 5.5 BST Voltage (V) VDD Voltage (V) VDD Voltlage vs. Input Voltage -20 100 130 200 300 400 500 600 700 Output Current (mA) 14 800 February 2017 PT5139 TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board of the Design Example section. IOUT=500mA, FSTEP=100Hz, Stepper Motor: L=2mH, R=10Ω, TA=25°C, unless otherwise noted. V1.1 15 February 2017 PT5139 PACKAGE INFORMATION 16 Pins, QFN (3x3) and (4x4) Symbol A A1 C b D E D2 E2 e L Symbol A A1 C b D E D2 E2 e L Min. 0.70 0.18 0.18 2.90 2.90 1.40 1.40 0.35 Min. 0.70 0.18 0.25 3.90 3.90 2.10 2.10 0.35 QFN (3x3) Dimensions Nom. 0.75 0.02 0.20 0.25 3.00 3.00 1.50 1.50 0.50 BSC. 0.40 QFN (4x4) Dimensions Nom. 0.75 0.02 0.20 0.30 4.00 4.00 2.20 2.20 0.65 BSC. 0.40 Max. 0.80 0.05 0.25 0.30 3.10 3.10 1.60 1.60 0.45 Max. 0.80 0.05 0.25 0.35 4.10 4.10 2.30 2.30 0.45 Notes: 1. Refer to JEDEC MO-220 WEED-4 & WGGD-4 2. Unit: mm V1.1 16 February 2017 PT5139 16 Pins, TSSOP Symbol A A1 A2 b e c D D2 E E1 E2 L1 θ Dimensions Nom. 1.00 0.65 BSC 4.96 3.00 6.40 4.40 2.30 1.00 REF - Min. 0.05 0.90 0.20 0.13 4.86 2.90 6.20 4.30 2.20 0 Max. 1.20 0.15 1.05 0.30 0.19 5.06 3.10 6.60 4.50 2.40 8 Notes: 1. Refer to JEDEC MO-153 2. Unit: mm V1.1 17 February 2017 PT5139 IMPORTANT NOTICE Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian Dist., New Taipei City 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw V1.1 18 February 2017