ASM2P2351AHG-24ST

November 2006 rev 0.3 ASM2P2351AH 1-Line To 10-Line Clock Driver With 3-State Outputs Features • • • • Low Output Skew, Low Pulse Skew for ClockDistribution and Clock-Generation Applications. Operates at 3.3V Supply Voltage. LVTTL-Compatible Inputs and Outputs. Supports Mixed-Mode Signal Operation. (5V Input and Output Voltages With 3.3V Supply Voltage). • • • • Distributes One Clock Input to Ten Outputs. Outputs have Internal Series Damping Resistor to Reduce Transmission Line Effects. Distributed VCC and Ground Pins Reduce Switching Noise. Package Options Include Plastic Small-Outline and Shrink Small-Outline Packages. Product Description The ASM2P2351AH is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The outputenable (OE) input disables the outputs to a highimpedance state. Each output has an internal series damping resistor to improve signal integrity at the load. The ASM2P2351AH operates at nominal 3.3V Supply Voltage. The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND. The ASM2P2351AH is characterized for operation from 0°C to 70°C. Pin Configuration Logic Diagram (Positive Logic) 5 OE 23 21 19 18 6 A 78 PO P1 16 14 11 9 4 Y1 Y2 Y3 GND Y10 VCC Y9 OE Y4 Y5 Y6 Y7 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 GND Y1 VCC Y2 GND Y3 Y4 GND Y5 VCC Y6 GND A P0 P1 Y8 VCC ASM2P2351AH 19 18 17 16 15 14 13 Y8 Y9 Y7 GND 2 Y10 PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. November 2006 rev 0.3 Pin Description Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 ASM2P2351AH Pin Name GND Y10 VCC Y9 OE A P0 P1 Y8 VCC Y7 GND GND Y6 VCC Y5 GND Y4 Y3 GND Y2 VCC Y1 GND Typ P O P O I I O P O P P O P O P O O P O P O P Ground Pin Output 10 Power Supply Pin Output 9 Description Output Enable Pin. When this pin is low, the outputs Y[1:10] are enabled and when this pin is high , the outputs Y[1:10] are disabled. Input Clock No Connect No Connect Output 8 Power Supply Output 7 Ground Pin Ground Pin Output 6 Power Supply Output 5 Ground Pin Output 4 Output 3 Ground Pin Output 2 Power Supply Output 1 Ground Pin Function Table Inputs A L H L H Outputs OE H H L L In Z Z L H 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 2 of 12 November 2006 rev 0.3 Absolute Maximum Ratings Symbol VCC VIN tSTG tA ts tJ tDV ASM2P2351AH Parameter Voltage on Supply pin with respect to Ground Voltage on any pin with respect to Ground Storage temperature Operating temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B) Rating -0.5 to +4.6 -0.5 to +7.0 -65 to +125 0 to 70 260 150 2 Unit V V °C °C °C °C KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Recommended operating conditions (see Note 3) Symbol VCC VIH VIL VI IOH IOL fclock TA . Parameter Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input clock frequency Operating free air temperature Min 3 2 0 Max 3.6 0.8 5.5 –12 12 100 70 Unit V V V V mA mA MHz °C 0 NOTE 3: Unused pins (input or I/O) must be held high or low. Electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) Parameter VIK VOH VOL II IO 1 Test Conditions VCC = 3 V, VCC = 3 V, VCC = 3 V, VCC = 3.6 V, VCC = 3.6 V, VCC = 3.6 V, II = –18 mA IOH = – 12 mA IOL = 12 mA VI = VCC or GND VO = 2.5 V VCC = 3 V Outputs high VI = VCC or GND VCC = 3.3 V, VCC = 3.3 V, Outputs low Outputs disabled f = 10 MHz f = 10 MHz Min 2 Typ Max -1.2 0.8 ±1 Unit V V V mA mA mA mA pF pF -7 -70 ± 10 0.3 15 0.3 4 6 IOZ ICC Ci Co VCC = 3.6 V, IO = 0, VI = VCC or GND, VO = VCC or GND, Note: 1 Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 3 of 12 November 2006 rev 0.3 Switching Characteristics, CL = 50 pF (see Figures 1 and 2) From (Input) To (Output) ASM2P2351A VCC = 3.3 V, TA = 25°C Min tPLH tPHL tPZH tPZL tPHZ tPLZ tsk(o) tsk(p) tsk(pr) tr tf A OE OE A A A A A Y Y Y Y Y Y Y Y 3.8 3.6 2.4 2.4 2.2 2.2 ASM2P2351AH Parameter Typ 4.3 4.1 4.9 4.3 4.4 4.6 0.3 0.2 Max 4.8 4.6 6.0 6.0 6.3 6.3 0.5 0.8 1 ASM2P2351AH VCC = 3 V to 3.6 V, TA = 0°C to 70°C Min Max Unit nS 1.8 1.8 2.1 2.1 6.9 6.9 7.1 7.3 0.5 0.8 1 2.5 2.5 nS nS nS nS nS nS nS Switching Characteristics temperature and VCC coefficients over recommended operating free-air temperature and VCC range (see Note 3) From To Parameter Min Max Unit (Input) (Output) tPLH(T) tPHL(T) tPLH(VCC) tPHL(VCC) Average temperature coefficient of low to high propagation delay Average temperature coefficient of high to low propagation delay Average VCC coefficient of low to high propagation delay Average VCC coefficient of high to low propagation delay A A A A Y Y Y Y 851 50 1 pS/10°C pS/10°C pS/ 100 mV pS/ 100 mV -1452 -1002 Note: 1 tPLH(T) and tPHL(T) are virtually independent of VCC. 2 tPLH(VCC) and tPHL(VCC) are virtually independent of temperature. 3 This data was extracted from characterization material and are not tested at the factory. 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 4 of 12 November 2006 rev 0.3 Parameter Measurement Information 500Ω S1 6V OPEN GND ASM2P2351AH From Output Under Test CL = 50pF (see Note A) 500Ω LOAD CIRCUIT 3V TIMING INPUT 1.5V OV tsu th 3V 1.5V DATA INPUT 1.5V 3V 1.5V INPUT tPLH tPHL 2V 1.5V OUTPUT 0.8V tr tr 0.8V VOL VOH 2V 1.5V OV tW 3V INPUT 1.5V 1.5V OV 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 5 of 12 November 2006 rev 0.3 ASM2P2351AH Output Control (low-level enabling) 3V 1.5 V 1.5 V 0V tPLZ tPHZ Output Waveform 1 S1 at 6 V (see Note B) 3V VOL + O.3 V VOL tPHZ tPZH VOH Output Waveform 2 S1 at GND (see Note B) 1.5 V VOH. – 0.3 V 1.5 V 0V Figure 1. Load Circuit and Voltage Waveforms NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 3 10 MHz, ZO = 50Ω, tr 3 2.5 nS, tf 3 2.5 nS. D. The outputs are measured one at a time with one transition per measurement. 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 6 of 12 November 2006 rev 0.3 Parameter Measurement Information A ASM2P2351AH Y1 tPHL 1 Y2 tPHL 2 tPLH 2 tPLH 1 Y3 tPHL 3 tPLH 3 Y4 tPHL 4 tPLH 4 Y5 tPHL 5 tPLH 5 Y6 tPHL 6 Y7 tPHL 7 Y8 tPHL 8 tPLH 8 tPLH 7 tPLH 6 Y9 tPHL 9 Y10 tPLH 9 tPHL 10 tPLH 10 Figure 2. Waveforms for Calculation of tsk(o), tsk(p), tsk(pr) NOTES: A. Output skew, tsk(o), is calculated as the greater of: – The difference between the fastest and slowest of tPLHn (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10) – The difference between the fastest and slowest of tPHLn (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10) B. Pulse skew, tsk(p), is calculated as the greater of | tPLHn – tPHLn | (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10). C. Process skew, tsk(pr), is calculated as the greater of: – The difference between the fastest and slowest of tPLHn (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10) across multiple devices under identical operating conditions – The difference between the fastest and slowest of tPHLn (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10) across multiple devices under identical operating conditions 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 7 of 12 November 2006 rev 0.3 Package Information 24L SSOP (209 mil) ASM2P2351AH Dimensions Symbol A A1 A2 D L E E1 R1 b c L1 e a Inches Min Max …. 0.002 0.065 0.315 0.021 0.295 0.197 0.004 0.009 0.004 0.079 … 0.073 0.331 0.037 0.319 0.220 …. 0.015 0.010 Millimeters Min Max … 0.05 1.65 8.00 0.55 7.50 5.00 0.09 0.22 0.09 2.0 … 1.85 8.40 0.95 8.10 5.60 ….. 0.38 0.25 0.050REF 0.026 BSC 0° 8° 1.25 REF 0.65 BSC 0° 8° 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 8 of 12 November 2006 rev 0.3 24L SOIC (300 mil) ASM2P2351AH Dimensions Symbol A A1 A2 D L E1 R1 b c E e a Inches Min Max 0.093 0.004 0.088 0.598 0.016 0.291 0.003 0.013 0.009 0.394 0° 0.104 0.012 0.094 0.614 0.050 0.299 …. 0.022 0.015 0.419 8° Millimeters Min Max 2.35 0.10 2.25 15.20 0.40 7.40 0.08 0.33 0.23 10.00 0° 2.65 0.30 2.40 15.60 1.27 7.60 ….. 0.56 0.38 10.65 8° 0.050 BSC 1.27 BSC 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 9 of 12 November 2006 rev 0.3 Ordering Information Part Number ASM2P2351AHF-24AR ASM2P2351AHF-24AT ASM2P2351AHF -24SR ASM2P2351AHF-24ST ASM2P2351AF-24AR ASM2P2351AF-24AT ASM2P2351AF -24SR ASM2P2351AF-24ST ASM2P2351AHG-24AR ASM2P2351AHG-24AT ASM2P2351AHG -24SR ASM2P2351AHG-24ST ASM2P2351AG-24AR ASM2P2351AG-24AT ASM2P2351AG -24SR ASM2P2351AG-24ST ASM2P2351AH Marking 2P2351AHF 2P2351AHF 2P2351AHF 2P2351AHF 2P2351AF 2P2351AF 2P2351AF 2P2351AF 2P2351AHG 2P2351AHG 2P2351AHG 2P2351AHG 2P2351AG 2P2351AG 2P2351AG 2P2351AG Package Type 24-Pin SSOP, TAPE & REEL, Pb Free 24-Pin SSOP, TUBE, Pb Free 24-Pin SOIC, TAPE & REEL, Pb Free 24-Pin SOIC, TUBE, Pb Free 24-Pin SSOP, TAPE & REEL, Pb Free 24-Pin SSOP, TUBE, Pb Free 24-Pin SOIC, TAPE & REEL, Pb Free 24-Pin SOIC, TUBE, Pb Free 24-Pin SSOP, TAPE & REEL, Green 24-Pin SSOP, TUBE, Green 24-Pin SOIC, TAPE & REEL, Green 24-Pin SOIC, TUBE, Green 24-Pin SSOP, TAPE & REEL, Green 24-Pin SSOP, TUBE, Green 24-Pin SOIC, TAPE & REEL, Green 24-Pin SOIC, TUBE, Green Temperature Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 10 of 12 November 2006 rev 0.3 Device Ordering Information ASM2P2351AH ASM2P2351AHF-24 AR R = Tape & Reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE, LEAD FREE, and RoHS PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 PulseCore Semiconductor Mixed Signal Product Licensed under US patent Nos 5,488,627 and 5,631,920. 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 11 of 12 November 2006 rev 0.3 ASM2P2351AH PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright © PulseCore Semiconductor All Rights Reserved Preliminary Information Part Number: ASM2P2351AH Document Version: v0.3 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 © Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. 1-Line To 10-Line Clock Driver With 3-State Outputs Notice: The information in this document is subject to change without notice. 12 of 12