ASM3P622S00BF-08-TR

May 2008 rev 0.5 ASM3P622S00B/E Low Frequency Timing-Safe™ Peak EMI reduction IC General Features • • • • • • • • Low Frequency Clock distribution with TimingSafe™ Peak EMI Reduction Input frequency range: 4MHz - 20MHz 2 different Spread Selection option Spread Spectrum can be turned ON/OFF External Input-Output Delay Control option Supply Voltage: 3.3V±0.3V Commercial and Industrial temperature range Packaging Information: ASM3P622S00B: 8 pin SOIC, and TSSOP ASM3P622S00E:16 pin SOIC, and TSSOP • The First True Drop-in Solution one reference input and drives out eight low-skew TimingSafe™clocks. ASM3P622S00B/E has an SS% that selects 2 different Deviation and associated Input-Output Skew (TSKEW). Refer Spread Spectrum Control and Input-Output Skew table for details. ASM3P622S00E has a CLKOUT for adjusting the InputOutput clock delay, depending upon the value of capacitor connected at this pin to GND. ASM3P622S00B/E operates from a 3.3V supply and is available in two different packages, as shown in the ordering information table, over commercial and Industrial temperature range. Functional Description Application ASM3P622S00B/E is a versatile, 3.3V Zero-delay buffer designed to distribute low frequency Timing-Safe™ clocks with Peak EMI reduction. ASM3P622S00B is an eight-pin version, accepts one reference input and drives out one low-skew Timing-Safe™ clock. ASM3P622S00E accepts ASM3P622S00B/E is targeted for use in Displays and memory interface systems. General Block Diagram DLY_CTRL VDD SS% CLKIN PLL CLKOUT(s)* (Timing-Safe™) *For ASM3P622S00E 8 CLKOUTS SSON GND PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. May 2008 rev 0.5 Spread Spectrum Frequency Generation The clocks in digital systems are typically square waves with a 50% duty cycle and as frequencies increase the edge rates also get faster. Analysis shows that a square wave is composed of fundamental frequency and harmonics. The fundamental frequency and harmonics generate the energy peaks that become the source of EMI. Regulatory agencies test electronic equipment by measuring the amount of peak energy radiated from the equipment. In fact, the peak level allowed decreases as the frequency increases. The standard methods of reducing EMI are to use shielding, filtering, multi-layer ASM3P622S00B/E PCBs etc. These methods are expensive. Spread spectrum clocking reduces the peak energy by reducing the Q factor of the clock. This is done by slowly modulating the clock frequency. The ASM3P622S00B/E uses the center modulation spread spectrum technique in which the modulated output frequency varies above and below the reference frequency with a specified modulation rate. With center modulation, the average frequency is the same as the unmodulated frequency and there is no performance degradation Zero Delay and Skew Control All outputs should be uniformly loaded to achieve Zero Delay between input and output. Since the CLKOUT pin is the internal feedback to the PLL, its relative loading can adjust the input-output delay. For applications requiring zero input-output delay, all outputs, including CLKOUT, must be equally loaded. Even if CLKOUT is not used, it must have a capacitive load equal to that on other outputs, for obtaining zeroinput-output delay. Timing-Safe™ technology Timing-Safe™ technology is the ability to modulate a clock source with Spread Spectrum technology and maintain synchronization with any associated data path. Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 2 of 15 May 2008 rev 0.5 Pin Configuration for ASM3P622S00B ASM3P622S00B/E CLKIN NC 1 2 8 NC VDD CLKOUT SSON 7 ASM3P622S00B SS% 3 GND 4 6 5 Pin Description for ASM3P622S00B Pin # 1 2 3 4 5 6 7 8 Pin Name CLKIN1 NC SS% 3 Type I No Connect I P I Description External reference Clock input , 5V tolerant input Spread Spectrum Selection. Has an internal pull up resistor Ground Spread Spectrum enable and disable option When SSON is HIGH, the spread spectrum is enabled and when LOW, it turns off the spread spectrum. Has an internal pull up resistor Buffered clock output4 3.3V supply No Connect GND SSON3 CLKOUT VDD NC 2 O P Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 15 May 2008 rev 0.5 Pin Configuration for ASM3P622S00E ASM3P622S00B/E CLKIN CLKOUT1 VDD SS% GND CLKOUT2 CLKOUT3 1 2 3 4 16 15 14 13 CLKOUT CLKOUT7 CLKOUT6 VDD GND CLKOUT5 CLKOUT4 SSON ASM3P622S00E 5 6 7 12 11 10 9 DLY_CTRL 8 Pin Description for ASM3P622S00E Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name CLKIN VDD SS% 3 1 2 Type I O P I P Buffered clock output4 3.3V supply Description External reference Clock input, 5V tolerant input CLKOUT1 Spread Spectrum Selection. Refer Spread Spectrum Control and Input-Output Skew Table. Has an internal pull up resistor Ground Buffered clock output4 Buffered clock output4 GND CLKOUT2 2 O O O I O O P P CLKOUT32 DLY_CTRL SSON 3 External Input-Output Delay control. Spread Spectrum enable and disable option. When SSON is HIGH, the spread spectrum is enabled and when LOW, it turns off the spread spectrum. Has an internal pull up resistor Buffered clock output4 Buffered clock output4 Ground 3.3V supply Buffered clock output4 Buffered clock output4 Buffered clock output4 CLKOUT42 CLKOUT52 GND VDD CLKOUT6 2 O O O CLKOUT72 CLKOUT2 Notes: 1.Weak pull down 2. Weak pull-down on all outputs 3. Weak pull-up on these Inputs 4. Buffered clock output is Timing-Safe™ Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 15 May 2008 rev 0.5 Spread Spectrum Control and Input-Output Skew Table Device ASM3P622S00B/E ASM3P622S00B/E Input Frequency 12MHz SS % 0 1 Deviation ±0.25 % ±0.50 % Input-Output Skew (±TSKEW) 0.0625 0.125 Note: TSKEW is measured in units of the Clock Period Absolute Maximum Ratings Symbol VDD VIN TSTG Ts TJ TDV DC Input Voltage (CLKIN) Storage temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B) Parameter Supply Voltage to Ground Potential Rating -0.5 to +4.6 -0.5 to +7 -65 to +125 260 150 2 Unit V °C °C °C KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Operating Conditions Parameter VDD TA CL CIN Supply Voltage Operating Temperature (Ambient Temperature) Load Capacitance Input Capacitance Description Min 3.0 -40 Max 3.6 +85 30 7 Unit V °C pF pF Electrical Characteristics Parameter VIL VIH IIL IIH VOL VOH IDD Zo Description Input LOW Voltage Input LOW Current Input HIGH Current Output LOW Voltage Supply Current Output Impedance 6 6 5 5 Test Conditions Min 2.0 Typ Max 0.8 Unit V V µA µA V V mA Ω Input HIGH Voltage VIN = 0V VIN = VDD IOL = 8mA IOH = -8mA Unloaded outputs 23 2.4 50 100 0.4 18 Output HIGH Voltage Note: 5. CLKIN input has a threshold voltage of VDD/2 6. Parameter is guaranteed by design and characterization. Not 100% tested in production Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 15 May 2008 rev 0.5 Switching Characteristics for ASM3P622S00B/E Parameter Input Frequency Output Frequency Duty Cycle 6,7 ASM3P622S00B/E Test Conditions 30pF load Measured at VDD/2 Measured between 0.8V and 2.0V Measured between 2.0V and 0.8V 7, 8 Min 4 4 40 Typ Max 20 20 Unit MHz MHz % nS nS pS pS pS nS pS mS = (t2 / t1) * 100 7, 8 7, 8 50 60 2.5 2.5 250 ±350 700 ±1.6 ±200 1.0 Output Rise Time Output Fall Time Output-to-output skew CLKOUT Rising Edge All outputs equally loaded with SSOFF Measured at VDD /2 with SSOFF Measured at VDD/2 on the CLKOUT pins of the device Loaded outputs < 8MHz > 8MHz Delay, CLKIN Rising Edge to 8 Device-to-Device Skew 8 Cycle-to-Cycle Jitter 7, 8 PLL Lock Time 8 Stable power supply, valid clock presented on CLKIN pin Note: 7. All parameters specified with 30pF loaded outputs. 8. Parameter is guaranteed by design and characterization. Not 100% tested in production Switching Waveforms Duty Cycle Timing t1 t2 VDD/2 OUTPUT VDD/2 VDD/2 All Outputs Rise/Fall Time 2V 0.8V 2V 0.8V 3.3V OUTPUT t3 t4 0V Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 15 May 2008 rev 0.5 Output - Output Skew ASM3P622S00B/E VDD/2 OUTPUT VDD/2 OUTPUT t5 Input - Output Propagation Delay VDD/2 INPUT VDD/2 OUTPUT t6 Device - Device Skew VDD/2 CLKOUT, Device 1 VDD/2 CLKOUT, Device 2 t7 Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 15 May 2008 rev 0.5 Input-Output Skew Input Timing-Safe™ Output ASM3P622S00B/E Test Circuit +3.3V VDD TSKEW - TSKEW+ +3.3V One clock cycle N=1 when spread spectrum is ON For example, TSKEW = ± 0.125 for an Input clock12MHz, translates in to (1/12MHz) * 0.125=10.41nS 0.1uF OUTPUT CLKOUT LOAD Test Circuit VDD 0.1uF GND TSKEW represents input-output skew A Typical example of Timing-Safe™ waveform Input Input CLKOUT with SSOFF Timing-Safe™ CLKOUT Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 15 May 2008 rev 0.5 Package Information ASM3P622S00B/E 8-lead (150-mil) SOIC Package E H D A2 A θ e B A 1 C L D Dimensions Symbol Min A1 A A2 B C D E e H L θ Inches Max 0.010 0.069 0.059 0.020 0.010 0.004 0.053 0.049 0.012 0.007 Millimeters Min Max 0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0° 1.27 8° 0.25 1.75 1.50 0.51 0.25 0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0° 0.050 8° Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 9 of 15 May 2008 rev 0.5 8-lead TSSOP (4.40-MM Body) ASM3P622S00B/E H E D A2 A θ e B A1 L C Dimensions Symbol Min A A1 A2 B c D E e H L θ 0.020 0° 0.002 0.033 0.008 0.004 0.114 0.169 0.026 BSC 0.252 BSC 0.028 8° 0.50 0° Inches Max 0.043 0.006 0.037 0.012 0.008 0.122 0.177 0.05 0.85 0.19 0.09 2.90 4.30 Millimeters Min Max 1.10 0.15 0.95 0.30 0.20 3.10 4.50 0.65 BSC 6.40 BSC 0.70 8° Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 10 of 15 May 2008 rev 0.5 ASM3P622S00B/E 16-lead (150 Mil) Molded SOIC Package 8 1 PIN 1 ID E H 9 D 16 Seating Plane A e B h A2 D 0.004 θ L C A1 Dimensions Symbol Min A A1 A2 B C D E e H h L θ 0.228 0.010 0.016 0° 0.053 0.004 0.049 0.013 0.008 0.386 0.150 0.050 BSC 0.244 0.016 0.035 8° 5.80 0.25 0.40 0° Inches Max 0.069 0.010 0.059 0.022 0.012 0.394 0.157 Millimeters Min 1.35 0.10 1.25 0.33 0.19 9.80 3.80 1.27 BSC 6.20 0.41 0.89 8° Max 1.75 0.25 1.50 0.53 0.27 10.01 4.00 Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 11 of 15 May 2008 rev 0.5 ASM3P622S00B/E 16-lead TSSOP (4.40-MM Body) 8 1 PIN 1 ID E H 9 16 A Seating Plane θ L C e D A2 B A1 D Dimensions Symbol Min A A1 A2 B C D E e H L θ 0.020 0° 0.002 0.031 0.007 0.004 0.193 0.169 0.026 BSC 0.252 BSC 0.030 8° 0.50 0° Inches Max 0.043 0.006 0.041 0.012 0.008 0.201 0.177 0.05 0.80 0.19 0.09 4.90 4.30 Millimeters Min Max 1.20 0.15 1.05 0.30 0.20 5.10 4.50 0.65 BSC 6.40 BSC 0.75 8° Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 12 of 15 May 2008 rev 0.5 Ordering Code Ordering Code ASM3P622S00BF-08-ST ASM3I622S00BF-08-ST ASM3P622S00BF-08-SR ASM3I622S00BF-08-SR ASM3P622S00BF-08-TT ASM3I622S00BF-08-TT ASM3P622S00BF-08-TR ASM3I622S00BF-08-TR ASM3P622S00EF-16-ST ASM3I622S00EF-16-ST ASM3P622S00EF-16-SR ASM3I622S00EF-16-SR ASM3P622S00EF-16-TT ASM3I622S00EF-16-TT ASM3P622S00EF-16-TR ASM3I622S00EF-16-TR ASM3P622S00BG-08-ST ASM3I622S00BG-08-ST ASM3P622S00BG-08-SR ASM3I622S00BG-08-SR ASM3P622S00BG-08-TT ASM3I622S00BG-08-TT ASM3P622S00BG-08-TR ASM3I622S00BG-08-TR ASM3P622S00EG-16-ST ASM3I622S00EG-16-ST ASM3P622S00EG-16-SR ASM3I622S00EG-16-SR ASM3P622S00EG-16-TT ASM3I622S00EG-16-TT ASM3P622S00EG-16-TR ASM3I622S00EG-16-TR ASM3P622S00B/E Marking 3P622S00BF 3I622S00BF 3P622S00BF 3I622S00BF 3P622S00BF 3I622S00BF 3P622S00BF 3I622S00BF 3P622S00EF 3I622S00EF 3P622S00EF 3I622S00EF 3P622S00EF 3I622S00EF 3P622S00EF 3I622S00EF 3P622S00BG 3I622S00BG 3P622S00BG 3I622S00BG 3P622S00BG 3I622S00BG 3P622S00BG 3I622S00BG 3P622S00EG 3I622S00EG 3P622S00EG 3I622S00EG 3P622S00EG 3I622S00EG 3P622S00EG 3I622S00EG Package Type 8-pin 150-mil SOIC-TUBE, Pb Free 8-pin 150-mil SOIC-TUBE, Pb Free 8-pin 150-mil SOIC-TAPE & REEL, Pb Free 8-pin 150-mil SOIC-TAPE & REEL, Pb Free 8-pin 4.4-mm TSSOP - TUBE, Pb Free 8-pin 4.4-mm TSSOP - TUBE, Pb Free 8-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 8-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 16-pin 150-mil SOIC-TUBE, Pb Free 16-pin 150-mil SOIC-TUBE, Pb Free 16-pin 150-mil SOIC-TAPE & REEL, Pb Free 16-pin 150-mil SOIC-TAPE & REEL, Pb Free 16-pin 4.4-mm TSSOP - TUBE, Pb Free 16-pin 4.4-mm TSSOP - TUBE, Pb Free 16-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 16-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 8-pin 150-mil SOIC-TUBE, Pb Free 8-pin 150-mil SOIC-TUBE, Pb Free 8-pin 150-mil SOIC-TAPE & REEL, Pb Free 8-pin 150-mil SOIC-TAPE & REEL, Pb Free 8-pin 4.4-mm TSSOP - TUBE, Pb Free 8-pin 4.4-mm TSSOP - TUBE, Pb Free 8-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 8-pin 4.4-mm TSSOP - TAPE & REEL, Pb Free 16-pin 150-mil SOIC-TUBE, Green 16-pin 150-mil SOIC-TUBE, Green 16-pin 150-mil SOIC-TAPE & REEL, Green 16-pin 150-mil SOIC-TAPE & REEL, Green 16-pin 4.4-mm TSSOP - TUBE, Green 16-pin 4.4-mm TSSOP - TUBE, Green 16-pin 4.4-mm TSSOP - TAPE & REEL, Green 16-pin 4.4-mm TSSOP - TAPE & REEL, Green Temperature Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 13 of 15 May 2008 rev 0.5 Device Ordering Information ASM3P622S00B/E ASM3P622S00BG-08-TR R = Tape & Reel, T = Tube or Tray O = TSOT23 S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 J=TSOT26 C=TDFN (2X2) COL DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE, LEAD FREE, and RoHS PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Clock Generator 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved PulseCore Semiconductor Mixed Signal Product Licensed under US patent #5,488,627, #6,646,463 and #5,631,920. Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 14 of 15 May 2008 rev 0.5 ASM3P622S00B/E PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright © PulseCore Semiconductor All Rights Reserved Preliminary Information Part Number: ASM3P622S00B/E Document Version: 0.5 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 Many PulseCore Semiconductor products are protected by issued patents or by applications for patent © Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. Low Frequency Timing-Safe™ Peak EMI Reduction IC Notice: The information in this document is subject to change without notice. 15 of 15