ASM813LCSA

April 2008 rev 1.6 ASM705/706/707/708 ASM813L Low Power µP Supervisor Circuits General Description The ASM705 / 706 / 707 / 708 and ASM813L are cost effective CMOS supervisor circuits that monitors powersupply and battery voltage level, and µP/µC operation. Features • Precision power supply monitor • 4.65V threshold (ASM705/707/813L) • 4.40V threshold (ASM706/708) • Debounced manual reset input Voltage monitor • 1.25V threshold • Battery monitor / Auxiliary supply monitor • • • Watchdog timer (ASM705/706/813L) 200ms reset pulse width Active HIGH reset output (ASM707/708/813L) MicroSO package • The family offers several functional options. Each device generates a reset signal during power-up, power-down and during brownout conditions. A reset is generated when the supply drops below 4.65V (ASM705/707/813L) or 4.40V (ASM706/708). For 3V power supply applications, refer to the ASM705P/R/S/T data sheet. In addition, the ASM705/706/813L feature a 1.6 second watchdog timer. The ASM707/708 have both active-HIGH and active-LOW reset outputs but no watchdog function. The ASM813L has the same pin-out and functions as the ASM705 but has an active-HIGH reset output. A versatile power-fail circuit has a 1.25V threshold, useful in low battery detection and for monitoring non-5V supplies. All devices have a manual reset (MR) input. The watchdog timer output will trigger a reset if connected to MR. All devices are available in 8-pin DIP, SO and MicroSO packages. • Application • • • • Computers and embedded controllers Portable/Battery-operated systems Intelligent instruments Wireless communication systems PDAs and hend-held equipment Automative Systems Safety Systems • • • Typical Operating Circuit PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. April 2008 rev 1.6 Block Diagram ASM705/706/707/708 ASM813L Pin Configuration Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 2 of 15 April 2008 rev 1.6 Pin Description Pin Number ASM705/706 DIP/ SO 1 ASM705/706/707/708 ASM813L ASM707/708 DIP/ SO 1 ASM813L DIP/ SO 1 Name Function MicroSO MicroSO MicroSO MR 3 3 3 Manual reset input. The active LOW input triggers a reset pulse. A 250 µA pull-up current allows the pin to be driven by TTL/CMOS logic or shorted to ground with a switch. +5V power supply input. Ground reference for all signals. Power-fail input voltage monitor. With PFI less than 1.25V, PFO goes LOW. Connect PFI to Ground or VCC when not in use. Power-fail output. The output is active LOW and sinks current when PFI is less than 1.25V. Watchdog input. WDI controls the internal watchdog timer. A HIGH or LOW signal for 1.6sec at WDI allows the internal timer to run-out, setting WDO LOW. The watchdog function is disabled by floating WDI or by connecting WDI to a high impedance threestate buffer. The internal watchdog timer clears when: RESET is asserted; WDI is three-stated ; or WDI sees a rising or falling edge. Not Connected. Active LOW reset output. Pulses LOW for 200ms when triggered, and stays LOW whenever VCC is below the reset threshold. RESET remains LOW for 200ms after VCC rises above the reset threshold or MR goes from LOW to HIGH. A watchdog timeout will not trigger RESET unless WDO is connected to MR. Watchdog output. WDO goes LOW when the 1.6 second internal watchdog timer times-out and does not go HIGH until the watchdog is cleared. In addition, when VCC falls below the reset threshold, WDO goes LOW. Unlike RESET, WDO does not have a minimum pulse width and as soon as VCC exceeds the reset threshold, WDO goes HIGH with no delay. Active HIGH reset output. The inverse of RESET. The ASM813L only has a RESET output. 2 3 4 5 4 5 6 7 2 3 4 5 4 5 6 7 2 3 4 5 4 5 6 7 VCC GND PFI PFO 6 8 - - 6 8 WDI - - 6 8 - - NC 7 1 7 1 - - RESET 8 2 - - 8 2 WDO - - 8 2 7 1 RESET Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 3 of 15 April 2008 rev 1.6 Detailed Description A proper reset input enables a microprocessor / microcontroller to start in a known state. ASM70X and ASM813L assert reset to prevent code execution errors during power-up, power-down and brown-out conditions. RESET/RESET Timing The RESET/RESET signals are designed to start a µP/µC in a known state or return the system to a known state. The ASM707/708 have two reset outputs, one activeHIGH RESET and one active-LOW RESET output. The ASM813L has only an active-HIGH output. RESET is simply the complement of RESET. ASM705/706/707/708 ASM813L Manual Reset (MR) RESET is guaranteed to be LOW with VCC above 1.2V. During a power-up sequence, RESET remains low until the supply rises above the threshold level, either 4.65V or 4.40V. RESET goes high approximately 200ms after crossing the threshold. During power-down, RESET goes LOW as VCC falls below the threshold level and is guaranteed to be under 0.4V with VCC above 1.2V. In a brownout situation where VCC falls below the threshold level, RESET pulses low. If a brown-out occurs during an already initiated reset, the pulse will continue for a minimum of 140ms. Power Failure Detection With Auxiliary Comparator All devices have an auxiliary comparator with 1.25V trip point and uncommitted output (PFO) and noninverting input (PFI). This comparator can be used as a supply voltage monitor with an external resistor voltage divider. The attenuated voltage at PFI should be set just below the 1.25 threshold. As the supply level falls, PFI is reduced causing the PFO output to transit LOW. Normally PFO interrupts the processor so the system can be shut down in a controlled manner. The active-LOW manual reset input is pulled high by a 250µA pull-up current and can be driven low by CMOS/TTL logic or a mechanical switch to ground. An external debounce circuit is unnecessary since the 140ms minimum reset time will debounce mechanical pushbutton switches. By connecting the watchdog output (WDO) and MR, a watchdog timeout forces RESET to be generated. The ASM813L should be used when an active-HIGH RESET is required. Watchdog Timer The watchdog timer available on the ASM705/706/813L monitors µP/µC activity. An output line on the processor is used to toggle the WDI line. If this line is not toggled within 1.6 seconds, the internal timer puts the watchdog output, WDO, into a LOW state. WDO will remain LOW until a toggle is detected at WDI. If WDI is floated or connected to a three-stated circuit, the watchdog function is disabled, meaning, it is cleared and not counting. The watchdog timer is also disabled if RESET is asserted. When RESET becomes inactive and the WDI input sees a high or low transition as short as 50ns, the watchdog timer will begin a 1.6 second countdown. Additional transitions at WDI will reset the watchdog timer and initiate a new countdown sequence. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 4 of 15 April 2008 rev 1.6 WDO will also become LOW and remain so, whenever the supply voltage, VCC , falls below the device threshold level. WDO goes HIGH as soon as VCC transitions above the threshold. There is no minimum pulse width for WDO as there is for the RESET outputs. If WDI is floated, WDO essentially acts as a low-power output indicator. ASM705/706/707/708 ASM813L Monitoring Voltages Other Than VCC The ASM705-708 can monitor voltages other than VCC using the Power Fail circuitry. If a resistive divider is connected from the voltage to be monitored to the Power Fail input (PFI), the PFO will go LOW if the voltage at PFI goes below 1.25V reference. Should hysteresis be desired, connect a resistor (equal to approximately 10 times the sum of the two resistors in the divider) between the PFI and PFO pins. A capacitor between PFI and GND Application Information Ensuring That RESET is Valid Down to VCC = 0V When VCC falls below 1.1V, the ASM705-708 RESET output no longer pulls down; it becomes indeterminate. To avoid the possibility that stray charges build up and force RESET to the wrong state, a pull-down resistor should be connected to the RESET pin, thus draining such charges to ground and holding RESET low. The resistor value is not critical. A 100kΩ resistor will pull RESET to ground without loading it. Bi-directional Reset Pin Interfacing The ASM705/6/7/8 can interface with µP/µC bi-directional reset pins by connecting a 4.7kΩ resistor in series with the RESET output and the µP/µC bi-directional RESET pin. will reduce circuit sensitivity to input high-frequency noise. If it is desired to assert a RESET for voltages other than VCC then the PFO output is to be connected to the MR. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 5 of 15 April 2008 rev 1.6 Monitoring a Negative Voltage The Power-Fail circuitry can also monitor a negative supply rail. When the negative rail is OK, PFO will be LOW, and when the negative rail is failing (not negative enough), PFO goes HIGH (the opposite of when positive voltages are monitored). To trigger a reset, these outputs need to be inverted: adding the resistors and transistor as shown achieves this. The RESET output will then have the same sense as for positive voltages: good = HIGH, bad = LOW. It should be noted that this circuit’s accuracy depends on the VCC line, the PFI threshold tolerance, and the resistors. ASM705/706/707/708 ASM813L Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 6 of 15 April 2008 rev 1.6 Absolute Maximum Ratings Parameter Min Max ASM705/706/707/708 ASM813L Unit Pin Terminal Voltage with Respect to Ground VCC All other inputs1 Input Current at VCC and GND Output Current: All outputs Rate of Rise at VCC Plastic DIP Power Dissipation (Derate 9mW/°C above 70°C) SO Power Dissipation (Derate 5.9mW/°C above 70°C) MicroSO Power Dissipation (Derate 4.1mW/°C above 70°C) Operating Temperature Range ASM705E/706E/707E/708E/813LE ASM705C/706C/707C/708C/813LC Storage Temperature Range Lead Temperature (Soldering 10sec) ESD rating HBM MM Note: 1. The input voltage limits of PFI and MR can be exceeded if the input current is less than 10mA. These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability. -0.3 -0.3 6.0 V V mA mA VCC + 0.3 20 20 100 700 V/µs mV 470 330 mW mW -40 0 -65 +85 70 160 300 °C °C °C °C KV V 2 200 Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 7 of 15 April 2008 rev 1.6 Electrical Characteristics ASM705/706/707/708 ASM813L Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (ASM706P,ASM708R), 3.0 V to 5.5V (ASM706/708S), 3.15V to 5.5V (ASM706/708T) and 4.1V to 5.5.V (ASM706/708J) Parameter Operating Voltage Range SYMBOL VCC Test Conditions ASM705/6/7/8C ASM813L ASM705/6/7/8E, ASM813E ASM705/706C/813LC ASM705E/706E/813LE ASM707C/708C ASM707E/708E ASM705/707/813L, Note 1 ASM706/708 Note 1 Note 1 Min 1.2 1.1 1.2 TYP Max 5.5 5.5 5.5 140 140 140 140 4.75 4.50 Unit V Supply Current ICC RESET Threshold RESET Threshold Hysteresis RESET Pulse Width MR Pulse Width MR to RESET Out Delay MR Input Threshold MR Pullup current RESET Output Voltage VRT 4.50 4.25 75 75 50 50 4.65 4.40 40 µA V mV tRS tMR tMD VIH VIL Note 1 140 0.15 200 280 ms µs Note 1 2.0 MR = 0V ISOURCE = 800µA ISINK = 3.2mA ASM705/6/7/8, VCC = 1.2V, ISINK = 100µA ASM707/8/813L, ISOURCE = 800µA ASM707/8, ISINK = 1.2mA ASM813L, ISINK =3.2mA ASM813L, VCC = 1.2V, ISOURCE = 4µA 100 VCC - 1.5 250 0.25 0.8 600 0.4 0.3 VCC - 1.5 0.4 0.4 0.9 1.00 50 3.5 50 -50 0.8 150 1.60 2.25 µs V µA V RESET Output Voltage V Watchdog Timeout Period WDI Pulse Width WDI Input Threshold WDI Input Current WDO Output Voltage PFI Input Threshold PFI Input Current PFO Output Voltage tWD tWP VIH VIL ASM705/6/813L VIL = 0.4V, VIH=0.8VCC, ASM705/706/813L, VCC = 5V ASM705/6/813L, WDI = VCC ASM705/6/813L, WDI = 0V ASM705/6/813L, ISOURCE = 800µA ASM705/6/813L, ISINK = 1.2mA VCC = 5V ISOURCE = 800µA ISINK = 3.2mA S ns V µA V -150 VCC - 1.5 VOH VOL 0.4 1.2 -25 VCC - 1.5 1.25 0.01 1.3 25 0.4 V nA V VOH VOL Notes 1: RESET (ASM705/6/7/8), RESET(ASM707/8, ASM813L) Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 8 of 15 April 2008 rev 1.6 Package Dimensions 8-Pin MicroSO ASM705/706/707/708 ASM813L Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 9 of 15 April 2008 rev 1.6 Package Dimensions (contd) Plastic DIP (8-Pin) ASM705/706/707/708 ASM813L Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 10 of 15 April 2008 rev 1.6 Package Dimensions (contd) SO (8-Pin) ASM705/706/707/708 ASM813L Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 11 of 15 April 2008 rev 1.6 Ordering Codes Part Number TIN - LEAD DEVICES ASM705 Active LOW Reset, Watchdog Output And Manual RESET ASM705CPA ASM705CSA ASM705CUA ASM705EPA ASM705ESA ASM705EUA ASM706CPA ASM706CSA ASM706CUA ASM706EPA ASM706ESA ASM707CPA ASM707CSA ASM707CUA ASM707EPA ASM707ESA ASM708CPA ASM708CSA ASM708CUA ASM708EPA ASM708ESA ASM813LCPA ASM813LCSA ASM813LCUA ASM813LEPA ASM813LESA 4.65 4.65 4.65 4.65 4.65 4.65 4.40 4.40 4.40 4.40 4.40 4.65 4.65 4.65 4.65 4.65 4.40 4.40 4.40 4.40 4.40 4.65 4.65 4.65 4.65 4.65 0°C to +70 °C 0°C to +70 °C 0°C to +70 °C -40°C to +85°C -40°C to +85°C -40°C to +85°C 0°C to +70 °C 0°C to +70 °C 0°C to +70 °C -40°C to +85°C -40°C to +85°C 0°C to +70 °C 0°C to +70 °C 0°C to +70 °C -40°C to +85°C -40°C to +85°C 0°C to +70 °C 0°C to +70 °C 0°C to +70 °C -40°C to +85°C -40°C to +85°C 0°C to +70 °C 0°C to +70 °C 0°C to +70 °C -40°C to +85°C -40°C to +85°C Reset Threshold Temperature ASM705/706/707/708 ASM813L Pins-Package Package Marking 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO ASM705CPA ASM705CSA ASM705CUA ASM705EPA ASM705ESA ASM705EUA ASM706CPA ASM706CSA ASM706CUA ASM706EPA ASM706ESA ASM707CPA ASM707CSA ASM707CUA ASM707EPA ASM707ESA ASM708CPA ASM708CSA ASM708CUA ASM708EPA ASM708ESA ASM813LCPA ASM813LCSA ASM813LCUA ASM813LEPA ASM813LESA ASM706 Active LOW Reset, Watchdog Output And Manual RESET ASM707 Active LOW & HIGH Reset with Manual RESET ASM708Active LOW & HIGH Reset with Manual RESET ASM813L Active HIGH Reset, Watchdog Output And Manual RESET Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 12 of 15 April 2008 rev 1.6 Ordering Codes Part Number LEAD FREE DEVICES ASM705 Active LOW Reset, Watchdog Output And Manual RESET ASM705CPAF ASM705CSAF ASM705CUAF ASM705EPAF ASM705ESAF ASM705EUAF ASM706CPAF ASM706CSAF ASM706CUAF ASM706EPAF ASM706ESAF ASM707CPAF ASM707CSAF ASM707CUAF ASM707EPAF ASM707ESAF ASM708CPAF ASM708CSAF ASM708CUAF ASM708EPAF ASM708ESAF ASM813LCPAF ASM813LCSAF ASM813LCUAF ASM813LEPAF ASM813LESAF 4.65 4.65 4.65 4.65 4.65 4.65 4.40 4.40 4.40 4.40 4.40 4.65 4.65 4.65 4.65 4.65 4.40 4.40 4.40 4.40 4.40 4.65 4.65 4.65 4.65 4.65 0°C to +70 °C 0°C to +70 °C 0°C to +70 °C -40°C to +85°C -40°C to +85°C -40°C to +85°C 0°C to +70 °C 0°C to +70 °C 0°C to +70 °C -40°C to +85°C -40°C to +85°C 0°C to +70 °C 0°C to +70 °C 0°C to +70 °C -40°C to +85°C -40°C to +85°C 0°C to +70 °C 0°C to +70 °C 0°C to +70 °C -40°C to +85°C -40°C to +85°C 0°C to +70 °C 0°C to +70 °C 0°C to +70 °C -40°C to +85°C -40°C to +85°C Reset Threshold Temperature ASM705/706/707/708 ASM813L Pins-Package Package Marking 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO ASM705CPAF ASM705CSAF ASM705CUAF ASM705EPAF ASM705ESAF ASM705EUAF ASM706CPAF ASM706CSAF ASM706CUAF ASM706EPAF ASM706ESAF ASM707CPAF ASM707CSAF ASM707CUAF ASM707EPAF ASM707ESAF ASM708CPAF ASM708CSAF ASM708CUAF ASM708EPAF ASM708ESAF ASM813LCPAF ASM813LCSAF ASM813LCUAF ASM813LEPAF ASM813LESAF ASM706 Active LOW Reset, Watchdog Output And Manual RESET ASM707 Active LOW & HIGH Reset with Manual RESET ASM708Active LOW & HIGH Reset with Manual RESET ASM813L Active HIGH Reset, Watchdog Output And Manual RESET Note: For parts to be packed in Tape and Reel, add “-T” at the end of the part number. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 13 of 15 April 2008 rev 1.6 Feature Summary ASM705 Power fail detector Brownout detection Manual RESET input Power-up/down RESET Watchdog Timer Active HIGH RESET output Active LOW RESET output RESET Threshold (V) ASM706 ASM707 ASM705/706/707/708 ASM813L ASM708 ASM813L ♦ ♦ ♦ ♦ ♦ ♦ 4.65 ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 4.40 ♦ ♦ ♦ ♦ ♦ ♦ 4.65 ♦ 4.40 ♦ 4.65 Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 14 of 15 April 2008 rev 1.6 ASM705/706/707/708 ASM813L PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright © PulseCore Semiconductor All Rights Reserved Part Number: ASM705 / 706 / 707 / 708 ASM813L Document Version: 1.6 © Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 15 of 15