PYX28C64X-35CWMB

PYX28C64 8K x 8 EEPROM FEATURES Access Times of 200, 250, 300 and 350 ns Single 5V±10% Power Supply Simple Byte and Page Write Low Power CMOS: - 60 mA Active Current - 200 µA Standby Current Fast Write Cycle Times Software Data Protection Fully TTL Compatible Inputs and Outputs Endurance: 10,000 or 100,000 Cycles Data Retention: 100 Years Available in the following Packages: – 32-Pin Ceramic LCC (450 x 550 mils) – 28-Pin 600 mil Ceramic DIP DESCRIPTION The PYX28C64 is a 5 Volt 8Kx8 EEPROM using floating gate CMOS Technology. The device supports 64-byte page write operation. The PYX28C64 features DATA and Toggle Bit Polling as well as a system software scheme used to indicate early completion of a Write Cycle. The device also includes user-optional software data protection. Endurance is 10,000 or 100,000 Cycles and Data Retention is 100 Years. The device is available in a 32-Pin LCC package as well as a 28-Pin 600 mil wide Ceramic DIP. PIN CONFIGURATIONS FUNCTIONAL BLOCK DIAGRAM DIP (C5-1) 1519B LCC (L6) Document # EEPROM101 REV B Revised July 2007 1 PYX28C64 MAXIMUM RATINGS(1) Symbol V CC Parameter Power Supply Pin with Respect to GND Terminal Voltage with Respect to GND (up to 6.25V) Operating Temperature Value –0.3 to +6.25 –0.5 to +6.25 –55 to +125 Unit V Symbol TBIAS TSTG V °C PT IOUT Parameter Temperature Under Bias Storage Temperature Power Dissipation DC Output Current Value –55 to +125 –65 to +150 1.0 50 Unit °C °C W mA V TERM TA RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE Grade(2) Military Ambient Temperature –55°C to +125°C GND 0V V CC 5.0V ± 10% CAPACITANCES(4) VCC = 5.0V, TA = 25°C, f = 1.0MHz Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions Typ. Unit VIN = 0V VOUT = 0V 10 10 pF pF DC ELECTRICAL CHARACTERISTICS Over recommended operating temperature and supply voltage(2) Symbol VIH VIL V HC VLC VOL VOH ILI Parameter Input High Voltage Input Low Voltage CMOS Input High Voltage CMOS Input Low Voltage Output Low Voltage (TTL Load) Output High Voltage (TTL Load) Input Leakage Current IOL = +8 mA, VCC = Min. IOH = –4 mA, VCC = Min. VCC = Max. VIN = GND to VCC VCC = Max., CE = VIH, VOUT = GND to VCC CE ≥ VIH, OE = VIL, VCC= Max, f = Max., Outputs Open CE ≥ VHC, VCC= Max, f = 0, Outputs Open VIN ≤ VLC or VIN ≥ VHC CE = OE = VIL, WE = VIH, All I/O's = Open, Inputs = VCC = 5.5V ___ 3 mA –10 +10 µA 2.4 –10 +10 Test Conditions P5C164 Min 2.0 –0.5 –0.5 (3) Max VCC +0.3 0.8 VCC +0.5 0.2 0.4 Unit V V V V V V µA VCC –0.2 (3) ILO Output Leakage Current ISB Standby Power Supply Current (TTL Input Levels) Standby Power Supply Current (CMOS Input Levels) ISB1 ___ 250 µA ICC Supply Current ___ 60 mA Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM rating conditions for extended periods may affect reliability. 2. Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. Transient inputs with VIL and IIL not more negative than –3.0V and –100mA, respectively, are permissible for pulse widths up to 20 ns. 4. This parameter is sampled and not 100% tested. Document # EEPROM101 REV B Page 2 of 11 PYX28C64 AC ELECTRICAL CHARACTERISTICS—READ CYCLE (VCC = 5V ± 10%, All Temperature Ranges)(2) Symbol tAVAV tAVQV tELQV tOLQV tELQX tEHQZ tOLQX tOHQZ tAVQX tPU tPD Parameter Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low Z Chip Disable to Output in High Z Output Enable to Output in Low Z Output Disable to Output in High Z Output Hold from Address Change Chip Enable to Power Up Time Chip Disable to Power Down Time -200 Min Max 200 200 200 100 10 80 10 80 0 250 50 -250 Min Max 250 250 250 100 10 80 10 80 0 250 50 -300 Min Max 300 300 300 100 10 80 10 80 0 250 50 -350 Unit Min Max 350 350 350 100 10 80 10 80 0 250 50 ns ns ns ns ns ns ns ns ns ns ns TIMING WAVEFORM OF READ CYCLE Document # EEPROM101 REV B Page 3 of 11 PYX28C64 AC CHARACTERISTICS—WRITE CYCLE (VCC = 5V ± 10%, All Temperature Ranges)(2) Symbol tWHWL1 tEHEL1 tAVEL tAVWL tELAX tWLAX tWLEL tELWL tWHEH tOHEL tOHWL tWHOL tELEH tWLWH tDVEH tDVWH tEHDX tWHDX tEHEL2 tWHWL2 tELWL tEHWH tWHOH tOHAV VH Parameter Write Cycle Time Address Setup Time Address Hold Time Write Setup Time Write Hold Time OE Setup Time OE Hold Time WE Pulse Width Data Setup Time Data Hold Time Byte Load Cycle Time CE Setup Time CE Hold Time OE Hold Time Erase Time High Voltage for Chip Clear -200 Min Max 10 20 150 0 0 20 20 150 50 10 0.2 1 1 1 1 200 150 12 13 2 -250 Min Max 10 20 150 0 0 20 20 150 50 10 0.2 1 1 1 1 200 150 12 13 2 -300 Min Max 10 20 150 0 0 20 20 150 50 10 0.2 1 1 1 1 200 150 12 13 2 -350 Unit Min Max 10 20 150 0 0 20 20 150 50 10 0.2 1 1 1 1 200 150 12 13 2 ms ns ns ns ns ns ns ns ns ns µs µs µs µs µs ms ns V tOVHWL Output Setup Time tWLWH2 Chip Erase Time Document # EEPROM101 REV B Page 4 of 11 PYX28C64 TIMING WAVEFORM OF BYTE WRITE CYCLE (CE CONTROLLED) TIMING WAVEFORM OF BYTE WRITE CYCLE (WE CONTROLLED) Document # EEPROM101 REV B Page 5 of 11 PYX28C64 TIMING WAVEFORM OF PAGE WRITE CYCLE TIMING WAVEFORM OF CHIP CLEAR CYCLE Document # EEPROM101 REV B Page 6 of 11 PYX28C64 WRITE SEQUENCE FOR SOFTWARE DATA PROTECTION SOFTWARE SEQUENCE TO DE-ACTIVATE SOFTWARE DATA PROTECTION Document # EEPROM101 REV B Page 7 of 11 PYX28C64 AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input Timing Reference Level Output Timing Reference Level Output Load GND to 3.0V 10ns 1.5V 1.5V See Fig. 1 TRUTH TABLE Mode Read Chip clear Byte write Write inhibit Write inhibit Standby CE VIL VIL VIL X X VIH OE VIL VH VIH VIL X X WE VIH VIL VIL X VIH X I/O DOUT X DIN High Z/DOUT High Z/DOUT High Z FIGURE 1. OUTPUT LOAD Document # EEPROM101 REV B Page 8 of 11 PYX28C64 ORDERING INFORMATION ENDURANCE DEVICE PYX28C64 MINIMUM ENDURANCE 10,000 cycles (Standard) PYX28C64X 100,000 cycles (High Endurance) Document # EEPROM101 REV B Page 9 of 11 PYX28C64 Pkg # # Pins Symbol A b b2 C D E eA e L Q S1 S2 C5-1 28 (600 mil) Min Max 0.232 0.014 0.026 0.045 0.065 0.008 0.018 1.490 0.500 0.610 0.600 BSC 0.100 BSC 0.125 0.200 0.015 0.060 0.005 0.005 - SIDE BRAZED DUAL IN-LINE PACKAGE (600 mils) Pkg # # Pins Symbol A A1 B1 D D1 D2 D3 E E1 E2 E3 e h j L L1 L2 ND NE L6 32 Min Max 0.060 0.075 0.050 0.065 0.022 0.028 0.442 0.458 0.300 BSC 0.150 BSC 0.458 0.540 0.560 0.400 BSC 0.200 BSC 0.558 0.050 BSC 0.040 REF 0.020 REF 0.045 0.055 0.045 0.055 0.075 0.095 7 9 RECTANGULAR LEADLESS CHIP CARRIER Document # EEPROM101 REV B Page 10 of 11 PYX28C64 REVISIONS DOCUMENT NUMBER: DOCUMENT TITLE: REV. OR A B ISSUE DATE Jul-06 May-07 Jul-07 EEPROM101 PYX28C64 8K x 8 EEPROM ORIG. OF CHANGE JDB JDB JDB DESCRIPTION OF CHANGE New Data Sheet Renamed device from P5C164 to P6C28C64 Renamed device from P6C28C64 to PYX28C64 Document # EEPROM101 REV B Page 11 of 11