RA8825

RAiO RA8825 128x33 Dot Matrix LCD Driver Specification Version 1.1 March 2, 2006 RAiO Technology Inc. ©Copyright RAiO Technology Inc. 2005, 2006 RAiO TECHNOLOGY INC. 1/6 www.raio.com.tw RA8825 Preliminary Version 1.1 128x33 Graphic LCD Driver 1. General Description The RA8825 is a Dot-Matrix LCD Driver. The embedded 528Byte display RAM supports up to 128x33 dots LCD panel. The RA8825 also provides a scrolling buffer memory for scrolling functions. It supports up, down, left and right scrolling features, and all of the scrolling functions are execute by hardware. The RA8825 integrates many powerful hardware that including Contrast adjustment, 4x5 Key-Scan, eight General Purpose I/O and EL Backlight signals for EL driver. The RA8825 is a high integration chip of LCD Controller. It reduce a lot of time for system develop, and save much cost for hardware system that due to it provides many features for related LCD display application. 2 . Feature Support 8080/6800 8/4-bit Parallel Interface and 3-wire/4-wire Serial Interface Support Maximum 128Seg x 33Com LCD Panel. Built-in 528 Bytes Display RAM and 354Byte Scrolling Buffer Built-in 2X~3X(Voltage Booster), Voltage Regulator, Voltage Follower Support 1/33 Duty, 1/6~1/4 Bias Panel Eight General Purpose I/O Built-in 4x5 Key Scan Circuit Support Horizontal/Vertical Scrolling Functions Provide Signals for EL Driver Provide 32-Steps Contrast Adjust Build-in RC Oscillator Voltage Operation : 2.6~3.6V Package : Gold Bump Die 3 . System Block Diagram MPU LCD Panel RA8825 GPIO EL Back Light Driver 4x5 Key Scan 4 . Pad and Package Icon 128x32 COG RA8825 FPC #N #1 COG Module RAiO TECHNOLOGY INC. 2/6 www.raio.com.tw COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 3 4 5 6 7 8 9 10 11 1 2 Logo DB[0:7] TEST[2..0] WR(R/W) RD(EN) D/C(RS) KIN[4..0] KST[3..0] IO[7..0] EL_DCHG EL_CHRG EXT_CLK INT CLK_SEL CS C86 BIT4 P/S P1 RST Preliminary Version 1.1 FG S[1:0] RAiO TECHNOLOGY INC. VLCD VLCD VLCD VLCD VLCD VLCD C2M C2M C2P C2P C1M C1M C1P C1P GNDP GNDP GND GND GND GND VDD VDD VDD VDDP 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 S1 FG S0 36 37 38 39 40 41 42 43 44 V1 V1 V2 V2 V2 V2 V3 V3 V3 V3 V4 V4 V4 V4 VREF VREF GND VDD 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 V0 V0 V0 V0 V1 V1 MPU I/F Block GPIO RC Key Scan Control Block & INT Oscillator Test & Power Circuit Block Voltage Register Booster RA8825 C[2:1]P C[2:1]M V0~V4 VLCD Top View (8758µm x 1148 µm ) 5 . Block Diagram The RA8825 consists of Display RAM, Command Registers, LCD Controller, LCD Driver, Voltage Booster, Voltage Regulator, MPU Interface and Key-Scan circuit. 3/6 Cursor Control Voltage Regulator 528bytes Display RAM + Buffer Scroll Control LCDC Control Block Driver I/F Voltage Follower Scan Control VREF (0, 0) X Y 128 Segment Drivers SEG0~SEG127 COM0~COM31 33 Common Drivers COMS_A[1:0] COMS_B[1:0] 63 DB7, SMOD1 64 DB6, SMOD0 65 DB5 66 DB4 67 DB3, CS 68 DB2, RS, SDI DB1, SDA, SDO 69 70 DB0, SCL 71 RD, EN 72 WR, R/W 73 D/C, RS 74 CS 75 C86 76 BIT4 77 P/S 78 INT 79 EXT_CLK 80 CLK_SEL 81 KST3 82 KST2 83 KST1 84 KST0 85 KIN4 86 KIN3 87 KIN2 88 KIN1 89 KIN0 90 IO7 91 IO6 92 IO5 93 IO4 94 IO3 95 IO2 96 IO1 97 IO0 98 EL_CHRG 99 EL_DCHG 100 RST 101 TEST2 102 TEST1 103 TEST0 GND VDD 104 105 P2 258 257 256 255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 COM4 COM3 COM2 COM1 COM0 COMS_A1 COMS_A0 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 SEG80 SEG81 SEG82 SEG83 SEG84 SEG85 SEG86 SEG87 SEG88 SEG89 SEG90 SEG91 SEG92 SEG93 SEG94 SEG95 SEG96 SEG97 SEG98 SEG99 SEG100 SEG101 SEG102 SEG103 SEG104 SEG105 SEG106 SEG107 SEG108 SEG109 SEG110 SEG111 SEG112 SEG113 SEG114 SEG115 SEG116 SEG117 SEG118 SEG119 SEG120 SEG121 SEG122 SEG123 SEG124 SEG125 SEG126 SEG127 COM16 COM17 COM18 COM19 COM20 COM21 COM22 128x33 Graphic LCD Driver www.raio.com.tw RA8825 116 COM23 115 COM24 114 COM25 113 COM26 112 COM27 111 COM28 110 COM29 109 COM30 108 COM31 107 COMS_B0 106 COMS_B1 RA8825 Preliminary Version 1.1 128x33 Graphic LCD Driver 6. Pin Definition 5 -1 MPU Interface Pin Name I/O Description Data Bus When the MPU use parallel mode and 8-bit then all of the DB[7:0] are valid. When use 4-bit then only DB[4:0] are valid, and DB[7:4] have to keep floating. When P/ S is “0”, then the interface between MPU and RA8825 is Serial Mode. The pins DB[7:6](SMOD[1:0]) are used to select which serial mode: DB[7..0] DB0: SCK DB1: SDA/SDO DB2: RS/SDI DB3: CS DB[7:6]: SMOD SMOD : Serial Mode ----------------------------------------------------------------0 X : 3-Wire, SCK, SDA, I/O 1 0 : 4-Wire, SCK, SDA, RS, are used. are used. 1 1 : 4-Wire, SCK, SDO, SDI, CS are used. In serial mode, all of the related signals are defined by DB[3:0]: SCK(DB0) : Serial Clock. SDA(DB1) : Bi-direction Mode Serial Data. SDO(DB1) : Data Out. RS(DB2) : Memory/Register Cycle Select. SDI(DB2) : Serial Data In. CS (DB3) : Chip Select, active low. The unused pin must keep NC for serial mode. Read Control or Enable EN I When use 8080 series interface, is the read signal and active low. When use 6800 series interface, EN is the Enable signal and active high. Connect this pin to VDD for serial mode. Write Control or Read-Write Control When use 8080 series interface, R/ I is the write signal and active low. When use 6800 series interface, this pin is R/ , active high for read cycle and active low for write cycle. Connect this pin to VDD for serial mode. Data/Command Select or Register Select) When use 8080 series interface, this is Data or Command signal. When D/ C is “0”, means Register Cycle(or Command Cycle). When D/ C is “1”, means Data Access Cycle(Data Cycle). When use 6800 series interface, this is the RS signal. When RS is “0”, means Register Cycle and “1” means Data Access Cycle. Connect this pin to VDD for serial mode. Chip Select This is a chip enable for RA8825. Connect this pin to VDD for serial mode. Interrupt Signal This is an interrupt output for MPU. Active low。 D/ RS I CS I O RAiO TECHNOLOGY INC. 4/6 www.raio.com.tw RA8825 Preliminary Version 1.1 128x33 Graphic LCD Driver MPU Select I C86 = 0 C86 = 1 The MPU interface is 8080 series. The MPU interface is 6800 series(Default). Connect this pin to VDD for serial mode. Data Bit Select BIT4 = 0 The parallel mode is use 8-bit data bus. BIT4 = 1 The parallel mode is use 4-bit data bus(Default). Connect this pin to VDD for serial mode. Parallel/Serial Select P/ S I P/ S = 0 DB[7:6]. P/ S = 1 The MPU interface is serial mode(Default). See the setting of The MPU interface is parallel mode. BIT4 I 5 -2 LCD Panel Interface Pin Name SEG0 ~ SEG127 COM0 ~ COM31 COMS_A[1:0] COMS_B[1:0] I/O O O O Segment Signals for Panel Common Signals for Panel Icon Common Signals for Panel Description 5 -.3 Clock and Power Pin Name V0~V4 C1P, C1M C2P, C2M VLCD VREF I/O O I I O I Description Voltage Source of LCD Driver The relationship of the power is VLCD>V0≧V1≧V2≧V3≧V4≧VSS。 These pins have to add external 0.1uF~1uF capacitor to GND. Capacitor Input These are used to connect a capacitor for internal Booster. Capacitor Input These are used to connect a capacitor for internal Booster. Booster Output Reference Voltage Input This is the refeence voltage input when use an external regulator. Normally keep this pin floating, if connect this signal to FPC then have to add a 0.1uF capacitor to GND. Clock Select This pin is used to select the clock source. When CLK_SEL “1”, the clock is generated by internal RC oscillator. When CLK_SEL is “0”, the system clock is drive by external pin - EXT_CLK. External Clock When CLK_SEL is “0”, this pin is the external clock input. When CLK_SEL is “1”, this pin do not used and has to connect VDD or GND. CLK_SEL I EXT_CLK I RAiO TECHNOLOGY INC. 5/6 www.raio.com.tw RA8825 Preliminary Version 1.1 128x33 Graphic LCD Driver VDD VDDP GND GNDP P P VDD Power Ground 5 -4 Misc. Pin Name KST[3..0] KIN[4..0] IO[7..0] EL_CHRG EL_DCHG RST I/O O I I/O O O I I I Description Key Strobe Output Key Data Input Connect these pins to VDD for unused. General Purpose I/O EL Charge Signal EL Discharge Signal Reset This is Reset signal and active low, Test Pins These pins must contact to GND for normal mode. Test Pins These pins must keep NC for normal mode. TEST[2..0] S[1:0], FG RAiO TECHNOLOGY INC. 6/6 www.raio.com.tw