2SK1697

2SK1697 Silicon N-Channel MOS FET REJ03G1373-0200 (Previous: ADE-208-1313) Rev.2.00 May 11, 2006 Application High speed power switching Features • • • • • Low on-resistance High speed switching Low drive current 4 V gate drive device can be driven from 5 V source. Suitable for DC – DC converter, motor drive, power switch, solenoid drive Outline RENESAS Package code: PLZZ0004CA-A (Package name: UPAK R ) 3 21 G 4 D 1. Gate 2. Drain 3. Source 4. Drain S Note: Marking is “EY”. *UPAK is a trademark of Renesas Technology Corp. Absolute Maximum Ratings (Ta = 25°C) Item Symbol Drain to source voltage VDSS Gate to source voltage VGSS Drain current ID Drain peak current ID(pulse)*1 Body to drain diode reverse drain current IDR Channel dissipation Pch*2 Channel temperature Tch Storage temperature Tstg Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. When using the alumina ceramic board (12.5 × 20 × 0.7 mm) Ratings 60 ±20 0.5 1.5 0.5 1 150 –55 to +150 Unit V V A A A W °C °C Rev.2.00 May 11, 2006 page 1 of 6 2SK1697 Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body to drain diode forward voltage Body to drain diode reverse recovery time Note: 1. Pulse test Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) RDS(on) |yfs| Ciss Coss Crss td(on) tr td(off) tf VDF trr Min 60 ±20 — — 1.0 — — 0.25 — — — — — — — — — Typ — — — — — 1.3 1.8 0.38 33 17 5 3 8 18 14 1 45 Max — — ±10 50 2.0 1.7 2.5 — — — — — — — — — — Unit V V µA µA V Ω Ω S pF pF pF ns ns ns ns V ns Test conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 50 V, VGS = 0 ID = 1 mA, VDS = 10 V ID = 0.3 A, VGS = 10 V *1 ID = 0.3 A, VGS = 4 V *1 ID = 0.3 A, VDS = 10 V *1 VDS = 10 V, VGS = 0, f = 1 MHz ID = 0.3 A, VGS = 10 V, RL = 100 Ω IF = 0.5 A, VGS = 0 IF = 0.5 A, VGS = 0, diF/dt = 50 A/µs Rev.2.00 May 11, 2006 page 2 of 6 2SK1697 Main Characteristics Power vs. Temperature Derating 1.5 10 3 Maximum Safe Operation Area Channel Dissipation Pch (mW) Drain Current ID (A) 10 1.0 1 0.3 0.1 0.03 PW DC O pe µs 10 0 1 10 m (T µs = m (1 = s Sh 0.5 ra s tio n ot ) Operation in this area is limited by RDS (on) C 25 0 50 100 150 0.01 0.1 Ta = 25°C 0.3 1 3 10 °C ) 100 30 Ambient Temperature Ta (°C) Drain to Source Voltage VDS (V) Typical Output Characteristics 1.0 10 V 6V 4V Pulse Test 1.0 Typical Transfer Characteristics VDS = 10 V Pulse Test Drain Current ID (A) 0.6 3V 0.4 2.5 V 0.2 VGS = 2 V 0 2 4 6 8 10 Drain Current ID (A) 0.8 3.5 V 0.8 0.6 0.4 0.2 25°C TC = 75°C 1 2 –25°C 3 4 5 0 Drain to Source Voltage VDS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage 1.0 Pulse Test Gate to Source Voltage VGS (V) Static Drain to Source on State Resistance vs. Drain Current 50 Pulse Test 20 10 5 2 1 0.5 0.05 0.1 VGS = 4 V 10 V Drain to Source Saturation Voltage VDS (on) (V) 0.8 0.5 A 0.6 0.4 0.2 A 0.2 ID = 0.1 A Static Drain to Source on State Resistance RDS (on) (Ω) 0 2 4 6 8 10 0.2 0.5 1 2 5 Gate to Source Voltage VGS (V) Drain Current ID (A) Rev.2.00 May 11, 2006 page 3 of 6 2SK1697 Static Drain to Source on State Resistance vs. Temperature 5 Pulse Test 4 ID = 0.5 A 0.2 A 3 VGS = 4 V 2 0.2 A 0.1 A 0.1 A 0.5 A 10 V Static Drain to Source on State Resistance RDS (on) (Ω) Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance yfs (S) 5 VDS = 10 V Pulse Test 2 1 0.5 25°C –25°C TC = 75°C 0.2 0.1 0.05 0.02 1 0 –40 0 40 80 120 160 0.05 0.1 0.2 0.5 1 2 Case Temperature TC (°C) Body to Drain Diode Reverse Recovery Time 1,000 Drain Current ID (A) Typical Capacitance vs. Drain to Source Voltage 100 Ciss Reverse Recovery Time trr (ns) 500 Capacitance C (pF) di/dt = 50 A/µs VGS = 0, Ta = 25°C Pulse Test 200 100 50 10 Coss Crss 1 20 10 0.05 0.1 0.1 0.2 0.5 1 2 5 0 VGS = 0 f = 1 MHz 10 20 30 40 50 Reverse Drain Current IDR (A) Drain to Source Voltage VDS (V) Dynamic Input Characteristics 100 20 Switching Characteristics Gate to Source Voltage VGS (V) 100 50 20 10 5 2 1 0.05 tr td (on) VGS = 10 V, PW = 2 µs . duty < 1%, VDD = 30 V . td (off) Drain to Source Voltage VDS (V) Switching Time t (ns) 80 VDD = 10 V 25 V 50 V VDS VGS 16 tf 60 12 40 8 20 0 0 VDD = 50 V 25 V 10 V 0.8 1.6 ID = 0.3 A 4 0 2.4 3.2 4.0 0.1 0.2 0.5 1 2 5 Gate Charge Qg (nc) Drain Current ID (A) Rev.2.00 May 11, 2006 page 4 of 6 2SK1697 Reverse Drain Current vs. Source to Drain Voltage 1.0 Reverse Drain Current IDR (A) Pulse Test 0.8 0.6 0.4 10 V 0.2 5V VGS = 0, –5 V 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) Rev.2.00 May 11, 2006 page 5 of 6 2SK1697 Package Dimensions Package Name UPAK JEITA Package Code SC-62 RENESAS Code PLZZ0004CA-A Previous Code UPAK / UPAKV MASS[Typ.] 0.050g Unit: mm 4.5 ± 0.1 1.5 1.5 3.0 Ordering Information Part Name 2SK1697EYTL-E 2SK1697EYTR-E 1000 pcs Quantity Shipping Container φ178 mm Reel, 12 mm Emboss Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.2.00 May 11, 2006 page 6 of 6 0.8 Min 0.44 Max (0.4) 0.53 Max 0.48 Max (2.5) φ1 2.5 ± 0.1 4.25 Max 0.4 1.8 Max 1.5 ± 0.1 0.44 Max (1.5) (0.2) Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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