511MLFT

DATASHEET ICS511 LOCO™ PLL CLOCK MULTIPLIER Description Features The ICS511 LOCOTM is the most cost effective way to generate a high quality, high frequency clock output from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 200 MHz. • Packaged as 8-pin SOIC or die • Pb (lead) free package • Upgrade of popular ICS501 with: • • • • • • • • • • • • Stored in the chip’s ROM is the ability to generate nine different multiplication factors, allowing one chip to output many common frequencies (see table on page 2). The device also has an output enable pin which tri-states the clock output when the OE pin is taken low. This product is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined nor guaranteed. For applications which require defined input to output skew, use the ICS570B. - changed multiplier table - faster operating frequencies - output duty cycle at VDD/2 Zero ppm multiplication error Input crystal frequency of 5 - 27 MHz Input clock frequency of 2 - 50 MHz Output clock frequencies up to 200 MHz Extremely low jitter of 25 ps (one sigma) Compatible with all popular CPUs Duty cycle of 45/55 up to 200 MHz Mask option for nine selectable frequencies Operating voltage of 3.3 V or 5 V Tri-state output for board level testing Industrial temperature version available Advanced, low power CMOS process Block Diagram VDD S1:0 2 PLL Clock Multiplier Circuitry and ROM X1/ICLK Crystal or Clock input Crystal Oscillator CLK X2 Optional crystal capacitors GND IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 1 OE ICS511 REV K 051310 ICS511 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Pin Assignment Clock Output Table S1 S0 CLK 0 0 4X input X1/ I CLK 1 8 X2 0 M 5.333X input VDD 2 7 OE 0 1 5X input GND 3 6 S0 M 0 2.5X input M M 2X input M 1 3.333X input 1 0 6X input 1 M 3X input 1 1 8X input S1 5 4 CLK 8 Pi n ( 150 mi l ) SOI C 0 = connect directly to ground 1 = connect directly to VDD M = leave unconnected (floating) Common Output Frequency Examples (MHz) Output 20 24 30 32 33.33 37.5 40 48 50 60 64 Input 10 12 10 16 16.66 15 10 12 20 10 16 Selection (S1, S0) M, M M, M 1, M M, M M, M M, 0 0, 0 0, 0 M, 0 1, 0 0, 0 Output 66.66 72 75 80 83.33 90 100 120 125 133.3 150 20 12 25 10 25 15 20 15 25 25 25 M, 1 1, 0 1, M 1, 1 M, 1 1, 0 0, 1 1, 1 0, 1 0, M 1, 0 Input Selection (S1, S0) Pin Descriptions Pin Number Pin Name Pin Type 1 XI/ICLK Input Crystal connection or clock input. 2 VDD Power Connect to +3.3 V or +5 V. 3 GND Power Connect to ground. 4 S1 Tri-level Iinput 5 CLK Output IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER Pin Description Select 1 for output clock. Connect to GND or VDD or float. Clock output per table above. 2 ICS511 REV K 051310 ICS511 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Pin Number Pin Name Pin Type 6 S0 Tri-level Input 7 OE Input 8 X2 Output Pin Description Select 0 for output clock. Connect to GND or VDD or float. Output enable. Tri-states CLK output when low. Internal pull-up resistor. Crystal connection. Leave unconnected for clock input. External Components Decoupling Capacitor stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) between the crystal and device. Crystal capacitors, if needed, must be connected from each of the pins X1 and X2 to ground. As with any high-performance mixed-signal IC, the ICS511 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01µF must be connected between VDD and the GND. It must be connected close to the ICS511 to minimize lead inductance. No external power supply filtering is required for the ICS511. The value (in pF) of these crystal caps should equal (CL -12 pF)*2. In this equation, CL= crystal load capacitance in pF. Example: For a crystal with a 16 pF load capacitance, each crystal capacitor would be 8 pF [(16-12) x 2] = 8. Series Termination Resistor A 33Ω terminating resistor can be used next to the CLK pin for trace lengths over one inch. Crystal Load Capacitors The total on-chip capacitance is approximately 12 pF. A parallel resonant, fundamental mode crystal should be used. The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 3 ICS511 REV K 051310 ICS511 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS511. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature (Commercial grade) 0 to +70° C Ambient Operating Temperature (Industrial grade) -40 to +85° C Storage Temperature -65 to +150° C Soldering Temperature 260° C Recommended Operation Conditions Parameter Min. Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 4 Typ. Max. Units -40 +85 °C +3.135 +5.25 V ICS511 REV K 051310 ICS511 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER DC Electrical Characteristics VDD=3.3 V ±5% , Ambient temperature -40 to +85° C, unless stated otherwise Parameter Symbol Operating Voltage Conditions Min. VDD Typ. 3.135 Input High Voltage, ICLK only VIH ICLK (pin 1) Input Low Voltage, ICLK only VIL ICLK (pin 1) Input High Voltage VIH OE (pin 7) Input Low Voltage VIL OE (pin 7) Input High Voltage VIH S0, S1 Input Low Voltage VIL S0, S1 Output High Voltage VOH IOH = -25 mA Output Low Voltage VOL IOL = 25 mA IDD Operating Supply Current, 20 MHz crystal No load, 100M Short Circuit Current Max. Units 3.465 V (VDD/2)+0.7 V (VDD/2)-0.7 2.0 V V 0.8 VDD-0.5 V V 0.5 2.4 V V 0.4 V 8 mA CLK output +70 mA On-Chip Pull-up Resistor Pin 7 270 kΩ Input Capacitance, S1, S0, and OE Pins 4, 6, 7 4 pF 20 Ω Nominal Output Impedance AC Electrical Characteristics VDD = 3.3 V ±5%, Ambient Temperature -40 to +85° C, unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency, crystal input FIN 5 27 MHz Input Frequency, clock input FIN 2 50 MHz 0° C to +70° C 14 160 MHz -40° C to +85° C 14 145 MHz Output Frequency FOUT Output Clock Rise Time tOR 0.8 to 2.0 V, Note 1 1 1.5 ns Output Clock Fall Time tOF 2.0 to 8.0 V, Note 1 1 1.5 ns Output Clock Duty Cycle tOD 1.5 V, up to 160 MHz 49-51 55 % PLL Bandwidth 45 10 kHz Output Enable Time, OE high to output on 50 ns Output Disable Time, OE low to tri-state 50 ns +70 ps 25 ps Absolute Clock Period Jitter tja One Sigma Clock Period Jitter tjs Deviation from mean Note 1: Measured with 15 pF load. IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 5 ICS511 REV K 051310 ICS511 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER DC Electrical Characteristics VDD=5.0 V ±5% , Ambient temperature -40 to +85° C, unless stated otherwise Parameter Symbol Operating Voltage Conditions Min. VDD Typ. 4.75 Input High Voltage, ICLK only VIH ICLK (pin 1) Input Low Voltage, ICLK only VIL ICLK (pin 1) Input High Voltage VIH OE (pin 7) Input Low Voltage VIL OE (pin 7) Input High Voltage VIH S0, S1 Input Low Voltage VIL S0, S1 Output High Voltage VOH IOH = -25 mA Output Low Voltage VOL IOL = 25 mA IDD Operating Supply Current, 20 MHz crystal No load, 100M Short Circuit Current Max. Units 5.25 V (VDD/2)+1 V (VDD/2)-1 2.0 V V 0.8 VDD-0.5 V V 0.5 2.4 V V 0.4 V 9 mA CLK output +70 mA On-Chip Pull-up Resistor Pin 7 270 kΩ Input Capacitance, S1, S0, and OE Pins 4, 6, 7 4 pF 20 Ω Nominal Output Impedance AC Electrical Characteristics VDD = 5.0 V ±5%, Ambient Temperature -40 to +85° C, unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency, crystal input FIN 5 27 MHz Input Frequency, clock input FIN 2 50 MHz 0° C to +70° C 14 200 MHz -40° C to +85° C 14 160 MHz Output Frequency FOUT Output Clock Rise Time tOR 0.8 to 2.0 V, Note 1 1 1.5 ns Output Clock Fall Time tOF 2.0 to 8.0 V, Note 1 1 1.5 ns Output Clock Duty Cycle tOD 1.5 V, up to 160 MHz 49-51 55 % PLL Bandwidth 45 10 kHz Output Enable Time, OE high to output on 50 ns Output Disable Time, OE low to tri-state 50 ns +70 ps 25 ps Absolute Clock Period Jitter tja One Sigma Clock Period Jitter tjs Deviation from mean Note 1: Measured with 15 pF load. IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 6 ICS511 REV K 051310 ICS511 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Symbol Conditions Min. Typ. Max. Units θJA Still air 150 ° C/W θJA 1 m/s air flow 140 ° C/W θJA 3 m/s air flow 120 ° C/W 40 ° C/W θJC Marking Diagram (industrial) 8 5 511MILF ###### YYWW 1 4 Marking Diagram 8 5 511MLF ###### YYWW 1 4 Notes: 1. ###### is the lot number. 2. YYWW is the last two digits of the year and week that the part was assembled. 3. “LF” denotes Pb (lead) free package. 4. “I” denotes industrial grade. IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 7 ICS511 REV K 051310 ICS511 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 8 Millimeters Symbol E A A1 B C D E e H h L α H INDEX AREA 1 2 D A Min Max 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° Inches Min Max .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0° 8° h x 45 A1 C -Ce B SEATING PLANE L .10 (.004) IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER C 8 ICS511 REV K 051310 ICS511 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature 511MLF 511MLFT 511MILF 511MILFT 511-DWF 511-DPK 511MLF 511MLF 511MILF 511MILF - Tubes Tape and Reel Tubes Tape and Reel Die on uncut, probed wafers Tested die in waffle pack 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 0 to +70° C 0 to +70° C -40 to +85° C -40 to +85° C 0 to +70° C 0 to +70° C “LF” designates Pb (lead) free packaging. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 9 ICS511 REV K 051310 ICS511 LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER ICS511 LOCO™ PLL CLOCK MULTIPLIER IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER 11 ICS511 REV K 051310 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. 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