IDT54/74FCT574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS OCTAL D
REGISTERS (3-STATE)
FEATURES:
•
•
•
•
•
•
•
•
•
IDT54/74FCT574T/AT/CT
DESCRIPTION:
Std., A, and C grades
Low input and output leakage ≤1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
High Drive outputs (-15mA IOH, 48mA IOL)
Meets or exceeds JEDEC standard 18 specifications
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Power off disable outputs permit "live insertion"
Available in the following packages:
– Industrial: SOIC, QSOP
– Military: CERDIP, LCC
The FCT574T is an 8-bit register built using an advanced dual metal
CMOS technology. These registers consist of eight D-type flip-flops with a
buffered common clock and buffered 3-state output control. When the output
enable (OE) input is low, the eight outputs are enabled. When the OE input
is high, the outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements of the D inputs
is transferred to the Q outputs on the low-to-high transition of the clock input.
FUNCTIONAL BLOCK DIAGRAM
D0
D1
CP D
Q
CP D
Q
D2
D3
D4
D5
D6
D7
CP
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
Q
Q
Q
Q
Q
Q
Q2
Q3
Q4
Q5
Q6
Q7
OE
Q0
Q1
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
NOVEMBER 2016
1
DSC-5494/7
IDT54/74FCT574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
D0
2
19
Q0
D1
3
18
Q1
D2
4
17
Q2
D3
5
16
Q3
D4
6
15
D5
7
14
3
2
1
16
Q3
Q4
D5
7
15
Q4
Q5
D6
8
14
Q5
8
13
Q6
D7
9
12
Q7
10
11
CP
9
10
11
Max
Unit
VTERM(2) Terminal Voltage with Respect to GND
–0.5 to +7
V
VTERM(3) Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–60 to +120
mA
PIN DESCRIPTION
Pin Names
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
Typ.
Max.
Input Capacitance
VIN = 0V
6
10
pF
COUT
Output Capacitance
VOUT = 0V
8
12
pF
D flip-flop data inputs
CP
Clock Pulse for the register. Enters data on LOW-toHIGH transition.
Qx
3-State Outputs (TRUE)
Qx
3-State Outputs (INVERTED)
OE
Active LOW 3-State Output Enable Input
Function
High-Z
Load
Register
Unit
CIN
Description
Dx
FUNCTION TABLE(1)
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Conditions
13
LCC
TOP VIEW
Description
Parameter(1)
12
Q6
6
Q7
D4
CP
Q2
GND
17
D3
D7
5
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
19
Q1
D2
4
CERDIP/ SOIC/ TSSOP
TOP VIEW
Symbol
20
18
D6
GND
INDEX
Q0
VCC
VCC
20
OE
1
D0
OE
D1
PIN CONFIGURATION
OE
H
H
L
L
H
H
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
NC = No Change
↑ = LOW-to-HIGH transition
NOTE:
1. This parameter is measured at characterization but not tested.
2
Inputs
CP
L
H
↑
↑
↑
↑
Dx
X
X
L
H
L
H
Outputs
Qx
Z
Z
L
H
Z
Z
Internal
Qx
NC
NC
H
L
H
L
IDT54/74FCT574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
VIH
Input HIGH Level
Guaranteed Logic HIGH Level
2
—
—
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
—
—
0.8
V
IIH
Input HIGH Current(4)
VCC = Max.
VI = 2.7V
—
—
±1
µA
IIL
Input LOW Current(4)
VCC = Max.
VI = 0.5V
—
—
±1
µA
IOZH
High Impedance Output Current
VCC = Max
VO = 2.7V
—
—
±1
µA
IOZL
(3-State output pins)(4)
II
VIK
VH
Input HIGH Current(4)
Clamp Diode Voltage
Input Hysteresis
VCC = Max., VI = VCC (Max.)
VCC = Min, IIN = -18mA
ICC
Quiescent Power Supply Current
VCC = Max., VIN = GND or VCC
VO = 0.5V
—
—
—
±1
—
—
—
—
–0.7
200
±1
–1.2
—
µA
V
mV
—
0.01
1
mA
Min.
2.4
Typ.(2)
3.3
Max.
—
Unit
2
3
—
—
0.3
0.5
V
–60
–120
–225
mA
OUTPUT DRIVE CHARACTERISTICS
Symbol
VOH
Parameter
Output HIGH Voltage
VOL
Output LOW Voltage
IOS
Short Circuit Current
Test Conditions(1)
VCC = Min
IOH = –6mA MIL
VIN = VIH or VIL
IOH = –8mA IND
IOH = –12mA MIL
IOH = –15mA IND
VCC = Min
IOL = 32mA MIL
VIN = VIH or VIL
IOL = 48mA IND
VCC = Max., VO = GND(3)
V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
3
IDT54/74FCT574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
—
0.5
2
mA
VIN = VCC
VIN = GND
—
0.15
0.25
mA/
MHz
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE = GND
fi = 5MHz
One Bit Toggling
VIN = VCC
VIN = GND
—
1.5
3.5
mA
VIN = 3.4V
VIN = GND
—
2
5.5
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OE = GND
Eight Bits Toggling
fi = 2.5MHz
VIN = VCC
VIN = GND
—
3.8
7.3(5)
VIN = 3.4V
VIN = GND
—
6
16.3(5)
Symbol
Parameter
ΔICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
OE = GND
One Input Toggling
50% Duty Cycle
Total Power Supply Current(6)
IC
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ΔICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCP/2+ fiNi)
ICC = Quiescent Current
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
mA
IDT54/74FCT574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
FCT574AT
Symbol
Parameter
FCT574CT
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Unit
2
6.5
2
5.2
ns
tPLH
Propagation Delay
CL = 50pF
tPHL
CP to Qx
RL = 500Ω
tPZH
Output Enable Time
1.5
6.5
1.5
5.5
ns
Output Disable Time
1.5
5.5
1.5
5
ns
2
—
2
—
ns
1.5
—
1.5
—
ns
5
—
5
—
ns
tPZL
tPHZ
tPLZ
tSU
Set-up Time, HIGH or LOW
Dx to CP
tH
Hold Time, HIGH or LOW
Dx to CP
tW
CP Pulse Width HIGH or LOW(3)
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY
FCT574T
Symbol
Parameter
Condition(1)
Min.(2)
FCT574AT
FCT574CT
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
2
11
2
7.2
2
6.2
ns
tPLH
Propagation Delay
CL = 50pF
tPHL
CP to Qx
RL = 500Ω
tPZH
Output Enable Time
1.5
14
1.5
7.5
1.5
6.2
ns
Output Disable Time
1.5
8
1.5
6.5
1.5
5.7
ns
2
—
2
—
2
—
ns
1.5
—
1.5
—
1.5
—
ns
7
—
6
—
6
—
ns
tPZL
tPHZ
tPLZ
tSU
Set-up Time, HIGH or LOW
Dx to CP
tH
Hold Time, HIGH or LOW
Dx to CP
tW
CP Pulse Width HIGH or LOW(3)
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This limit is guaranteed but not tested.
5
IDT54/74FCT574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
V CC
SWITCH POSITION
7.0V
500W
V OUT
VIN
Pulse
Generator
D.U.T
.
50pF
RT
500W
Test
Switch
Open Drain
Disable Low
Enable Low
Closed
All Other Tests
Open
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
CL
Octal Link
Test Circuits for All Outputs
DATA
INPUT
tH
tSU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tREM
tSU
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
3V
1.5V
0V
tH
Pulse Width
Octal Link
Octal Link
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
DISABLE
3V
1.5V
0V
CONTROL
INPUT
tPZL
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
SWITCH
CLOSED
tPLZ
3.5V
1.5V
tPZH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
3.5V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
Octal Link
VOH
0V
Octal Link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT54/74FCT574T/AT/CT
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
ORDERING INFORMATION
XXXX
XX
FCT
Device Type
Temp. Range
XX
Package
X
Process
X
X
Blank
8
Tube
Tape and Reel
G
Green
Blank
B
Industrial
MIL-STD-883, Class B
SO
Q
Industrial Options
Small Outline IC (PSG20)
Quarter-size Small Outline Package (PCG20)
D
L
Military Options
CERDIP (CD20)
Leadless Chip Carrier (LC20)
574T
574AT
574CT
Fast CMOS Octal D Register
54
74
−55°C to +125°C
−40°C to +85°C
Datasheet Document History
10/10/2009
11/17/2016
Pg. 7
Pg. 7
Updated the ordering information by removing the "IDT" notation and non RoHS part.
Updated the ordering information by adding detailed package information and Tape & Reel.
7
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