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6116LA70DB

6116LA70DB

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    CDIP24

  • 描述:

    IC SRAM 16KBIT PARALLEL 24CDIP

  • 详情介绍
  • 数据手册
  • 价格&库存
6116LA70DB 数据手册
CMOS Static RAM 16K (2K x 8-Bit) Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 6116SA 6116LA Description High-speed access and chip select times – Commercial: 15/20/25ns (max.) – Industrial: 20/25ns (max.) – Military: 20/25/35/45/55/70/90/120/150ns (max.) Low-power consumption Battery backup operation – 2V data retention voltage (LA version only) Produced with advanced CMOS high-performance technology CMOS process virtually eliminates alpha particle soft-error rates Input and output directly TTL-compatible Static operation: no clocks or refresh required Available in ceramic 24-pin DIP, ceramic and plastic 24-pin Thin Dip and 24-pin SOIC Military product compliant to MIL-STD-833, Class B Industrial temperature range (–40°C to +85°C) is available for selected speeds Green parts available, see ordering information The IDT6116SA/LA is a 16,384-bit high-speed static RAM organized as 2K x 8. It is fabricated using high-performance, high-reliability CMOS technology. Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode. When CS goes HIGH, the circuit will automatically go to, and remain in, a standby power mode, as long as CS remains HIGH. This capability provides significant system level power and cooling savings. The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1µW to 4µW operating off a 2V battery. All inputs and outputs of the IDT6116SA/LA are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. The IDT6116SA/LA is packaged in 24-pin 300mil plastic DIP, 24-pin 600mil and 300mil ceramic DIP, or 24-lead gull-wing SOIC providing high board-level packing densities. Military grade product is manufactured in compliance to MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. Functional Block Diagram A0 V CC 128 X 128 MEMORY ARRAY ADDRESS DECODER GND A10 I/O0 I/O CONTROL INPUT DATA CIRCUIT I/O7 , CS OE WE CONTROL CIRCUIT 3089 drw 01 1 Jul.17.20 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Pin Configurations(1) Capacitance (TA = +25°C, f = 1.0 MHZ) Symbol A7 A6 A5 A4 A3 A2 A1 A0 I/O 0 I/O 1 I/O 2 GND 1 2 3 4 5 6 7 8 9 10 11 12 PTG24 CD24 SD24 PSG24 24 23 22 21 20 19 18 17 16 15 14 13 VCC A8 A9 WE OE A10 CS I/O 7 I/O 6 I/O 5 I/O 4 I/O 3 Pin Description I/O0 - I/O7 Data Input/Output CS Chip Select WE Write Enable OE Output Enable VCC Power GND Ground pF CI/O I/O Capacitance VOUT = 0V 8 pF Rating Com'l. Mil. Unit -0.5 to +7.0 -0.5 to +7.0 V VTERM Terminal Voltage with Respect to GND TA Operating Temperature 0 to +70 -55 to +125 o C TBIAS Temperature Under Bias -55 to +125 -65 to +135 o C TSTG Storage Temperature -55 to +125 -65 to +150 o C PT Power Dissipation 1.0 1.0 W IOUT DC Output Current 50 50 mA 3089 tbl 04 Truth Table(1) CS OE WE I/O Standby H X X High-Z Read L L H DATAOUT Read L H H High-Z Write L X L DATAIN 3089 tbl 02 2 Jul.17.20 8 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VTERM must not exceed VCC +0.5V. 3089 tbl 01 NOTE: 1. H = VIH, L = VIL, X = Don't Care. VIN = 0V Absolute Maximum Ratings(1) NOTE: 1. This text does not indicate orientation of actual part-marking. Mode Input Capacitance (2) Address Inputs Unit CIN Symbol A0 - A10 Max. 3089 tbl 03 DIP/SOIC Top View Description Conditions NOTE: 1. This parameter is determined by device characterization, but is not production tested. 3089 drw 02 Name Parameter(1) 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Recommended Operating Temperature and Supply Voltage Recommended DC Operating Conditions Ambient Temperature GND Vcc Military -55OC to +125OC 0V 5.0V ± 10% Industrial -40OC to +85OC 0V 5.0V ± 10% 0OC to +70OC 0V 5.0V ± 10% Grade Commercial Symbol VCC Supply Voltage GND Ground VIH Input High Voltage VIL 3089 tbl 05 Parameter Min. Typ. 4.5 5.0 0 2.2 (1) Input Low Voltage -0.5 Max. Unit (2) 5.5 V 0 0 V 3.5 VCC +0.5 V ____ 0.8 V NOTES: 1. VIL (min.) = –3.0V for pulse width less than 20ns, once per cycle. 2. VIN must not exceed VCC +0.5V. 3089 tbl 06 DC Electrical Characteristics (VCC = 5.0V ± 10%) IDT6116SA Symbol Parameter Test Conditions IDT6116LA Min. Max. Min. Max. Unit 10 5 ____ 5 2 µA 10 5 ____ 5 2 µA |ILI| Input Leakage Current VCC = Max., VIN = GND to VCC MIL. COM'L & IND ____ |ILO| Output Leakage Current VCC = Max., CS = VIH, VOUT = GND to VCC MIL. COM'L & IND ____ VOL Output Low Voltage IOL = 8mA, VCC = Min. ____ 0.4 ____ 0.4 V VOH Output High Voltage IOH = -4mA, VCC = Min. 2.4 ____ 2.4 ____ V ____ ____ ____ ____ 3089 tbl 07 DC Electrical Characteristics(1) (VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V) 6116SA15 Symbol ICC1 ICC2 ISB ISB1 6116SA25 6116LA25 Power Com'l Only Com'l & Ind Mil Com'l & Ind Mil Unit Operating Power Supply Current CS < VIL, Outputs Open VCC = Max., f = 0 SA 105 105 130 100 90 mA LA _____ 95 120 95 85 Dynamic Operating Current CS < VIL, Outputs Open VCC = Max., f = fMAX(2) SA 150 130 150 120 135 LA _____ 120 140 110 125 Standby Power Supply Current (TTL Level) CS > VIH, Outputs Open VCC = Max., f = fMAX(2) SA 40 40 50 40 45 LA _____ 35 45 35 40 Full Standby Power Supply Current (CMOS Level) CS > VHC, V CC = Max., VIN < VLC or V IN > VHC, f = 0 SA 2 2 10 2 10 LA _____ 0.1 0.9 0.1 0.9 Parameter NOTES: 1. All values are maximum guaranteed values. 2. fMAX = 1/tRC, only address inputs are cycling at fMAX, f = 0 means address inputs are not changing. 6.42 3 Jul.17.20 6116SA20 6116LA20 mA mA mA 3089 tbl 08 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges DC Electrical Characteristics(1) (continued) (VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V) 6116SA35 6116LA35 6116SA45 6116LA45 6116SA55 6116LA55 6116SA70 6116LA70 6116SA90 6116LA90 6116SA120 6116LA120 6116SA150 6116LA150 Symbol Parameter Power Mil Only Mil Only Mil Only Mil Only Mil Only Mil Only Mil Only Unit ICC1 Op e rating Po we r Sup p ly Curre nt, CS < VIL, Outp uts Op e n VCC = Max ., f = 0 SA 90 90 90 90 90 90 90 mA LA 85 85 85 85 85 85 85 Dynamic Op e rating Curre nt, CS < VIL, Outp uts Op e n VCC = Max ., f = fMAX(2) SA 115 100 100 100 100 100 90 LA 105 95 90 90 85 85 85 Stand b y Po we r Sup p ly Curre nt (TTL Le ve l) CS > VIH, Outp uts Op e n VCC = Max ., f = fMAX(2) SA 35 25 25 25 25 25 25 LA 30 20 20 20 25 15 15 SA 10 10 10 10 10 10 10 LA 0.9 0.9 0.9 0.9 0.9 0.9 0.9 ICC2 ISB ISB1 Full Stand b y Po we r Sup p ly Curre nt (CMOS Le ve l), CS > VHC, VCC = Max ., VIN < VLC o r VIN > VHC, f = 0 mA mA mA 3089 tb l 09 NOTES: 1. All values are maximum guaranteed values. 2. fMAX = 1/tRC, only address inputs are toggling at fMAX, f = 0 means address inputs are not changing. Data Retention Characteristics Over All Temperature Ranges (LA Version Only) (VLC = 0.2V, VHC = VCC – 0.2V) Max. VCC @ Typ.(1) VCC @ Symbol Parameter VDR VCC for Data Retention ICCDR Data Retention Current tCDR(3) Chip Deselect to Data Retention Time tR(3) Operation Recovery Time IILII Input Leakage Current Test Condition Min. 2.0V 3.0V 2.0V 3.0V Unit ____ 2.0 ____ ____ ____ ____ V ____ 0.5 0.5 1.5 1.5 200 20 300 30 μA ____ 0 ____ ____ ____ ns tRC(2) ____ ____ ____ ____ ns ____ ____ ____ 2 2 MIL. COM'L. CS > VHC VIN > VHC or < VLC NOTES: 1. TA = + 25°C 2. tRC = Read Cycle Time. 3. This parameter is guaranteed by device characterization, but is not production tested. 4 Jul.17.20 ____ μA 3089 tbl 10 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Low VCC Data Retention Waveform DATA RETENTION MODE VCC VDR ≥ 2V 4.5V 4.5V tCDR tR VDR CS , VIH VIH 3089 drw 03 AC Test Conditions GND to 3.0V Input Pulse Levels Input Rise/Fall Times 5ns Input Timing Reference Levels 1.5V Output Reference Levels 1.5V See Figures 1 and 2 AC Test Load 3089 tbl 11 5V 5V 480Ω 480Ω DATAOUT DATAOUT 255Ω 255Ω 30pF* 5pF* , 3089 drw 05 3089 drw 04 Figure 1. AC Test Load *Including scope and jig. 6.42 5 Jul.17.20 Figure 2. AC Test Load (for tOLZ, tCLZ, tOHZ, tWHZ, tCHZ & tOW) , 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges AC Electrical Characteristics (VCC = 5V ± 10%, All Temperature Ranges) 6116SA15(1) Symbol Parameter M i n. Max. Re ad Cy c le Time 15 Ad d re s s Ac c e s s Time ____ Chip Se le c t Ac c e s s Time ____ 5 6116SA20 6116LA20 6116SA25 6116LA25 6116SA35(2) 6116LA35(2) Min. Max. Unit ____ 35 ____ ns 25 ____ 35 ns 25 ____ 35 ns ____ 5 ____ ns ____ 13 ____ 20 ns ____ 5 ____ 5 ____ ns 11 ____ 12 ____ 15 ns 8 ____ 10 ____ 13 ns 5 ____ 5 ____ ns 0 ____ 0 ____ ns 25 ____ 35 M i n. Max. Min. Max. ____ 20 15 ____ ____ 25 19 ____ 15 ____ 20 ____ ____ ____ 5 ____ 5 ____ 10 ____ 10 Outp ut Enab le to Outp ut in Lo w-Z 0 Chip De s e le c t to Outp ut in Hig h-Z ____ 0 10 ____ Outp ut Dis ab le to Outp ut in Hig h-Z ____ 8 ____ 5 ____ 5 ____ 0 ____ 0 ____ 15 ____ 20 ____ Read Cycle tRC tAA tACS (3) tCLZ tOE Chip Se le c t to Outp ut in Lo w-Z Outp ut Enab le to Outp ut Valid (3) tOLZ (3) tCHZ (3) tOHZ tOH Outp ut Ho ld fro m Ad d re s s Chang e (3) tPU (3) tPD Chip Se le c t to Po we r Up Time ____ Chip De s e le c t to Po we r Do wn Time ns 3089 tb l 12 AC Electrical Characteristics (VCC = 5V ± 10%, All Temperature Ranges) (continued) 6116SA45(2) 6116LA45(2) 6116SA55(2) 6116LA55(2) 6116SA70(2) 6116LA70(2) 6116SA90(2) 6116LA90(2) 6116SA120(2) 6116LA120(2) 6116SA150(2) 6116LA150(2) Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit Re ad Cyc le Time 45 ____ 55 ____ 70 ____ 90 ____ 120 ____ 150 ____ ns Ad d re s s Ac c e s s Time ____ 45 ____ 55 ____ 70 ____ 90 ____ 120 ____ 150 ns Chip Se le c t Ac c e s s Time ____ 45 ____ 50 ____ 65 ____ 90 ____ 120 ____ 150 ns 5 ____ 5 ____ 5 ____ 5 ____ 5 ____ 5 ____ ns ____ 25 ____ 40 ____ 50 ____ 60 ____ 80 ____ 100 ns Symbol Parameter Read Cycle tRC tAA tACS (3) tCLZ Chip Se le c t to Outp ut in Lo w-Z tOE Outp ut Enab le to Outp ut Valid tOLZ(3) Outp ut Enab le to Outp ut in Lo w-Z 5 ____ 5 ____ 5 ____ 5 ____ 5 ____ 5 ____ ns tCHZ(3) Chip De s e le c t to Outp ut in Hig h-Z ____ 20 ____ 30 ____ 35 ____ 40 ____ 40 ____ 40 ns tOHZ(3) Outp ut Dis ab le to Outp ut in Hig h-Z ____ 15 ____ 30 ____ 35 ____ 40 ____ 40 ____ 40 ns tOH Outp ut Ho ld fro m Ad d re s s Chang e 5 ____ 5 ____ 5 ____ 5 ____ 5 ____ 5 ____ ns 3089 tb l 13 NOTES: 1. 0°C to +70°C temperature range only. 2. –55°C to +125°C temperature range only. 3. This parameter guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested. 6 Jul.17.20 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Timing Waveform of Read Cycle No. 1(1,3) tRC ADDRESS tAA tOH OE tOE CS tOLZ (5) tACS tCLZ tCHZ ICC (5) (5) DATA VALID DATAOUT VCC Supply Currents tOHZ (5) tPU ISB , tPD 3089 drw 06 Timing Waveform of Read Cycle No. 2(1,2,4) tRC ADDRESS tAA tOH tOH DATAOUT , DATA VALID PREVIOUS DATA VALID 3089 drw 07 Timing Waveform of Read Cycle No. 3(1,3,4) CS tCLZ (5) tACS tCHZ DATAOUT (5) , DATA VALID 3089 drw 08 NOTES: 1. WE is HIGH for Read cycle. 2. Device is continuously selected, CS is LOW. 3. Address valid prior to or coincident with CS transition LOW. 4. OE is LOW. 5. Transition is measured ±500mV from steady state. 6.42 7 Jul.17.20 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges AC Electrical Characteristics (VCC = 5V ± 10%, All Temperature Ranges) 6116SA15(1) Symbol Parameter 6116SA20 6116LA20 6116SA25 6116LA25 6116SA35(2) 6116LA35(2) M i n. Max. Min. Max. M i n. Max. M i n. Max. Unit 15 ____ 20 ____ 25 ____ 35 ____ ns 13 ____ 15 ____ 17 ____ 25 ____ ns ns Write Cycle tWC tCW Write Cyc le Time Chip Se le c t to End -o f-Write tAW Ad d re s s Valid to End -o f-Write 14 ____ 15 ____ 17 ____ 25 ____ tAS Ad d re s s Se t-up Time 0 ____ 0 ____ 0 ____ 0 ____ ns tWP Write Puls e Wid th 12 ____ 12 ____ 15 ____ 20 ____ ns 0 ____ 0 ____ 0 ____ 0 ____ ns tWR Write Re c o ve ry Time tWHZ(3) Write to Outp ut in Hig h-Z ____ 7 ____ 8 ____ 16 ____ 20 ns tDW Data to Write Time Ove rlap 12 ____ 12 ____ 13 ____ 15 ____ ns tDH(4) Data Ho ld fro m Write Time 0 ____ 0 ____ 0 ____ 0 ____ ns tOW(3,4) Outp ut Ac tive fro m End -o f-Write 0 ____ 0 ____ 0 ____ 0 ____ ns 3089 tb l 14 AC Electrical Characteristics (VCC = 5V ± 10%, All Temperature Ranges)(con't) Symbol Parameter 6116SA45(2) 6116LA45(2) 6116SA55(2) 6116LA55(2) 6116SA70(2) 6116LA70(2) 6116SA90(2) 6116LA90(2) 6116SA120(2) 6116LA120(2) 6116SA150(2) 6116LA150(2) M i n. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit Write Cycle tWC Write Cycle Time 45 ____ 55 ____ 70 ____ 90 ____ 120 ____ 150 ____ ns tCW Chip Se le ct to End -o f-Write 30 ____ 40 ____ 40 ____ 55 ____ 70 ____ 90 ____ ns tAW Ad d re ss Valid to End -o f-Write 30 ____ 45 ____ 65 ____ 80 ____ 105 ____ 120 ____ ns tAS Ad d re ss Se t-up Time 0 ____ 5 ____ 15 ____ 15 ____ 20 ____ 20 ____ ns tWP Write Pulse Wid th 25 ____ 40 ____ 40 ____ 55 ____ 70 ____ 90 ____ ns 0 ____ 5 ____ 5 ____ 5 ____ 5 ____ 10 ____ ns 25 ____ 30 ____ 35 ____ 40 ____ 40 ____ 40 ns 25 ____ 30 ____ 30 ____ 35 ____ 40 ____ ns 5 ____ 5 ____ 5 ____ 10 ____ ns 0 ____ 0 ____ 0 ____ 0 ____ tWR Write Re co ve ry Time tWHZ(3) Write to Outp ut in Hig h-Z ____ tDW Data to Write Time Ove rlap 20 ____ 5 ____ 0 ____ (4) tDH Data Ho ld fro m Write Time 0 ____ tOW(3,4) Outp ut Active fro m End -o f-Write 0 ____ ns 3089 tb l 15 NOTES: 1. 0°C to +70°C temperature range only. 2. –55°C to +125°C temperature range only. 3. This parameter guaranteed with AC Load (Figure 2) by device characterization, but is not production tested. 4. The specification for tDH must be met by the device supplying write data to the RAM under all operation conditions. Although tDH and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW. 8 Jul.17.20 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Timing Waveform of Write Cycle No. 1 (WE Controlled Timing)(1,2,5,7) tWC ADDRESS tAW CS tAS tWP (7) tWR (3) tCHZ (6) WE (6) tWHZ DATAOUT PREVIOUS DATA VALID tOW (4) tDW DATAIN (6) DATA (4) VALID tDH DATA VALID 3089 drw 09 , Timing Waveform of Write Cycle No. 2 (CS Controlled Timing)(1,2,3,5,7) tWC ADDRESS tAW CS tWR (3) tAS tCW WE tDW DATAIN tDH DATA VALID 3089 drw 10 NOTES: 1. WE or CS must be HIGH during all address transitions. 2. A write occurs during the overlap of a LOW CS and a LOW WE. 3. tWR is measured from the earlier of CS or WE going HIGH to the end of the write cycle. 4. During this period, the I/O pins are in the output state and the input signals must not be applied. 5. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high-impedance state. 6. Transition is measured ±500mV from steady state. 7. OE is continuously HIGH. If OE is LOW during a WE controlled write cycle, the write pulse width must be the larger of tWP or (tWHZ + tDW) to allow the I/O drivers to turn off and data to be placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the write pulse is the specified tWP. For a CS controlled write cycle, OE may be LOW with no degradation to tCW. 6.42 9 Jul.17.20 , 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Ordering Information — Military 6116 XX XXX X X Device Type Power Speed Package Process/ Temperature Range X Blank Tube B Military (-55°C to +125°C) Compliant to MIL-STD-883, Class B TD D 300 mil CERDIP (SD24) 600 mil CERDIP (CD24) 20* 25 35 45 55 70 90 120 150 Speed in nanoseconds Standard Power Low Power SA LA 3089 drw 11 Ordering Information — Commercial & Industrial 6116 XX XXX X Device Type Power Speed Package X X X Process/ Temperature Range Blank 8 Tube Tape and Reel Blank I(1) Commercial (0°C to +70°C) Industrial (-40°C to +85°C) G Green TP SO 300 mil Plastic DIP (PTG24) 300 mil Small Outline IC, Gull-Wing Bend (PSG24) 15* 20 25 Speed in nanoseconds SA LA Standard Power Low Power *Available in commercial temperature range and standard power only. NOTE: 1. Contact your local sales office for industrial temp range for other speeds, packages and powers. 10 Jul.17.20 3089 drw 12 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Orderable Part Information Speed (ns) 20 25 35 45 55 70 90 120 150 Pkg. Code Pkg. Type Temp. Grade Speed (ns) 6116LA20SOG PSG24 SOIC C 15 6116LA20SOG8 PSG24 SOIC 6116LA20SOGI PSG24 6116LA20SOGI8 Pkg. Code Pkg. Type Temp. Grade 6116SA15SOG PSG24 SOIC C C 6116SA15SOG8 PSG24 SOIC C SOIC I 6116SA15TPG PTG24 PDIP C PSG24 SOIC I 6116SA20DB CD24 CDIP M 6116LA20TDB SD24 CDIP M 6116SA20SOG PSG24 SOIC C 6116LA20TPG PTG24 PDIP C 6116SA20SOG8 PSG24 SOIC C 6116LA20TPGI PTG24 PDIP I 6116SA20TDB SD24 CDIP M 6116LA25DB CD24 CDIP M 6116SA20TPG PTG24 PDIP C 6116LA25SOG PSG24 SOIC C 6116SA20TPGI PTG24 PDIP I 6116LA25SOG8 PSG24 SOIC C 6116SA25SOG PSG24 SOIC C 6116LA25SOGI PSG24 SOIC I 6116SA25SOG8 PSG24 SOIC C 6116LA25SOGI8 PSG24 SOIC I 6116SA25SOGI PSG24 SOIC I 6116LA25TDB SD24 CDIP M 6116SA25SOGI8 PSG24 SOIC I 6116LA25TPG PTG24 PDIP C 6116SA25TDB SD24 CDIP M 6116LA35DB CD24 CDIP M 6116SA25TPG PTG24 PDIP C 6116LA35TDB SD24 CDIP M 6116SA25TPGI PTG24 PDIP I 6116LA45DB CD24 CDIP M 35 6116SA35TDB SD24 CDIP M 45 6116SA45DB CD24 CDIP M 6116SA45TDB SD24 CDIP M 6116SA55DB CD24 CDIP M 6116SA55TDB SD24 CDIP M 6116SA70DB CD24 CDIP M 6116SA70TDB SD24 CDIP M 6116SA90DB CD24 CDIP M 6116SA90TDB SD24 CDIP M 6116SA120DB CD24 CDIP M 6116SA120TDB SD24 CDIP M 6116SA150DB CD24 CDIP M 6116SA150TDB SD24 CDIP M Orderable Part ID 6116LA45TDB SD24 CDIP M 6116LA55DB CD24 CDIP M 6116LA55TDB SD24 CDIP M 6116LA70DB CD24 CDIP M 6116LA70TDB SD24 CDIP M 6116LA90DB CD24 CDIP M 6116LA90TDB SD24 CDIP M 6116LA120DB CD24 CDIP M 6116LA120TDB SD24 CDIP M 6116LA150DB CD24 CDIP M 6116LA150TDB SD24 CDIP M 20 25 55 70 90 120 150 6.42 11 Jul.17.20 Orderable Part ID 6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and Industrial Temperature Ranges Datasheet Document History 01/07/00 Pg. 1, 3, 4, 10 Pg. 9, 10 Pg. 11 08/09/00 02/01/01 12/30/03 03/31/05 11/15/06 Pg. 3,10 Pg. 10 Pg. 3 Pg.4 04/26/11 Pg.1,2,3,4,6,10 05/01/13 Pg. 1 Pg. 3 07/17/20 Pg. 10 Pg. 1 - 13 Pg. 2 & 10 Pg. 10 Pg. 11 Updated to new format Added Industrial Temperature range offerings Separated ordering information into military, commercial, and industrial temperature range offerings Added Datasheet Document History Not recommended for new designs Removed "Not recommended for new designs" Corrected Industrial temp from -45C to -40C. Added "Restricted hazardous substance device" to ordering information. Changed power limits for commercial and industrial on speed grades 25ns and 35ns. Changed power limits for commercial and industrial on speed grade 45ns. Refer to PCN SR-0602-02. Updated "Restricted hazardous substance device" to "Green". Obsoleted 24-pin SOJ, 24-pin 600 mil and 35ns, 45ns for Industrial & Commercial. Description paragraph 4, package information. Changed text to read "The IDT6116SA/LA is packaged in 24-pin 300mil plastic DIP, 24-pin 600mil and 300mil ceramic DIP, or 24-lead gull-wing SOIC providing high board-level packing densities". Removed IDT in reference to fabrication. Updated DC Elec Chars (VCC = 5.0V ± 10%) table by adding industrial to the Test Conditions. Updated DC Elec Chars (VCC = 5.0V ± 10%, VLC = 0.2V, VHC + VCC - 0.2V) table by removing the LA power for the 15ns speed. Removed footnote "*Available in 300mil packaging only" from the Military ordering information. Rebranded as Renesas datasheet Updated package codes. Updated Ordering Information. Added Orderable Part Information tables. 12 Jul.17.20 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for development of an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. (Rev.1.0 Mar 2020) Corporate Headquarters Contact Information TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan www.renesas.com For further information on a product, technology, the most up-to-date version of a document, or your nearest sales office, please visit: www.renesas.com/contact/ Trademarks Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners. © 2020 Renesas Electronics Corporation. All rights reserved.
6116LA70DB
物料型号:6116SA/LA

器件简介:IDT6116SA/LA是一款16,384位的高速静态随机存取存储器(SRAM),以2K x 8位组织。它使用高性能、高可靠性的CMOS技术制造,访问时间可快至15纳秒。

引脚分配:该芯片有24个引脚,包括地址输入(A0-A10)、数据输入输出(I/O0-I/O7)、芯片选择(CS)、写使能(WE)、输出使能(OE)、电源(Vcc)和地(GND)。

参数特性: - 高速访问和芯片选择时间,商业级为15/20/25纳秒,工业级为20/25纳秒,军用级为20/25/35/45/55/70/90/120/150纳秒。 - 低功耗,具有电池备份操作能力(仅限LA版本),2V数据保持电压。 - CMOS工艺几乎消除了α粒子软错误率。 - 输入和输出直接与TTL兼容。

功能详解:该SRAM是全静态异步电路,不需要时钟或刷新即可操作。当CS引脚变高时,电路会自动进入并保持待机模式,以节省系统级的功耗和散热。

应用信息:该产品符合MIL-STD-833标准B级,适用于军事温度应用,要求最高水平的性能和可靠性。工业温度范围(-40°C至+85°C)的选定速度也可用于工业应用。

封装信息:IDT6116SA/LA采用24引脚300mil塑料DIP、24引脚600mil和300mil陶瓷DIP或24引脚鸥翼SOIC封装,提供高板级封装密度。
6116LA70DB 价格&库存

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