DATASHEET
ICS672-01/02
QUADRACLOCK QUADRATURE DELAY BUFFER
Description
Features
The ICS672-01/02 are zero delay buffers that generate four
output clocks whose phases are spaced at 90° intervals.
Based on IDT’s proprietary low jitter Phase-Locked Loop
(PLL) techniques, each device provides five low-skew
outputs, with clock rates up to 84 MHz for the ICS672-01
and up to 135 MHz for the ICS672-02. By providing outputs
delayed one quarter clock cycle, the device is useful for
systems requiring early or late clocks. The ICS672-01/02
include multiplier selections of x0.5, x1, x2, x3, x4, x5, or x6.
They also offer a mode to power-down all internal circuitry
and tri-state the outputs. In normal operation, output clock
FBCLK is tied to the FBIN pin.
• Packaged in 16-pin SOIC
• Pb (lead) free package, RoHS compliant
• Input clock range from 5 MHz to 150 MHz (depends on
multiplier)
• Clock outputs from up to 84 MHz (ICS672-01) and up to
135 MHz (ICS672-02)
• Zero input-output delay
• Integrated x0.5, x1, x2, x3, x4, x5, or x6 selections
• Four accurate ( 60 MHz.
Note 5: Rising edge of ICLK compared with rising edge of CLk0, with FBCLK connected to FBIN, 15 pF load on
CLK0, and CLK0 > 60 MHz.
Note 6: Commercial grade.
Note 7: Industrial grade.
Thermal Characteristics
Parameter
Symbol
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
Conditions
Typ.
Max. Units
θJA
Still air
120
° C/W
θJA
1 m/s air flow
115
° C/W
θJA
3 m/s air flow
105
° C/W
58
° C/W
θJC
IDT™ / ICS™ QUADRACLOCK QUADRATURE DELAY BUFFER
Min.
5
ICS672-01/02
REV L 051310
ICS672-01/02
QUADRACLOCK QUADRATURE DELAY BUFFER
ZERO DELAY BUFFER
Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
16
Symbol
E
Min
A
A1
B
C
D
E
e
H
h
L
α
H
INDEX
AREA
1 2
D
A
Inches
Max
Min
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
9.80
10.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0°
8°
Max
.0532
.0688
.0040
.0098
.013
.020
.0075
.0098
.3859
.3937
.1497
.1574
0.050 BASIC
.2284
.2440
.010
.020
.016
.050
0°
8°
h x 45
A1
C
-Ce
SEATING
PLANE
B
L
.10 (.004)
C
Ordering Information
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
672M-01LF
672M-01LFT
672M-02LF
672M-02LFT
672M-02ILF
672M-02ILFT
ICS672M-01LF
ICS672M-01LF
ICS672M-02LF
ICS672M-02LF
672M-02ILF
672M-02ILF
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
0 to +70° C
0 to +70° C
0 to +70° C
0 to +70° C
-40 to +85° C
-40 to +85° C
“LF” denotes Pb (lead) free package.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes
no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
IDT™ / ICS™ QUADRACLOCK QUADRATURE DELAY BUFFER
6
ICS672-01/02
REV L 051310
ICS672-01/02
QUADRACLOCK QUADRATURE DELAY BUFFER
ZERO DELAY BUFFER
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