72403L15P

CMOS PARALLEL FIFO 64 x 4 FEATURES: • • • • • • • • • • • • • • • • IDT72401 IDT72403 OBSOLETE PARTS has an Output Enable (OE) pin. The FlFOs accept 4-bit data at the data input (D0-D3). The stored data stack up on a first-in/first-out basis. A Shift Out (SO) signal causes the data at the next to last word to be shifted to the output while all other data shifts down one location in the stack. The Input Ready (IR) signal acts like a flag to indicate when the input is ready for new data (IR = HIGH) or to signal when the FIFO is full (IR = LOW). The IR signal can also be used to cascade multiple devices together. The Output Ready (OR) signal is a flag to indicate that the output remains valid data (OR = HIGH) or to indicate that the FIFO is empty (OR = LOW). The OR can also be used to cascade multiple devices together. Width expansion is accomplished by logically ANDing the IR and OR signals to form composite signals. Depth expansion is accomplished by tying the data inputs of one device to the data outputs of the previous device. The IR pin of the receiving device is connected to the SO pin of the sending device and the OR pin of the sending device is connected to the Shift In (SI) pin of the receiving device. Reading and writing operations are completely asynchronous allowing the FIFO to be used as a buffer between two digital machines of widely varying operating frequencies. The 45MHz speed makes these FlFOs ideal for highspeed communication and controller applications. Military grade product is manufactured in compliance with the of MIL-STD883, Class B. First-ln/First-Out Dual-Port memory 64 x 4 organization (IDT72401/72403) RAM-based FIFO with low falI-through time Low-power consumption — Active: 175mW (typ.) Maximum shift rate — 45MHz High data output drive capability Asynchronous and simultaneous read and write Fully expandable by bit width Fully expandable by word depth IDT72403 have Output Enable pin to enable output data High-speed data communications applications High-performance CMOS technology Available in CERDIP, plastic DIP and SOIC Military product compliant to MlL-STD-883, Class B Standard Military Drawing #5962-86846 and 5962-89523 is listed on this function. Green parts available, see ordering information R S T O F R A P ED E D T S N E E N L G M I O M S S E O B D O EC R EW T N O N DESCRIPTION: The IDT72401 and IDT72403 are asynchronous high-performance First-ln/First-Out memories organized 64 words by 4 bits. The IDT72403 also FUNCTIONAL BLOCK DIAGRAM SI IR INPUT CONTROL LOGIC D0-3 DATA IN MR MASTER RESET WRITE POINTER WRITE MULTIPLEXER OUTPUT ENABLE OE (IDT72403 only) MEMORY ARRAY DATA IN Q0-3 READ MULTIPLEXER READ POINTER MASTER RESET SO OR 2747 drw01 IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. FAST is a trademark of National Semiconductor, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES JUNE 2012 1 DSC-2747/13 IDT72401/72403 CMOS PARALLEL FIFO 64 x 4, 64 x 5 MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS IDT72401/IDT72403 NC/OE(1) IR SI D0 D1 D2 D3 GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 9 8 Vcc SO OR Q0 Q1 Q2 Q3 MR 2747 drw 02 PLASTIC DIP (P16-1, ORDER CODE: P) CERDIP (D16-1, ORDER CODE: D) SOIC (SO16-1, ORDER CODE: SO) TOP VIEW NOTE: 1. Pin 1: NC - No Connection IDT72401, OE - IDT72403 RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS(1) Symbol Parameter Min. Typ. Max. Unit 4.5 5.0 5.5 V Symbol Rating Commercial Military Unit VCC VTERM Terminal Voltage with Respect to GND Storage Temp. DC Output Current –0.5 to +7.0 –0.5 to +7.0 V GND Supply Voltage 0 0 0 V VIH Input High Voltage 2.0 — — V VIL(1) Input High Voltage — — 0.8 V TA TA Operating Temperature Commercial Operating Temperature Military 0 –55 — — 70 125 °C °C TSTG IOUT –55 to +125 –50 to +50 –65 to +150 –50 to +50 °C mA NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Supply Voltage Commercial/Military NOTE: 1. 1.5V undershoots are allowed for 10ns once per cycle. DC ELECTRICAL CHARACTERISTICS (Commercial: VCC = 5.0V ± 10%, TA = 0°C to +70°C; Military: VCC = 5.0V ± 10%, TA = –55°C to +125°C) IDT72401 IDT72403 Commercial fIN = 45, 35, 25, 15, 10 MHz Symbol IIL IIH VOL VOH IOS(1) IHZ(2) ILZ(2) ICC(3,4) Parameter Low-Level Input Current High-Level Input Current Low-Level Output Voltage High-Level Output Voltage Output Short-Circuit Current HIGH Impedance Output Current LOW Impedance Output Current Active Supply Current Test Conditions VCC = Max., GND ≤ VI ≤ VCC VCC= Max., GND ≤ VI ≤ VCC VCC= Min., IOL = 8mA VCC= Min., IOH = –4mA VCC= Max., VO = GND VCC= Max., VO = 2.4V VCC= Max., VO = 0.4V VCC= Max., f = 10MHz Min. –10 — — 2.4 –20 — –20 — Max. — 10 0.4 — –110 20 — 35 IDT72401 IDT72403(5) Military fIN = 35, 25, 15, 10 MHz Min. –10 — — 2.4 –20 — –20 — NOTES: 1. Not more than one output should be shorted at a time and duration of the short-circuit should not exceed one second. Guaranteed but not tested. 2. IDT72403 only. 3. Tested with outputs open (IOUT = 0). OE is HIGH for IDT72403. 4. For frequencies greater than 10MHz, ICC = 35mA + (1.5mA x [f –10MHz]) commercial, and ICC = 45mA + (1.5mA x [f –10MHz]) military. 5. Military availability for IDT72403 is 10MHz, 35MHz. IDT72401 is available for all MHz. 2 Max. — 10 0.4 — –110 20 — 45 Unit µA µA V V mA µA µA mA IDT72401/72403 CMOS PARALLEL FIFO 64 x 4, 64 x 5 MILITARY AND COMMERCIAL TEMPERATURE RANGES OPERATING CONDITIONS (Commercial: VCC = 5.0V ± 10%, TA = 0°C to +70°C; Military: VCC = 5.0V ± 10%, TA = –55°C to +125°C) Symbol t SIH (1) tSIL tIDS tIDH t SOH (1) t SOL tMRW tMRS tSIR tHIR t SOR (4) Parameter Shift in HIGH Time Shift in LOW TIme Input Data Set-up Input Data Hold Time Shift Out HIGH Time Shift Out LOW Time Master Reset Pulse Master Reset Pulse to SI Data Set-up to IR Data Hold from IR Data Set-up to OR HIGH Figure 2 2 2 2 5 5 8 8 4 4 7 Commercial IDT72401L45 IDT72403L45 Min. Max. 9 — 11 — 0 — 13 — 9 — 11 — 20 — 10 — 3 — 13 — 0 — IDT72401L35 IDT72403L35 Min. Max. 9 — 17 — 0 — 15 — 9 — 17 — 25 — 10 — 3 — 15 — 0 — Commercial and Military(5) IDT72401L25 IDT72401L15 IDT72403L25 IDT72403L15 Min. Max. Min. Max. 11 — 11 — 24 — 25 — 0 — 0 — 20 — 30 — 11 — 11 — 24 — 25 — 25 — 25 — 10 — 25 — 5 — 5 — 20 — 30 — 0 — 0 — IDT72401L10 IDT72403L10 Min. Max. 11 — 30 — 0 — 40 — 11 — 25 — 30 — 35 — 5 — 30 — 0 — Unit ns ns ns ns ns ns ns ns ns ns ns IDT72401L10 IDT72403L10 Min. Max. Unit AC ELECTRICAL CHARACTERISTICS (Commercial: VCC = 5.0V ± 10%, TA = 0°C to +70°C; Military: VCC = 5.0V ± 10%, TA = –55°C to +125°C) Symbol fIN t IRL (1) t IRH (1) f OUT t ORL Parameter Figure Commercial IDT72401L45 IDT72403L45 Min. Max. IDT72401L35 IDT72403L35 Min. Max. Commercial and Military(5) IDT72401L25 IDT72401L15 IDT72403L25 IDT72403L15 Min. Max. Min. Max. Shift In Rate 2 — 45 — 35 — 25 — 15 — 10 MHz Shift In to Input Ready LOW 2 — 18 — 18 — 21 — 35 — 40 ns Shift In to Input Ready HIGH 2 — 18 — 20 — 28 — 40 — 45 ns Shift Out Rate 5 — 45 — 35 — 25 — 15 — 10 MHz Shift Out to Output Ready LOW 5 — 18 — 18 — 19 — 35 — 40 ns t ORH (1) Shift Out to Output Ready HIGH 5 — 19 — 20 — 34 — 40 — 55 ns tODH Output Data Hold (Previous Word) 5 5 — 5 — 5 — 5 — 5 — ns tODS Output Data Shift (Next Word) 5 — 19 — 20 — 34 — 40 — 55 ns t PT Data Throughput or "Fall-Through" 4, 7 — 30 — 34 — 40 — 65 — 65 ns tMRORL Master Reset to OR LOW 8 — 25 — 28 — 35 — 35 — 40 ns tMRIRH Master Reset to IR HIGH 8 — 25 — 28 — 35 — 35 — 40 ns tMRQ Master Reset to Data Output LOW 8 — 20 — 20 — 25 — 35 — 40 ns Output Valid from OE LOW 9 — 12 — 15 — 20 — 30 — 35 ns Output High-Z from OE HIGH 9 — 12 — 12 — 15 — 25 — 30 ns t IPH (2,4) Input Ready Pulse HIGH 4 9 — 9 — 11 — 11 — 11 — ns t OPH (2,4) Output Ready Pulse HIGH 7 9 — 9 — 11 — 11 — 11 — ns (1) t OOE (3) t HZOE (3,4) NOTES: 1. Since the FIFO is a very high-speed device, care must be excercised in the design of the hardware and timing utilized within the design. Device grounding and decoupling are crucial to correct operation as the FIFO will respond to very small glitches due to long reflective lines, high capacitances and/or poor supply decoupling and grounding. A monolithic ceramic capacitor of 0.1µF directly between VCC and GND with very short lead length is recommended. 2. This parameter applies to FIFOs communicating with each other in a cascaded mode. IDT FIFOs are guaranteed to cascade with other IDT FIFOs of like speed grades. 3. IDT72403 only. 4. Guaranteed by design but not currently tested. 5. Military availability for IDT72403 is 10MHz, 35MHz. IDT72401 is available for all MHz. 3 IDT72401/72403 CMOS PARALLEL FIFO 64 x 4, 64 x 5 MILITARY AND COMMERCIAL TEMPERATURE RANGES ALL INPUT PULSES: AC TEST CONDITIONS Input Pulse Levels GND to 3.0V Input Rise/Fall Times 3ns Input Timing Reference Levels 1.5V Output Reference Levels 1.5V Output Load 3.0V 90% 90% 10% GND 10% 72401only Commercial and Military L Low Power 72401 72403 64 x 4 FIFO 64 x 4 FIFO Shift Frequency (fs) Speed in MHz 2747 drw 16 NOTES: 1. Industrial temperature range is available by special order. 2. Green parts are available, for specific speeds and packages contact your sales office. 3. For “P”, Plastic Dip, when ordering green package, the suffix is “PDG”. DATASHEET DOCUMENT HISTORY 07/10/2003 10/27/2005 04/25/2008 02/11/2009 06/29/2012 09/05/2014 08/22/2019 pgs. 2, 3, and 9. pgs. 1- 9. pgs. 1- 9. pg. 9. pgs. 1 and 9. PDN# CQ-14-06R1 issued. See IDT.com for PDN specifics. Datasheet changed to Obsolete Status. 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