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74ALVC16245PAG8

74ALVC16245PAG8

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    TSSOP48

  • 描述:

    IC TXRX NON-INVERT 3.6V 48TSSOP

  • 数据手册
  • 价格&库存
74ALVC16245PAG8 数据手册
IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS IDT74ALVC16245 FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V μ W typ. static) • CMOS power levels (0.4μ • Rail-to-Rail output swing for increased noise margin • Available in TSSOP package This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVC16245 is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The ALVC16245 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. DRIVE FEATURES: APPLICATIONS: • High Output Drivers: ±24mA • Suitable for heavy loads • 3.3V high speed systems • 3.3V and lower voltage computing systems FUNCTIONAL BLOCK DIAGRAM 1DIR 1 2DIR 48 1A1 1 A2 2A1 2A2 2A3 5 1A4 2A4 6 1A5 1A6 1A7 1A8 2A6 2B3 2A7 2A8 1 B8 19 2B5 20 2B6 22 2B7 23 2B8 27 1B7 37 2B4 29 1B6 38 12 16 30 1B5 40 11 2B2 17 2A5 9 14 32 1B4 41 8 2B1 33 1B3 43 13 35 1B2 44 2OE 36 1B1 46 3 1A3 25 1OE 47 2 24 26 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE JUNE 2009 1 © 2009 Integrated Device Technology, Inc. DSC-4604/6 IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION 1DIR 1 48 1OE 1B1 2 47 1A1 1B2 3 46 1A2 GND 4 45 GND 1B3 5 44 1A3 1B4 6 VCC 43 1A4 7 42 VCC 1B5 8 41 1A5 1B6 9 40 1A6 GND 10 39 GND 1B7 11 38 1A7 1B8 12 37 1A8 2B1 13 36 2A1 2B2 14 35 2A2 Symbol Description VTERM(2) Max Unit VTERM(3) Terminal Voltage with Respect to GND –0.5 to +4.6 V Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –50 to +50 mA IIK Continuous Clamp Current, VI < 0 or VI > VCC ±50 mA IOK Continuous Clamp Current, VO < 0 –50 mA ICC ISS Continuous Current through each VCC or GND ±100 mA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC. CAPACITANCE (TA = +25°C, F = 1.0MHz) Parameter(1) Symbol Conditions Typ. Input Capacitance VIN = 0V 5 7 pF COUT Output Capacitance VOUT = 0V 7 9 pF COUT I/O Port Capacitance VIN = 0V 7 9 pF 15 34 GND 2B3 16 33 2A3 2B4 17 32 2A4 VCC 18 31 VCC 2B5 19 30 2A5 2B6 20 29 2A6 GND 21 28 GND xOE Output Enable Inputs (Active LOW) 2B7 22 27 2A7 xDIR Direction Control Inputs 2B8 23 26 2A8 xAx Side A Inputs or 3-State Outputs xBx Side B Inputs or 3-State Outputs 24 25 NOTE: 1. As applicable to the device type. PIN DESCRIPTION Pin Names 2OE Description FUNCTION TABLE (EACH 8-BIT SECTION)(1) TSSOP TOP VIEW Inputs xOE xDIR L L Bus B Data to Bus A L H Bus A Data to Bus B H X Z NOTE: 1. H = HIGH Voltage Level X = Don’t Care L = LOW Voltage Level Z = High-Impedance 2 Unit CIN GND 2DIR Max. Outputs IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = –40°C to +85°C Symbol VIH VIL Min. Typ.(1) Max. Unit VCC = 2.3V to 2.7V 1.7 — — V VCC = 2.7V to 3.6V 2 — — VCC = 2.3V to 2.7V — — 0.7 VCC = 2.7V to 3.6V — — 0.8 Parameter Input HIGH Voltage Level Input LOW Voltage Level Test Conditions V IIH Input HIGH Current VCC = 3.6V VI = VCC — — ±5 µA IIL Input LOW Current VCC = 3.6V VI = GND — — ±5 µA IOZH High Impedance Output Current VCC = 3.6V VO = VCC — — ±10 µA IOZL (3-State Output pins) VO = GND — — ±10 VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V VH ICCL ICCH ICCZ ΔICC Input Hysteresis Quiescent Power Supply Current VCC = 3.3V VCC = 3.6V VIN = GND or VCC — — 100 0.1 — 40 mV µA Quiescent Power Supply Current Variation One input at VCC - 0.6V, other inputs at VCC or GND — — 750 µA NOTE: 1. Typical values are at VCC = 3.3V, +25°C ambient. OUTPUT DRIVE CHARACTERISTICS Symbol VOH VOL Test Conditions(1) Parameter Output HIGH Voltage Output LOW Voltage VCC = 2.3V to 3.6V IOH = – 0.1mA VCC = 2.3V IOH = – 6mA VCC = 2.3V IOH = – 12mA Min. Max. Unit VCC – 0.2 — V 2 — 1.7 — VCC = 2.7V 2.2 — VCC = 3V 2.4 — VCC = 3V IOH = – 24mA 2 — VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 VCC = 2.3V IOL = 6mA — 0.4 IOL = 12mA — 0.7 VCC = 2.7V IOL = 12mA — 0.4 VCC = 3V IOL = 24mA — 0.55 V NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = – 40°C to + 85°C. 3 IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE OPERATING CHARACTERISTICS, TA = 25°C Symbol Parameter CPD Power Dissipation Capacitance Outputs enabled CPD Power Dissipation Capacitance Outputs disabled VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V Test Conditions Typical Typical Unit CL = 0pF, f = 10Mhz 22 29 pF 4 5 SWITCHING CHARACTERISTICS(1) VCC = 2.5V ± 0.2V Symbol Parameter tPLH Propagation Delay tPHL xAx to xBx or xBx to xAx tPZH Output Enable Time tPZL xOE to xAx or xBx tPHZ Output Disable Time tPLZ xOE to xAx or xBx tSK(o) Output Skew(2) VCC = 3.3V ± 0.3V Max. Min. Max. Min. Max. Unit 1 3.7 — 3.6 1 3 ns 1 5.7 — 5.4 1 4.4 ns 1 5.2 — 4.6 1 4.1 ns — — — — — 500 ps NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C. 2. Skew between any two outputs of the same package and switching in the same direction. 4 VCC = 2.7V Min. IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS VCC(1)= 3.3V±0.3V VCC(1)= 2.7V Symbol VIH VT 0V VOH VT VOL SAME PHASE INPUT TRANSITION VCC(2)= 2.5V±0.2V Unit VLOAD 6 6 2 x Vcc V VIH 2.7 2.7 Vcc V VT 1.5 1.5 Vcc / 2 V VLZ 300 300 150 mV VHZ 300 300 150 mV CL 50 50 30 pF tPLH tPHL tPLH tPHL OUTPUT VIH VT 0V OPPOSITE PHASE INPUT TRANSITION ALVC Link Propagation Delay VLOAD VCC Open (1, 2) Pulse Generator VIN DISABLE ENABLE GND 500Ω CONTROL INPUT VOUT D.U.T. tPZL VLOAD/2 OUTPUT SWITCH VT NORMALLY CLOSED LOW tPHZ tPZH OUTPUT SWITCH NORMALLY VT OPEN HIGH 0V 500Ω RT tPLZ CL ALVC Link Test Circuit for All Outputs DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. VIH VT 0V VLOAD/2 VOL + VLZ VOL VOH VOH - VHZ 0V ALVC Link Enable and Disable Times NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. NOTES: 1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns. DATA INPUT SWITCH POSITION Test Switch TIMING INPUT Open Drain Disable Low Enable Low VLOAD ASYNCHRONOUS CONTROL Disable High Enable High GND SYNCHRONOUS CONTROL All Other Tests Open tSU VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V tH tREM tSU tH ALVC Link INPUT OUTPUT 1 tPLH1 VIH VT 0V tPHL1 tSK (x) tSK (x) OUTPUT 2 tPLH2 Set-up, Hold, and Release Times VOH VT VOL LOW-HIGH-LOW PULSE VOH VT VOL HIGH-LOW-HIGH PULSE tW tPHL2 VT ALVC Link Pulse Width tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1 Output Skew - tSK(X) VT ALVC Link NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. 5 IDT74ALVC16245 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION XX ALVC X Bus-Hold Temp. Range XX Family XX XXX Device Type Package CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 PA Thin Shrink Small Outline Package - Green 245 16-Bit Bus Transceiver with 3-State Outputs 16 Double-Density, ±24mA Blank No Bus-Hold 74 –40°C to +85°C for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 6 for Tech Support: logichelp@idt.com IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for development of an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. (Rev.1.0 Mar 2020) Corporate Headquarters Contact Information TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan www.renesas.com For further information on a product, technology, the most up-to-date version of a document, or your nearest sales office, please visit: www.renesas.com/contact/ Trademarks Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners. © 2020 Renesas Electronics Corporation. All rights reserved.
74ALVC16245PAG8 价格&库存

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74ALVC16245PAG8
  •  国内价格 香港价格
  • 1+24.873881+3.00005
  • 10+22.3211110+2.69216
  • 25+21.1045025+2.54543
  • 100+18.28962100+2.20592
  • 250+17.35140250+2.09276
  • 500+15.56930500+1.87782
  • 1000+13.130701000+1.58370

库存:4008

74ALVC16245PAG8
  •  国内价格 香港价格
  • 2000+12.474152000+1.50452
  • 6000+12.005216000+1.44796

库存:4008