74ALVCHR162245PAG8

IDT74ALVCHR162245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS AND BUS-HOLD IDT74ALVCHR162245 DESCRIPTION: FEATURES: This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVCHR162245 device is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The ALVCHR162245 has series resistors in the device output structure which will significantly reduce line noise when used with light loads. This driver has been designed to drive ±12mA at the designated threshold levels. The ALVCHR162245 has “bus-hold” which retains the inputs’ last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V μ W typ. static) • CMOS power levels (0.4μ • Rail-to-Rail output swing for increased noise margin • Available in TSSOP package DRIVE FEATURES: • Balanced Output Drivers: ±12mA • Low Switching Noise APPLICATIONS: • 3.3V high speed systems • 3.3V and lower voltage computing systems FUNCTIONAL BLOCK DIAGRAM 1DIR 1 2DIR 24 48 1A1 1OE 47 2A1 1A2 2A2 3 1A3 2A3 5 1A4 2A4 6 1A5 1A6 1A7 16 2B3 2A6 19 2B5 20 2B6 22 2B7 23 2B8 29 1B6 38 2B4 30 1B5 40 2A7 27 11 1A8 2B2 17 2A5 9 14 32 1B4 41 8 2B1 33 1B3 43 13 35 1B2 44 2OE 36 2 1B1 46 25 1B7 37 2A8 12 1B8 26 IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE SEPTEMBER 2016 1 © 2016 Integrated Device Technology, Inc. DSC-4606/6 IDT74ALVCHR162245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION Symbol Description Max Unit VTERM(2) Terminal Voltage with Respect to GND –0.5 to +4.6 V 1DIR 1 48 1OE VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 1B1 2 47 1A1 TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –50 to +50 mA IIK Continuous Clamp Current, VI < 0 or VI > VCC ±50 mA IOK Continuous Clamp Current, VO < 0 –50 mA ICC ISS Continuous Current through each VCC or GND ±100 mA 1B2 3 46 1A2 GND 4 45 GND 1B3 5 44 1A3 1B4 6 43 1A4 VCC 7 42 VCC 1B5 8 41 1A5 1B6 9 40 1A6 GND 10 39 GND 1B7 11 38 1A7 1B8 12 37 1A8 2B1 13 36 2A1 2B2 14 35 2A2 GND 15 34 GND 2B3 16 33 2A3 2B4 17 32 2A4 VCC 18 31 VCC 2B5 19 30 2A5 2B6 20 29 2A6 GND 21 28 GND 2B7 22 27 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC. CAPACITANCE (TA = +25°C, F = 1.0MHz) Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 5 7 pF COUT Output Capacitance VOUT = 0V 7 9 pF CI/O I/O Port Capacitance VIN = 0V 7 9 pF Symbol NOTE: 1. As applicable to the device type. PIN DESCRIPTION Pin Names Description xOE Output Enable Inputs (Active LOW) DIR Direction Control Inputs 2A7 xAx(1) Side A Inputs or 3-State Outputs xBx(1) Side B Inputs or 3-State Outputs 2B8 23 26 2A8 2DIR 24 25 2OE V NOTE: 1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os. TSSOP TOP VIEW FUNCTION TABLE (EACH 8-BIT SECTION)(1) Inputs xOE xDIR L L Bus B data to A bus L H Bus A data to B bus H X High Z State NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High-Impedance 2 Outputs IDT74ALVCHR162245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = –40°C to +85°C Symbol VIH VIL Min. Typ.(1) Max. Unit VCC = 2.3V to 2.7V 1.7 — — V VCC = 2.7V to 3.6V 2 — — VCC = 2.3V to 2.7V — — 0.7 VCC = 2.7V to 3.6V — — 0.8 Parameter Input HIGH Voltage Level Input LOW Voltage Level Test Conditions V IIH Input HIGH Current VCC = 3.6V VI = VCC — — ±5 μA IIL Input LOW Current VCC = 3.6V VI = GND — — ±5 μA IOZH High Impedance Output Current VCC = 3.6V VO = VCC — — ±10 μA IOZL (3-State Output pins) VO = GND — — ±10 VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V Input Hysteresis Quiescent Power Supply Current VCC = 3.3V VCC = 3.6V VIN = GND or VCC — — 100 0.1 — 40 mV μA Quiescent Power Supply Current Variation One input at VCC - 0.6V, other inputs at VCC or GND — — 750 μA Min. Typ.(2) Max. Unit – 75 — — μA VI = 0.8V 75 — — VH ICCL ICCH ICCZ ΔICC NOTE: 1. Typical values are at VCC = 3.3V, +25°C ambient. BUS-HOLD CHARACTERISTICS Symbol IBHH Parameter(1) Bus-Hold Input Sustain Current Test Conditions VCC = 3V VI = 2V IBHL IBHH Bus-Hold Input Sustain Current VCC = 2.3V IBHL IBHHO Bus-Hold Input Overdrive Current VCC = 3.6V IBHLO NOTES: 1. Pins with Bus-Hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3 VI = 1.7V – 45 — — VI = 0.7V 45 — — VI = 0 to 3.6V — — ±500 μA μA IDT74ALVCHR162245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE OUTPUT DRIVE CHARACTERISTICS Symbol VOH Test Conditions(1) Parameter Output HIGH Voltage Unit V IOH = – 0.1mA VCC – 0.2 — VCC = 2.3V IOH = – 4mA 1.9 — IOH = – 6mA 1.7 — IOH = – 4mA 2.2 — IOH = – 8mA 2 — IOH = – 6mA 2.4 — IOH = – 12mA 2 — VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 VCC = 2.3V IOL = 4mA — 0.4 IOL = 6mA — 0.55 IOL = 4mA — 0.4 IOL = 8mA — 0.6 IOL = 6mA — 0.55 IOL = 12mA — 0.8 VCC = 3V Output LOW Voltage Max. VCC = 2.3V to 3.6V VCC = 2.7V VOL Min. VCC = 2.7V VCC = 3V V NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = – 40°C to + 85°C. OPERATING CHARACTERISTICS, TA = 25°C Symbol Parameter CPD Power Dissipation Capacitance Outputs enabled CPD Power Dissipation Capacitance Outputs disabled VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V Test Conditions Typical Typical Unit CL = 0pF, f = 10Mhz 24 32 pF 4 5 SWITCHING CHARACTERISTICS(1) VCC = 2.5V ± 0.2V Symbol Parameter tPLH Propagation Delay tPHL xAx to xBx or xBx to xAx tPZH Output Enable Time tPZL xOE to xAx or xBx tPHZ Output Disable Time tPLZ xOE to xAx or xBx tSK(o) Output Skew(2) VCC = 2.7V VCC = 3.3V ± 0.3V Min. Max. Min. Max. Min. Max. Unit 1 4.9 — 4.7 1 4.2 ns 1 6.8 — 6.7 1 5.6 ns 1 6.3 — 5.7 1 5.5 ns — — — — — 500 ps NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C. 2. Skew between any two outputs of the same package and switching in the same direction. 4 IDT74ALVCHR162245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS VCC(1)= 3.3V±0.3V VCC(1)= 2.7V Symbol VCC(2)= 2.5V±0.2V Unit VLOAD 6 6 2 x Vcc V VIH 2.7 2.7 Vcc V VT 1.5 1.5 Vcc / 2 V VLZ 300 300 150 mV VHZ 300 300 150 mV CL 50 50 30 pF 500Ω (1, 2) VIH VT 0V ALVC Link DISABLE ENABLE GND tPZL tPLZ VLOAD/2 OUTPUT SWITCH VT NORMALLY CLOSED LOW tPHZ tPZH OUTPUT SWITCH NORMALLY VT OPEN HIGH 0V 500Ω CL ALVC Link Test Circuit for All Outputs tPHL CONTROL INPUT D.U.T. RT tPLH Propagation Delay VOUT Pulse Generator tPHL OPPOSITE PHASE INPUT TRANSITION Open VIN tPLH OUTPUT VLOAD VCC VIH VT 0V VOH VT VOL SAME PHASE INPUT TRANSITION VIH VT 0V VLOAD/2 VLZ VOL VOH VHZ 0V ALVC Link Enable and Disable Times DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. NOTES: 1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns. DATA INPUT SWITCH POSITION Test VLOAD ASYNCHRONOUS CONTROL Disable High Enable High GND SYNCHRONOUS CONTROL All Other Tests Open INPUT OUTPUT 1 tPLH1 tSU tH Set-up, Hold, and Release Times VIH VT 0V VOH VT VOL tSK (x) LOW-HIGH-LOW PULSE OUTPUT 2 VT tW VOH VT VOL tPLH2 tREM ALVC Link tPHL1 tSK (x) tH TIMING INPUT Switch Open Drain Disable Low Enable Low tSU VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V HIGH-LOW-HIGH PULSE VT ALVC Link tPHL2 Pulse Width tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1 ALVC Link Output Skew - tSK(X) NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. 5 IDT74ALVCHR162245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION XX ALVC X Bus-Hold Temp. Range XX Family XXX XX Device Type Package X Blank 8 Tube Tape and Reel PAG Thin Shrink Small Outline Package - Green 245 16-Bit Bus Transceiver with 3-State Outputs R162 Double-Density with Resistors, ±12mA H Bus-Hold 74 -40°C to +85°C Datasheet Document History 09/19/2016 Pg. 6 Updated the ordering information by adding Tape and Reel. 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