74FCT162827CTPAG8

IDT74FCT162827AT/CT FAST CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE FAST CMOS 20-BIT BUFFER IDT74FCT162827AT/CT FEATURES: DESCRIPTION: • • • • • The FCT162827T 20-bit buffers are built using advanced dual metal CMOS technology. These 20-bit bus drivers provide high-performance bus interface buffering for wide data/address paths or buses carrying parity. Two pair of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10-bit buffers or one 20-bit buffer. Flowthrough organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT162827T has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors. The FCT162827T is a plug-in replacement for the FCT16827T and ABT16827 for on-board interface applications. • • • • • 0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage ≤1µA (max.) ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) VCC = 5V ±10% Balanced Output Drivers (±24mA) Reduced system switching noise Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25°C Available in SSOP and TSSOP packages FUNCTIONAL BLOCK DIAGRAM 1 1OE1 2OE1 56 1OE2 1A1 28 29 2OE2 2 55 42 1Y1 15 2A1 TO NINE OTHER CHANNELS 2Y1 TO NINE OTHER CHANNELS The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE SEPTEMBER 2009 1 © 2009 Integrated Device Technology, Inc. DSC-5440/7 IDT74FCT162827AT/CT FAST CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) PIN CONFIGURATION 1OE1 1 56 1OE2 1Y1 2 55 1A1 1Y2 3 54 1A2 GND 4 53 GND 1Y3 5 52 1A3 1Y4 6 51 1A4 VCC 7 50 VCC 1Y5 8 49 1A5 1Y6 9 48 1A6 1Y7 10 47 1A7 GND 11 46 GND 1Y8 12 45 1A8 1Y9 13 44 1A9 1Y10 14 43 1A10 2Y1 15 42 2A1 2Y2 16 41 2A2 2Y3 17 40 2A3 GND 18 39 GND 2Y4 19 38 2A4 2Y5 20 37 2A5 2Y6 21 36 2A6 VCC 22 35 VCC 2Y7 23 34 2A7 2Y8 24 33 2A8 GND 25 32 GND 2Y9 26 31 2A9 2Y10 27 30 2A10 2OE1 28 29 2OE2 Symbol Description VTERM(2) Terminal Voltage with Respect to GND VTERM(3) Terminal Voltage with Respect to GND Max Unit –0.5 to 7 V –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +120 mA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXX Output and I/O terminals. 3. Outputs and I/O terminals for FCT162XXX. CAPACITANCE (TA = +25°C, f = 1.0MHz) Parameter(1) Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 3.5 6 pF COUT Output Capacitance VOUT = 0V 3.5 8 pF Symbol NOTE: 1. This parameter is measured at characterization but not tested. PIN DESCRIPTION Pin Names xOEx Description Output Enable Inputs (Active LOW) xAx Data Inputs xYx 3-State Outputs FUNCTION TABLE(1) Inputs SSOP/ TSSOP TOP VIEW xOE2 L L L L L L H H H X X Z X H X Z NOTE: 1. H = HIGH voltage level L = LOW voltage level X = Don’t care Z = High-impedance 2 Outputs xOE1 xAx xYx IDT74FCT162827AT/CT FAST CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10% Symbol Test Conditions(1) Parameter Min. Typ.(2) Max. Unit VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V IIH Input HIGH Current (Input pins)(4) VCC = Max. — — ±1 µA — — ±1 VI = VCC Input HIGH Current (I/O pins)(4) IIL Input LOW Current (Input pins)(4) VI = GND — — ±1 — — ±1 VO = 2.7V — — ±1 VO = 0.5V — — ±1 — –0.7 –1.2 V –80 –140 –250 mA — 100 — mV — 5 500 µA Input LOW Current (I/O pins)(4) IOZH High Impedance Output Current IOZL (3-State Output pins)(4) VIK Clamp Diode Voltage IOS Short Circuit Current VH Input Hysteresis ICCL Quiescent Power Supply Current VCC = Max. VCC = Min., IIN = –18mA VCC = Max., VO = GND(3) — VCC = Max µA VIN = GND or VCC ICCH ICCZ OUTPUT DRIVE CHARACTERISTICS Symbol IODL Test Conditions(1) Min. Typ.(2) Max. Unit VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3) 60 115 200 mA 1.5V(3) Parameter Output LOW Current IODH Output HIGH Current VCC = 5V, VIN = VIH or VIL, VO = VOH Output HIGH Voltage VCC = Min. VOL Output LOW Voltage VCC = Min. –60 –115 –200 mA IOH = –24mA 2.4 3.3 — V IOL = 24mA — 0.3 0.55 V VIN = VIH or VIL VIN = VIH or VIL NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This test limit for this parameter is ±5µA at TA = –55°C. 3 IDT74FCT162827AT/CT FAST CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Test Conditions(1) Symbol ΔICC Parameter Quiescent Power Supply Current TTL Inputs HIGH ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open xOE1 = xOE2 = GND One Input Toggling 50% Duty Cycle IC Total Power Supply Current(6) VCC = Max. Outputs Open fi = 10MHz 50% Duty Cycle xOE1 = xOE2 = GND One Bit Toggling VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle xOE1 = xOE2 = GND Twenty Bits Toggling Min. — Typ.(2) 0.5 Max. 1.5 Unit mA VIN = VCC VIN = GND — 60 100 µA/ MHz VIN = VCC VIN = GND — 0.6 1.5 mA VIN = 3.4V VIN = GND — 0.9 2.3 VIN = VCC VIN = GND — 3 5.5(5) VIN = 3.4V VIN = GND — 8 20.5(5) VCC = Max. VIN = 3.4V(3) NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 4 IDT74FCT162827AT/CT FAST CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE FCT162827AT Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(o) FCT162827CT Parameter Propagation Delay xAx to xYx Condition(1) CL = 50pF RL = 500Ω Min.(2) 1.5 Max. 8 Min.(2) 1.5 Max. 3.7 1.5 15 1.5 7 Output Enable Time xOEx to xYx CL = 300pF(4) RL = 500Ω CL = 50pF RL = 500Ω 1.5 12 .5 4.8 CL = 300pF(4) RL = 500Ω 1.5 23 1.5 9 CL = 5pF(4) RL = 500Ω CL = 50pF RL = 500Ω 1.5 9 1.5 4 1.5 10 1.5 4 — 0.5 — 0.5 Output Disable Time xOEx to xYx Output Skew(3) NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 4. This limit is guaranteed but not tested. 5 Unit ns ns ns ns IDT74FCT162827AT/CT FAST CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS V CC 7.0V SWITCH POSITION 500Ω V OUT VIN Pulse Generator D.U.T. 50pF RT 500Ω CL Test Switch Open Drain Disable Low Enable Low Closed All Other Tests Open DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. Test Circuits for All Outputs DATA INPUT tH tSU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tREM tSU 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE tW 3V 1.5V 0V HIGH-LOW-HIGH PULSE 3V 1.5V 0V tH 1.5V 1.5V Pulse Width Set-up, Hold, and Release Times ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V VOH 1.5V VOL DISABLE 3V 1.5V 0V CONTROL INPUT tPZL OUTPUT NORMALLY LOW 3V 1.5V 0V SWITCH CLOSED tPLZ 3.5V 1.5V tPZH OUTPUT NORMALLY HIGH Propagation Delay SWITCH OPEN 3.5V 0.3V VOL tPHZ 0.3V 1.5V 0V VOH 0V Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 6 IDT74FCT162827AT/CT FAST CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION XX FCT Temp. Range XXX Family XXXX Device Type XX Package PVG PAG Shrink Small Outline Package - Green Thin Shrink Small Outline Package - Green 827AT 827CT 20-Bit Buffer 162 Double-Density, 5 Volt, Balanced Drive 74 40 C to +85 C Datasheet Document History 09/06/09 Pg. 7 Updated the ordering information by removing the "IDT" notation and non RoHS part. 7 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for development of an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. (Rev.1.0 Mar 2020) Corporate Headquarters Contact Information TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan www.renesas.com For further information on a product, technology, the most up-to-date version of a document, or your nearest sales office, please visit: www.renesas.com/contact/ Trademarks Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners. © 2020 Renesas Electronics Corporation. All rights reserved.