IDT74FCT16374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS 16-BIT
REGISTER (3-STATE)
DESCRIPTION:
FEATURES:
•
•
•
•
•
•
•
•
•
•
IDT74FCT16374AT/CT/ET
The FCT16374T 16-bit edge-triggered D-type register is built using
advanced dual metal CMOS technology. These high-speed, low-power
registers are ideal for use as buffer registers for data synchronization and
storage. The Output Enable (xOE) and clock (xCLK) controls are organized
to operate each device as two 8-bit registers or one 16-bit register with
common clock. Flow-through organization of signal pins simplifies layout. All
inputs are designed with hysteresis for improved noise margin.
The FCT16374T is ideally suited for driving high-capacitance loads and
low-impedance backplanes. The output buffers are designed with power off
disable capability to allow "live insertion" of boards when used as backplane
drivers.
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage ≤1µA (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 5V ±10%
High drive outputs (–32mA IOH, 64mA IOL)
Power off disable outputs permit “live insertion”
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,
TA = 25°C
Available in the following packages:
– Industrial: SSOP, TSSOP
FUNCTIONAL BLOCK DIAGRAM
1OE
2OE
1CLK
2CLK
1D1
D
2D1
D
1O1
2O1
C
C
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
INDUSTRIAL TEMPERATURE RANGE
MARCH 2019
1
DSC-5452/12
IDT74FCT16374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
1OE
1
48
1CLK
1O1
2
47
1D1
1O2
3
46
1D2
GND
4
45
GND
1O3
5
44
1D3
1O4
6
43
1D4
VCC
7
42
VCC
1O5
8
41
1D5
1O6
9
40
1D6
10
39
GND
GND
1O7
11
38
1D7
1O8
12
37
1D8
2O1
13
36
2D1
2O2
14
35
2D2
GND
15
34
GND
2O3
16
33
2D3
2O4
17
32
2D4
VCC
18
31
VCC
2O5
19
30
2D5
2O6
20
29
2D6
GND
21
28
GND
2O7
22
27
2D7
2O8
23
26
2D8
2OE
24
25
Package Code
Description
VTERM(2)
Max
Unit
VTERM(3)
Terminal Voltage with Respect to GND
–0.5 to 7
V
Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–60 to +120
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Outputs and I/O terminals for FCT162XXX.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Parameter(1)
Symbol
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
3.5
6
pF
COUT
Output Capacitance
VOUT = 0V
3.5
8
pF
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names
Description
xDx
Data Inputs
xCLK
Clock Inputs
xOx
3-State Outputs
xOE
3-State Output Enable Input (Active LOW)
FUNCTION TABLE(1)
Inputs
2CLK
TOP VIEW
Package Type
Symbol
Outputs
Function
xDx
xCLK
xOE
xOx
Z
X
L
H
Z
X
H
H
Z
Load
L
↑
L
L
Register
H
↑
L
H
Order Code
L
↑
H
Z
H
↑
H
Z
TSSOP
PAG48
PAG
SSOP
PVG48
PVG
NOTE:
1. H = HIGH voltage level
L = LOW voltage level
X = Don’t care
Z = High-impedance
↑ = LOW-to-HIGH transition
2
IDT74FCT16374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
VIH
Input HIGH Level
Guaranteed Logic HIGH Level
2
—
—
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
—
—
0.8
V
IIH
Input HIGH Current (Input pins)(5)
VCC = Max.
—
—
±1
µA
—
—
±1
VI = VCC
Input HIGH Current (I/O pins)(5)
IIL
Input LOW Current (Input pins)(5)
VI = GND
—
—
±1
—
—
±1
VO = 2.7V
—
—
±1
VO = 0.5V
—
—
±1
Input LOW Current (I/O pins)(5)
IOZH
High Impedance Output Current
IOZL
(3-State Output pins)(5)
VCC = Max.
VIK
Clamp Diode Voltage
VCC = Min., IIN = –18mA
—
–0.7
–1.2
V
IOS
Short Circuit Current
VCC = Max., VO = GND(3)
–80
–140
–250
mA
VH
Input Hysteresis
—
100
—
mV
ICCL
Quiescent Power Supply Current
—
5
500
µA
—
VCC = Max
µA
VIN = GND or VCC
ICCH
ICCZ
OUTPUT DRIVE CHARACTERISTICS
Symbol
Test Conditions(1)
Parameter
2.5V(3)
Min.
Typ.(2)
Max.
Unit
IO
Output Drive Current
VCC = Max., VO =
–50
—
–180
mA
VOH
Output HIGH Voltage
VCC = Min.
IOH = –3mA
2.5
3.5
—
V
VCC = Min.
IOH = –15mA IND
2.4
3.5
—
V
IOH = –32mA IND
2
3
—
V
IOL = 64mA IND
—
0.2
0.55
V
—
—
±1
μA
VOL
Output LOW Voltage
VCC = Min.
VIN = VIH or VIL
IOFF
Input/Output Power Off Leakage(5)
VCC = 0V, VIN = or VO ≤ 4.5V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. This test limit for this parameter is ±5µA at TA = –55°C.
3
IDT74FCT16374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Test Conditions(1)
Min.
—
Typ.(2)
0.5
Max.
1.5
Unit
mA
VIN = VCC
VIN = GND
—
60
100
µA/
MHz
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
VIN = VCC
VIN = GND
—
0.6
1.5
mA
xOE = GND
fi = 5MHz
50% Duty Cycle
One Bit Toggling
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
VIN = 3.4V
VIN = GND
—
1.1
3
VIN = VCC
VIN = GND
—
3
5.5(5)
VIN = 3.4V
VIN = GND
—
7.5
19(5)
Symbol
ΔICC
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
ICCD
Dynamic Power Supply Current(4)
VCC = Max.
Outputs Open
xOE = GND
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.
VIN = 3.4V(3)
xOE = GND
Sixteen Bits Toggling
fi = 2.5MHz
50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
4
IDT74FCT16374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
74FCT16374AT
Ind.
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
tH
tW
tSK(o)
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
tH
tW
tSK(o)
Min.(2)
2
Max.
6.5
Unit
ns
1.5
6.5
ns
Output Disable Time
1.5
5.5
ns
Set-up Time HIGH or LOW, xDx to xCLK
Hold Time HIGH or LOW, xDx to xCLK
xCLK Pulse Width HIGH or LOW
Output Skew(3)
2
1.5
5
—
—
—
—
0.5
ns
ns
ns
ns
Parameter
Propagation Delay
xCLK to xOx
Output Enable Time
Parameter
Propagation Delay
xCLK to xOx
Output Enable Time
Condition(2)
CL = 50pF
RL = 500Ω
Condition(2)
CL = 50pF
RL = 500Ω
74FCT16374CT
Ind.
(2)
Min.
Max.
2
5.2
74FCT16374ET
Ind.
(2)
Min.
Max.
1.5
3.7
Unit
ns
1.5
5.5
1.5
4.4
ns
Output Disable Time
1.5
5
1.5
3.6
ns
Set-up Time HIGH or LOW, xDx to xCLK
Hold Time HIGH or LOW, xDx to xCLK
xCLK Pulse Width HIGH or LOW
Output Skew(3)
2
1.5
5
—
—
—
—
0.5
1.5
0
3(4)
—
—
—
—
0.5
ns
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested.
3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
4. This limit is guaranteed but not tested.
5
IDT74FCT16374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V CC
SWITCH POSITION
7.0V
500Ω
V OUT
VIN
Pulse
Generator
D.U.T.
50pF
RT
500Ω
Test
Switch
Open Drain
Disable Low
Enable Low
Closed
All Other Tests
Open
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
CL
Test Circuits for All Outputs
DATA
INPUT
tH
tSU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tREM
tSU
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
3V
1.5V
0V
tH
1.5V
1.5V
Pulse Width
Set-up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
DISABLE
3V
CONTROL
INPUT
tPZL
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
SWITCH
CLOSED
tPLZ
3.5V
1.5V
tPZH
OUTPUT
NORMALLY
HIGH
Propagation Delay
SWITCH
OPEN
1.5V
0V
3.5V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
VOH
0V
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT74FCT16374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
XX
FCT
Temp. Range
XXX
Family
XXXX
Device Type
XX
Package
X
X
Blank
8
Tube
Tape and Reel
G
Green
PV
PA
Shrink Small Outline Package (PVG48)
Thin Shrink Small Outline Package (PAG48)
374AT
374CT
374ET
16-Bit Register (3-State)
16
Double-Density, 5 Volt, High Drive
74
– 40°C to +85°C
Orderable Part Information
Speed
(ns)
A
C
E
Pkg.
Code
Pkg.
Type
Temp.
Grade
74FCT16374ATPAG
PAG48
TSSOP
I
74FCT16374ATPAG8
PAG48
TSSOP
I
74FCT16374ATPVG
PVG48
SSOP
I
74FCT16374ATPVG8
PVG48
SSOP
I
74FCT16374CTPAG
PAG48
TSSOP
I
74FCT16374CTPAG8
PAG48
TSSOP
I
74FCT16374CTPVG
PVG48
SSOP
I
74FCT16374CTPVG8
PVG48
SSOP
I
74FCT16374ETPAG
PAG48
TSSOP
I
74FCT16374ETPAG8
PAG48
TSSOP
I
74FCT16374ETPVG
PVG48
SSOP
I
74FCT16374ETPVG8
PVG48
SSOP
I
Orderable Part ID
Datasheet Document History
09/28/2009
05/22/2018
Pg. 7
Pg. 1, 2, 5, 7
08/06/2018
03/26/2019
Pg. 7
Pg. 7
Updated the ordering information by removing the "IDT" notation and non RoHS part.
Added table under pin configuration diagram with detailed package information. Updated the ordering information
diagram by deleting 54FCT, MIL, Cerpack package and adding Tube, Tape and Reel.
Added orderable part information table.
Corrected ordering information diagram symbol for "-"43
Typo in above text; should be -40 Not -43
7
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