74FCT16543ATPVG8

IDT74FCT16543AT/CT FAST CMOS 16-BIT LATCHED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE FAST CMOS 16-BIT LATCHED TRANSCEIVER IDT74FCT16543AT/CT DESCRIPTION: FEATURES: The FCT16543T 16-bit latched transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit D-type latched transceivers with separate input and output control to permit independent control of data flow in either direction. For example, the A-to-B Enable (xCEAB) must be low in order to enter data from the A port or to output data from the B port. xLEAB controls the latch function. When xLEAB is low, the latches are transparent. A subsequent low-to-high transition of xLEAB signal puts the A latches in the storage mode. xOEAB performs output enable function on the B port. Data flow from the B port to the A port is similar but requires using xCEBA, xLEBA, and xOEBA inputs. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16543T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. • • • • • • • • 0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage ≤1µA (max.) VCC = 5V ±10% High drive outputs (–32mA IOH, 64mA IOL) Power off disable outputs permit “live insertion” Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C • Available in SSOP and TSSOP packages FUNCTIONAL BLOCK DIAGRAM 1OEBA 56 2OEBA 29 2CEBA 31 1CEBA 54 30 55 2LEBA 1OEAB 1 2OEAB 28 1CEAB 3 2CEAB 26 1LEAB 2 2LEAB 27 1LEBA C D C 2A1 15 1A1 5 52 1B1 42 D C C D D 2B1 TO SEVEN OTHER CHANNELS TO SEVEN OTHER CHANNELS IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE JULY 2017 1 ©2017 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-5444/6 IDT74FCT16543AT/CT FAST CMOS 16-BIT LATCHED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION PIN DESCRIPTION 1OEAB 1 56 1OEBA 1LEAB 2 55 1LEBA 1CEAB 3 54 1CEBA GND 4 53 GND 1A1 5 52 1B1 1A2 6 51 1B2 VCC 7 50 VCC 1A3 8 49 1B3 1A4 9 48 1B4 Pin Names xOEAB xOEBA xCEAB xCEBA xLEAB xLEBA xAx xBx Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs ABSOLUTE MAXIMUM RATINGS(1) Symbol Description VTERM(2) Max Unit VTERM(3) Terminal Voltage with Respect to GND –0.5 to 7 V Terminal Voltage with Respect to GND –0.5 to VCC+0.5 TSTG V Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +120 mA 1A5 10 47 1B5 GND 11 46 GND 1A6 12 45 1B6 1A7 13 44 1B7 1A8 14 43 1B8 2A1 15 42 2B1 2A2 16 41 2B2 2A3 17 40 2B3 GND 18 39 GND 2A4 19 38 2B4 2A5 20 37 2B5 2A6 21 36 2B6 VCC 22 35 VCC 2A7 23 34 2B7 2A8 24 33 2B8 FUNCTION TABLE(1, 2) GND 25 32 GND For A-to-B (Symmetric with B-to-A) 2CEAB 26 31 2CEBA 2LEAB 27 30 2LEBA 2OEAB 28 29 2OEBA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXX Output and I/O terminals. 3. Outputs and I/O terminals for FCT162XXX. CAPACITANCE (TA = +25°C, f = 1.0MHz) Package Code Order Code TSSOP PAG56 PAG SSOP PVG56 PVG Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 3.5 6 pF COUT Output Capacitance VOUT = 0V 3.5 8 pF NOTE: 1. This parameter is measured at characterization but not tested. xCEAB H X L L L L TOP VIEW Package Type Parameter(1) Symbol Inputs xLEAB X H L H L H xOEAB X X L L H H Latch Status xAx to xBx Storing Storing Transparent Storing Transparent Storing Output Buffers xBx Z X Current A Inputs Previous* A Inputs Z Z NOTES: 1. * Before xLEAB LOW-to-HIGH Transition H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care 2. A-to-B data flow shown; B-to-A flow control is the same, except using xCEBA, xLEBA and xOEBA. 2 IDT74FCT16543AT/CT FAST CMOS 16-BIT LATCHED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10% Symbol Test Conditions(1) Parameter Min. Typ.(2) Max. Unit VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V IIH Input HIGH Current (Input pins)(5) VCC = Max. — — ±1 µA — — ±1 VI = VCC Input HIGH Current (I/O pins)(5) IIL Input LOW Current (Input pins)(5) VI = GND — — ±1 — — ±1 VO = 2.7V — — ±1 VO = 0.5V — — ±1 Input LOW Current (I/O pins)(5) IOZH High Impedance Output Current IOZL (3-State Output pins)(5) VCC = Max. VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V IOS Short Circuit Current VCC = Max., VO = GND(3) –80 –140 –250 mA VH Input Hysteresis — 100 — mV ICCL Quiescent Power Supply Current — 5 500 µA — VCC = Max µA VIN = GND or VCC ICCH ICCZ OUTPUT DRIVE CHARACTERISTICS Symbol Test Conditions(1) Parameter 2.5V(3) Min. Typ.(2) Max. Unit IO Output Drive Current VCC = Max., VO = –50 — –180 mA VOH Output HIGH Voltage VCC = Min. IOH = –3mA 2.5 3.5 — V VIN = VIH or VIL IOH = –15mA VOL Output LOW Voltage IOFF Input/Output Power Off Leakage(5) VCC = Min. 2.4 3.5 — V IOH = –32mA(4) 2 3 — V IOL = 64mA — 0.2 0.55 V — — ±1 μA VIN = VIH or VIL VCC = 0V, VIN = or VO ≤ 4.5V NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. This test limit for this parameter is ±5µA at TA = –55°C. 3 IDT74FCT16543AT/CT FAST CMOS 16-BIT LATCHED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol Test Conditions(1) Parameter Min. Typ.(2) Max. Unit — 0.5 1.5 mA ΔICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = 3.4V(3) ICCD Dynamic Power Supply Current(4) VCC = Max., Outputs Open xCEAB and xOEAB = GND xCEBA = VCC One Input Toggling 50% Duty Cycle VIN = VCC VIN = GND — 60 100 µA/ MHz IC Total Power Supply Current(6) VCC = Max., Outputs Open fi = 10MHz 50% Duty Cycle xLEAB, xCEAB and xOEAB = GND xCEBA = VCC One Bit Toggling VIN = VCC VIN = GND — 0.6 1.5 mA VIN = 3.4V VIN = GND — 0.9 2.3 VCC = Max., Outputs Open fi = 2.5MHz 50% Duty Cycle xLEAB, xCEAB and xOEAB = GND xCEBA = VCC Sixteen Bits Toggling VIN = VCC VIN = GND — 2.4 4.5(5) VIN = 3.4V VIN = GND — 6.4 16.5(5) NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 4 IDT74FCT16543AT/CT FAST CMOS 16-BIT LATCHED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE Symbol tPLH tPHL tPLH tPHL tPHZ tPLZ tPZH tPZL tSU tH tW tSK(o) Parameter Propagation Delay Transparent Mode xAx to xBx or xBx to xAx Propagation Delay xLEBA to xAx, xLEAB to xBx Output Enable Time xOEBA or xOEAB to xAx or xBx xCEBA or xCEAB to xAx or xBx Output Disable Time xOEBA or xOEAB to xAx or xBx xCEBA or xCEAB to xAx or xBx Set-up Time HIGH or LOW xAx or xBx to xLEAB or xLEBA Hold Time HIGH or LOW xAx or xBx to xLEAB or xLEBA xLEAB or xLEBA Pulse Width LOW Output Skew(3) Condition(2) CL = 50pF RL = 500Ω 74FCT16543AT Min.(2) Max. 1.5 6.5 74FCT16543CT Min.(2) Max. 1.5 5.1 1.5 8 1.5 5.6 ns 1.5 9 1.5 7.8 ns 1.5 7.5 1.5 6.5 ns 2 — 2 — ns 2 — 2 — ns 4 — — 0.5 4 — — 0.5 ns ns NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested. 3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 5 Unit ns IDT74FCT16543AT/CT FAST CMOS 16-BIT LATCHED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS V CC SWITCH POSITION 7.0V 500Ω V OUT VIN Pulse Generator D.U.T. 50pF RT 500Ω Test Switch Open Drain Disable Low Enable Low Closed All Other Tests Open DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. CL Test Circuits for All Outputs DATA INPUT tH tSU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tREM tSU 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE tW 3V 1.5V 0V HIGH-LOW-HIGH PULSE 3V 1.5V 0V tH 1.5V 1.5V Pulse Width Set-up, Hold, and Release Times ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V VOH 1.5V VOL DISABLE 3V CONTROL INPUT tPZL OUTPUT NORMALLY LOW 3V 1.5V 0V SWITCH CLOSED tPLZ 3.5V 1.5V tPZH OUTPUT NORMALLY HIGH Propagation Delay SWITCH OPEN 1.5V 0V 3.5V 0.3V VOL tPHZ 0.3V 1.5V 0V VOH 0V Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 6 IDT74FCT16543AT/CT FAST CMOS 16-BIT LATCHED TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION XX FCT XXX Temp. Range Family XXXX Device Type X Package X X Blank 8 Tube Tape and Reel G Green PV PA Shrink Small Outline Package (PVG48) Thin Shrink Small Outline Package (PAG48) 543AT 543ACT 16-Bit Latched Transceiver 16 Double-Density, 5 Volt, High Drive 74 − 40°C to +85°C Orderable Part Information Speed (ns) A C Pkg. Code Pkg. Type Temp. Grade 74FCT16543ATPAG PAG56 TSSOP I 74FCT16543ATPAG8 PAG56 TSSOP I 74FCT16543ATPVG PVG56 SSOP I 74FCT16543ATPVG8 PVG56 SSOP I 74FCT16543CTPAG PAG56 TSSOP I 74FCT16543CTPAG8 PAG56 TSSOP I 74FCT16543CTPVG PVG56 SSOP I 74FCT16543CTPVG8 PVG56 SSOP I Orderable Part ID Datasheet Document History 09/28/2009 07/31/2017 Pg. 7 Pg. 1, 2, 5, 7 Updated the ordering information by removing the "IDT" notation and non RoHS part. Added table under pin configuration diagram with detailed package information. Updated the ordering information diagram by deleting 543ET, TSSOP package and adding Tube, Tape and Reel. Added orderable part information table. 7 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. 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