74LVCH32245ABF8

74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD FEATURES: 74LVCH32245A DESCRIPTION: • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range μ W typ. static) • CMOS power levels (0.4μ • All inputs, outputs, and I/O are 5V tolerant • Supports hot insertion • Available in 96-ball LFBGA package This 32-bit bus transceiver is built using advanced dual metal CMOS technology. This high-speed, low power transceiver is ideal for asynchronous communication between two busses (A and B). The Direction and Output Enable controls are designed to operate the device as either four independent 8-bit transceivers or one 32-bit transceiver. The direction control pins (DIR) control the direction of data flow. The output enable pins (OE) override the direction control and disable both ports. All inputs are designed with hysteresis for improved noise margin. All pins can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system. The LVCH32245A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance The LVCH32245A has “bus-hold” which retains the inputs’ last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. DRIVE FEATURES: • Balanced Output Drivers: ±24mA • Reduced system switching noise APPLICATIONS: • 5V and 3.3V mixed voltage systems • Data communication and telecommunication systems FUNCTIONAL BLOCK DIAGRAM 1DIR A3 3DIR J3 A4 J4 1OE 1A1 A5 3A1 A2 J2 1B1 TO SEVEN OTHER CHANNNELS 2DIR H3 4DIR T3 T4 2OE 4OE E5 4A1 E2 N5 N2 2B1 TO SEVEN OTHER CHANNNELS TO SEVEN OTHER CHANNNELS INDUSTRIAL TEMPERATURE RANGE 1 Apr.01.21 3B1 TO SEVEN OTHER CHANNNELS H4 2A1 3OE J5 4B1 74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION 6 1A2 1A4 1A6 1A8 2A2 2A4 2A6 2A7 3A2 3A4 3A6 3A8 4A2 4A4 4A6 4A7 5 1A1 1A3 1A5 1A7 2A1 2A3 2A5 2A8 3A1 3A3 3A5 3A7 4A1 4A3 4A5 4A8 4 1OE GND VCC GND GND VCC GND 2OE 3OE GND VCC GND GND VCC GND 4OE 3 1DIR GND VCC GND GND VCC GND 2DIR 3DIR GND VCC GND GND VCC GND 4DIR 2 1B1 1B3 1B5 1B7 2B1 2B3 2B5 2B8 3B1 3B3 3B5 3B7 4B1 4B3 4B5 4B8 1 1B2 1B4 1B6 1B8 2B2 2B4 2B6 2B7 3B2 3B4 3B6 3B8 4B2 4B4 4B6 4B7 B C D E F G H M N R T A J LFBGA TOPVIEW 2 Apr.01.21 K L P 74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS ABSOLUTE MAXIMUM RATINGS(1) Symbol Description Max Unit VTERM Terminal Voltage with Respect to GND –0.5 to +6.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –50 to +50 mA IIK IOK Continuous Clamp Current, VI < 0 or VO < 0 –50 mA ICC ISS Continuous Current through each VCC or GND ±100 mA INDUSTRIAL TEMPERATURE RANGE CAPACITANCE (TA = +25°C, F = 1.0MHz) Parameter(1) Symbol Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 4.5 6 pF COUT Output Capacitance VOUT = 0V 6.5 8 pF CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF NOTE: 1. As applicable to the device type. NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FUNCTION TABLE(1) PIN DESCRIPTION Pin Names xOE Inputs Description Output Enable Input (Active LOW) xOE xDIR Outputs xDIR Direction Control Input L L Bus B data to Bus A xAx Side A Inputs or 3-State Outputs(1) L H Bus A data to Bus B xBx Side B Inputs or 3-State Outputs(1) H X Z NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High Impedance NOTE: 1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os. BUS-HOLD CHARACTERISTICS Symbol IBHH Parameter(1) Test Conditions Unit — — µA VI = 2V VI = 0.8V 75 — — Bus-Hold Input Sustain Current VCC = 2.3V VI = 1.7V — — — VI = 0.7V — — — VI = 0 to 3.6V — — ±500 Bus-Hold Input Overdrive Current VCC = 3.6V IBHLO NOTES: 1. Pins with Bus-Hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3 Apr.01.21 Max. – 75 VCC = 3V IBHL IBHHO Typ.(2) Bus-Hold Input Sustain Current IBHL IBHH Min. µA µA 74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = –40°C to +85°C Symbol VIH VIL Min. Typ.(1) Max. Unit VCC = 2.3V to 2.7V 1.7 — — V VCC = 2.7V to 3.6V 2 — — VCC = 2.3V to 2.7V — — 0.7 VCC = 2.7V to 3.6V — — 0.8 Parameter Input HIGH Voltage Level Input LOW Voltage Level Test Conditions V Input Leakage Current VCC = 3.6V VI = 0 to 5.5V — — ±5 µA IOZH High Impedance Output Current VCC = 3.6V VO = 0 to 5.5V — — ±10 µA IOZL (3-State Output pins) IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO ≤ 5.5V — — ±50 µA VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V VH ICCL ICCH ICCZ ΔICC Input Hysteresis Quiescent Power Supply Current VCC = 3.3V VCC = 3.6V VIN = GND or VCC — — 100 — — 10 mV µA 3.6 ≤ VIN ≤ 5.5V(2) One input at VCC - 0.6V, other inputs at VCC or GND — — — — 10 500 µA IIH IIL Quiescent Power Supply Current Variation NOTES: 1. Typical values are at VCC = 3.3V, +25°C ambient. 2. This applies in the disabled state only. OUTPUT DRIVE CHARACTERISTICS Symbol VOH Test Conditions(1) Parameter Output HIGH Voltage VCC = 2.3V to 3.6V IOH = – 0.1mA VCC = 2.3V IOH = – 6mA VCC = 2.3V IOH = – 12mA VCC = 2.7V VCC = 3V VOL Output LOW Voltage Min. Max. Unit VCC – 0.2 — V 2 — 1.7 — 2.2 — 2.4 — VCC = 3V IOH = – 24mA 2.2 — VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 VCC = 2.3V IOL = 6mA — 0.4 IOL = 12mA — 0.7 VCC = 2.7V IOL = 12mA — 0.4 VCC = 3V IOL = 24mA — 0.55 V NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = – 40°C to + 85°C. 4 Apr.01.21 74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C Symbol Parameter CPD Power Dissipation Capacitance per Transceiver Outputs enabled CPD Power Dissipation Capacitance per Transceiver Outputs disabled Test Conditions Typical Unit CL = 0pF, f = 10Mhz 76 pF 8 SWITCHING CHARACTERISTICS(1) VCC = 2.7V Symbol VCC = 3.3V ± 0.3V Parameter Min. Max. Min. Max. Unit tPLH Propagation Delay 1.5 4.7 1 4 ns 1.5 6.7 1.5 5.5 ns 1.5 7.1 1.5 6.6 ns 1.5 7 1.5 5.5 ns 1.5 7.4 1.5 6.6 ns — — — 500 ps tPHL xAx to xBx, xBx to xAx tPZH Output Enable Time tPZL xOE to xAx or xBx tPHZ Output Disable Time tPLZ xOE to xAx or xBx tPZH Output Enable Time tPZL xDIR to xAx or xBx tPHZ Output Disable Time tPLZ xDIR to xAx or xBx tSK(o) Output Skew(2) NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C. 2. Skew between any two outputs of the same package and switching in the same direction. 5 Apr.01.21 74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS VCC(1)= 3.3V±0.3V VCC(1)= 2.7V Symbol VCC(2)= 2.5V±0.2V Unit VLOAD 6 6 2 x Vcc V VIH 2.7 2.7 Vcc V VT 1.5 1.5 Vcc / 2 V VLZ 300 300 150 mV VHZ 300 300 150 mV CL 50 50 30 pF Pulse (1, 2) Generator VIN tPZL OUTPUT SWITCH NORMALLY CLOSED LOW tPZH OUTPUT SWITCH NORMALLY OPEN HIGH 500Ω CL Test Switch Open Drain Disable Low Enable Low DATA INPUT VLOAD TIMING INPUT Disable High Enable High GND ASYNCHRONOUS CONTROL All Other Tests Open SYNCHRONOUS CONTROL VIH VT 0V tSU tH tREM tSU tH LVC Link VT HIGH-LOW-HIGH PULSE VT LVC Link tPHL2 Output Skew - tSK(X) VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V tW Pulse Width tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1 LVC Link NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. 6 Apr.01.21 VOH VOH-VHZ 0V V T 0V LOW-HIGH-LOW PULSE VOH VT VOL OUTPUT 2 tPHZ Set-up, Hold, and Release Times VOH VT VOL tSK (x) VLOAD/2 VOL+VLZ VOL Enable and Disable Times SWITCH POSITION tSK (x) tPLZ VLOAD/2 VT NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. NOTES: 1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns. tPHL1 VIH VT 0V LVC Link DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. tPLH2 DISABLE CONTROL INPUT Test Circuit for All Outputs OUTPUT 1 VIH VT 0V ENABLE GND VOUT tPLH1 tPHL LVC Link LVC Link INPUT tPLH Propagation Delay D.U.T. RT tPHL OPPOSITE PHASE INPUT TRANSITION Open 500Ω tPLH OUTPUT VLOAD VCC VIH VT 0V VOH VT VOL SAME PHASE INPUT TRANSITION 74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION X LVC XX Bus-Hold Temp. Range XX Family XX XXXX Device Type Package X Blank 8 Tray Tape and Reel BF BFG Low-Profile Fine Pitch Ball Grid Array LFBGA - Green 245A 32-bit Bus Transceiver with 5 Volt Tolerant I/O 32 32-bit Bus Density, ±24mA H Bus-hold 74 -40°C to +85°C Orderable Part Information Speed (ns) A Pkg. Code Pkg. Type Temp. Grade 74LVCH32245ABF BF96 CABGA I 74LVCH32245ABF8 BF96 CABGA I 74LVCH32245ABFG BFG96 CABGA I 74LVCH32245ABFG8 BFG96 CABGA I Orderable Part ID Datasheet Document History 02/29/2016 04/01/2021 Pg. 7 Pg. 1-7 Updated the ordering information by adding Tape and Reel. Rebranded as a Renesas datasheet. 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