93V855AGLF

ICS93V855I DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver • • • • • • Low skew, low jitter PLL clock driver External feedback pins for input to output synchronization Spread Spectrum tolerant inputs With bypass mode mux Operating frequency 60 to 170 MHz Operating Temperature –45°C to +85°C • • • CYCLE - CYCLE jitter: