4-output 3.3V PCIe Clock Generator
9FGL04
DATASHEET
Description
Features/Benefits
The 9FGL04 devices are 3.3V members of IDT's 3.3V
Full-Featured PCIe family. The devices have 4 output enables
for clock management and support 2 different spread
spectrum levels in addition to spread off. The 9FGL04
supports PCIe Gen1-4 Common Clocked architectures (CC)
and PCIe Separate Reference no-Spread (SRnS) and
Separate Reference Independent Spread (SRIS) clocking
architectures. The 9FGL04P1 can be programmed with a
user-defined power up default SMBus configuration.
• Direct connection to 100 (xx41) or 85 (xx51)
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Recommended Application
PCIe Gen1-4 clock generation for Riser Cards, Storage,
Networking, JBOD, Communications, Access Points
Output Features
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• 4 – 100 MHz Low-Power HCSL (LP-HCSL) DIF pairs
• 9FGL0441 default ZOUT = 100
• 9FGL0451 default ZOUT = 85
• 9FGL04P1 factory programmable defaults
• 1 - 3.3V LVCMOS REF output w/Wake-On-LAN (WOL)
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support
• Easy AC-coupling to other logic families, see IDT
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application note AN-891
Key Specifications
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PCIe Gen1-2-3-4 CC-compliant
PCIe Gen2-3 SRIS-compliant
DIF cycle-to-cycle jitter
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