9LRS3187BKILFT

Datasheet PROGRAMMABLE TIMING CONTROL HUB FOR INTEL BASED SYSTEMS ICS9LRS3187B Recommended Application: Features/Benefits: CK505 version 1.1 clock, with fully integrated voltage regulators and series resistors • Supports spread spectrum modulation, 0 to -0.5% down spread for CPU and SRC clocks • Uses external 14.318MHz crystal, external crystal load caps are required for frequency tuning • Available in commercial (0 to +70°C) and industrial (-40 to +85°C) temperature ranges • Meets PCIe Gen2 specifications Output Features: 2 - CPU differential low power push-pull pairs 1 - SRC differential low power push-pull pair 1 - SATA differential low power push-pull pair 1 - DOT differential low power push-pull pair 1 - REF, able to drive 3 loads, 14.318MHz 1 - 27MHz_SS/non_SS single-ended output pair Key Specifications: CLKPWRGD/PD#_3.3 GNDREF CPU outputs cycle-cycle jitter 2.0V then use TEST_SEL If power-up w/ Vlow Vth input TEST_MODE is a real time input If TEST_SEL HW pin is 0 during power-up, test mode can be invoked through B9b3. If test mode is invoked by B9b3, only B9b4 is used to select HI-Z or REF/N FSLB/TEST_Mode pin is not used. Cycle power to disable test mode, one shot control SW FSLC/ TEST_SEL HW PIN FSLB/ TEST_MODE HW PIN TEST ENTRY BIT B9b3 REF/N or HI-Z B9b4 2.0V >2.0V >2.0V X 0 0 1 0 X X X 0 0 1 0 OUTPUT NORMAL HI-Z REF/N REF/N >2.0V 1 X 1 REF/N