9P936AGLF

DATASHEET ICS9P936 Low Skew Dual Bank DDR I/II Fan-out Buffer Description Pin Configuration Dual DDR I/II fanout buffer for VIA Chipset AGND Output Features • • • • • • • • • Low skew, fanout buffer SMBus for functional and output control Single bank 1-6 differential clock distribution 1 pair of differential feedback pins for input to output synchronization Supports up to 2 DDR DIMMs 266MHz (DDRI 533) output frequency support 400MHz (DDRII 800) output frequency support Programmable skew through SMBus Individual output control programmable through SMBus BUF_INT BUF_INC DDRT0 DDRC0 DDRT1 DDRC1 GND VDDQ2.5/1.8 FB_OUTT FB_OUTC DDRT2 DDRC2 Key Specifications • • • • • OUTPUT - OUTPUT skew: