ACTS240KMSR

DATASHEET ACTS240MS Rev X.00 Jan 13, 2017 High Reliability, Radiation Hardened Octal Buffer/Line Driver, Three-State Features Pinouts • Devices QML Qualified in Accordance with MIL-PRF-38535 20 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR CDIP2-T20, LEAD FINISH C TOP VIEW • Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96717 and Intersil’s QM Plan • 1.25 Micron Radiation Hardened SOS CMOS • Total Dose >300K RAD (Si) • Single Event Upset (SEU) Immunity: 100 MEV-cm • Dose Rate Upset>1011 RAD (Si)/s, 20ns Pulse AEN 1 AI1 2 19 BEN BO4 3 18 AO1 AI2 4 17 BI4 BO3 5 16 AO2 AI3 6 15 BI3 BO2 7 14 AO3 AI4 8 13 BI2 BO1 9 12 AO4 • Dose Rate Survivability>1012 RAD (Si)/s, 20ns Pulse • Latch-Up Free Under Any Conditions 20 VCC GND 10 • Military Temperature Range-55oC to +125oC 11 BI1 • Significant Power Reduction Compared to ALSTTL Logic 20 PIN CERAMIC FLATPACK MIL-STD-1835 DESIGNATOR CDFP4-F20, LEAD FINISH C TOP VIEW • DC Operating Voltage Range 4.5V to 5.5V • Input Logic Levels - VIL = 0.8V Max - VIH = VCC/2 Min AEN 1 20 VCC AI1 2 19 BEN BO4 3 18 AO1 AI2 4 17 BI4 Description BO3 5 16 AO2 AI3 6 15 BI3 The Intersil ACTS240MS is a Radiation Hardened High Reliability, High-Speed CMOS/SOS having two active low enable inputs. BO2 7 14 AO3 AI4 8 13 BI2 BO1 9 12 AO4 The ACTS240MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of a radiation hardened, high-speed, CMOS/SOS Logic Family. GND 10 11 BI1 • Input Current  1A at VOL, VOH • Fast Propagation Delay17.5ns (Max), 12ns (Typ) The ACTS240MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or a Dual-In-Line Ceramic Package (D suffix). Ordering Information PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE 5962F9671701VRC -55oC to +125oC MIL-PRF-38535 Class V 20 Lead SBDIP 5962F9671701VXC -55oC to +125oC MIL-PRF-38535 Class V 20 Lead Ceramic Flatpack ACTS240D/Sample 25oC Sample 20 Lead SBDIP ACTS240K/Sample 25oC Sample 20 Lead Ceramic Flatpack ACTS240HMSR 25oC Die Die Rev X.00 Jan 13, 2017 Page 1 of 3 ACTS240MS ACTS240MS Functional Diagram NOTE: (1 of 2) AE 1(19) P AO1 N 18(9) AI1 2(11) P AO2 N 16(7) AI2 4(13) P AO3 N 14(5) AI3 6(15) P AO4 N 12(3) AI4 8(17) TRUTH TABLE INPUTS OUTPUT AE, BE AIn, BIn AOn, BOn L L H L H L H X Z NOTE: H = High Voltage Level, L = Low Voltage Level, X = Immaterial, Z = High Impedance Rev X.00 Jan 13, 2017 Page 2518783 of 3 Spec Number ACTS240MS GLASSIVATION: Type: SiO2 Thickness: 8kÅ 1kÅ Die Characteristics DIE DIMENSIONS: 100 mils x 100 mils 2.54mm x 2.54mm WORST CASE CURRENT DENSITY: < 2.0 x 105A/cm2 METALLIZATION: Type: AlSi Metal 1 Thickness: 7.125kÅ 1.125kÅ Metal 2 Thickness: 9kÅ 1kÅ BOND PAD SIZE: 110m x 110m 4.4 mils x 4.4 mils Metallization Mask Layout ACTS240MS AI1 (2) AEN (1) VCC (20) VCC (20) BEN (19) (18) AO1 BO4 (3) (17) BI4 AI2 (4) (16) AO2 BO3 (5) (15) BI3 AI3 (6) (14) AO3 BO2 (7) (13) BI2 AI4 (8) BO1 (9) AO4 (12) (10) (10) GND GND (11) BI1 © Copyright Intersil Americas LLC 1999. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com Rev X.00 Jan 13, 2017 Page 3 of 3