BB301M

BB301M Built in Biasing Circuit MOS FET IC VHF RF Amplifier REJ03G0824-0300 (Previous ADE-208-506A) Rev.3.00 Aug.10.2005 Features • Built in Biasing Circuit; To reduce using parts cost & PC board space. • Low noise characteristics; (NF = 1.3 dB typ. at f = 200 MHz) • Withstanding to ESD; Built in ESD absorbing diode. Withstand up to 200V at C=200pF, Rs=0 conditions. • Provide mini mold packages; MPAK-4(SOT-143Rmod) Outline RENESAS Package code: PLSP0004ZA-A (Package name: MPAK-4) 2 3 1 4 1. Source 2. Gate1 3. Gate2 4. Drain Notes: 1. Marking is “AW–”. 2. BB301M is individual type number of RENESAS BBFET. Rev.3.00 Aug 10, 2005 page 1 of 7 BB301M Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate1 to source voltage Gate2 to source voltage Drain current Channel power dissipation Channel temperature Storage temperature Symbol VDS VG1S VG2S ID Pch Tch Tstg Ratings 6 +6 –0 ±6 25 150 150 –55 to +150 Unit V V V mA mW °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate1 to source breakdown voltage Gate2 to source breakdown voltage Gate1 to source cutoff current Gate2 to source cutoff current Gate1 to source cutoff voltage Gate2 to source cutoff voltage Drain current Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Power gain Noise figure Symbol V(BR)DSS V(BR)G1SS V(BR)G2SS IG1SS IG2SS VG1S(off) VG2S(off) ID(op) |yfs| Ciss Coss Crss PG NF Min 6 +6 ±6 — — 0.4 0.4 10 15 2.2 0.9 — 22 — Typ — — — — — — — 15 20 3.0 1.2 0.018 26 1.3 Max — — — +100 ±100 1.0 1.0 20 — 3.9 1.6 0.04 — 1.9 Unit V V V nA nA V V mA mS pF pF pF dB dB Test conditions ID = 200 µA, VG1S = VG2S = 0 IG1 = +10 µA, VG2S = VDS = 0 IG2 = ±10 µA, VG1S = VDS = 0 VG1S = +5 V, VG2S = VDS = 0 VG2S = ±5 V, VG1S = VDS = 0 VDS = 5 V, VG2S = 4 V ID = 100 µA VDS = 5 V, VG1S = 5 V ID = 100 µA VDS = 5 V, VG1 = 5 V VG2S = 4 V, RG = 100 kΩ VDS = 5 V, VG1 = 5 V, VG2S =4 V RG = 100 kΩ, f = 1 kHz VDS = 5 V, VG1 = 5 V VG2S =4 V, RG = 100 kΩ f = 1 MHz VDS = 5 V, VG1 = 5 V, VG2S =4 V RG = 100 kΩ, f = 200 MHz Rev.3.00 Aug 10, 2005 page 2 of 7 BB301M Main Characteristics Test Circuit for Operating Items (ID(op) , |yfs|, Ciss, Coss, Crss, NF, PG) VG2 Gate 2 Gate 1 RG VG1 Drain A ID Source Equivalent Circuit Gate 2 Drain Gate 1 Source Application Circuit VAGC = 4 to 0.3 V BBFET VDS = 5 V RFC Output Input RG VGG = 5 V Rev.3.00 Aug 10, 2005 page 3 of 7 BB301M Maximum Channel Power Dissipation Curve Typical Output Characteristics 30 25 VG2S = 4 V VG1 = VDS 47 5k 68 6 k Ω kΩ Ω Channel Power Dissipation Pch (mW) 200 150 Drain Current ID (mA) 20 15 10 5 100 50 RG Ω k 82 k Ω 0 10 k Ω 20 k Ω 10 15 k Ω 180 0 kΩ = 22 0 50 100 150 200 0 1 2 3 4 5 Ambient Temperature Ta (°C) Drain to Source Voltage VDS (V) Drain Current vs. Gate2 to Source Voltage 25 Ω 68 k kΩ 47 Drain Current vs. Gate1 Voltage 20 VDS = 5 V R G = 82 kΩ V 56 k Ω Drain Current ID (mA) 15 120 k Ω 10 5 150 k Ω 180 k Ω R G = 220 k Ω VDS = VG1 = 5 V 3 8 4 VG2S = 1 V 0 1 2 3 4 5 0 1 2 3 4 V 100 k Ω Drain Current ID (mA) 20 82 k Ω 16 12 4 2V 5 Gate2 to Source Voltage VG2S (V) Gate1 Voltage VG1 (V) Drain Current vs. Gate1 Voltege 20 VDS = 5 V RG = 100 kΩ 20 Drain Current vs. Gate1 Voltege VDS = 5 V RG = 150 kΩ Drain Current ID (mA) 12 Drain Current ID (mA) 16 16 12 4V 3V 4 V 8 3 V 2V VG2S = 1 V 8 4 4 2V VG2S = 1 V 0 1 2 3 4 5 0 1 2 3 4 5 Gate1 Voltage VG1 (V) Gate1 Voltage VG1 (V) Rev.3.00 Aug 10, 2005 page 4 of 7 BB301M Forward Transfer Admittance vs. Gate1 Voltage Forward Transfer Admittance vs. Gate1 Voltage Forward Transfer Admittance |yfs| (mS) 30 25 20 15 10 5 VG2S = 1 V 0 1 2 3 4 5 2V VDS = 5 V RG = 82 kΩ f = 1 kHz Forward Transfer Admittance |yfs| (mS) 30 25 20 15 2V 10 5 VG2S = 1 V 0 1 2 3 4 5 VDS = 5 V RG = 100 kΩ f = 1 kHz 4V 3V 4V 3V Gate1 Voltage VG1 (V) Gate1 Voltage VG1 (V) Forward Transfer Admittance vs. Gate1 Voltage Power Gain vs. Gate Resistance 30 Forward Transfer Admittance |yfs| (mS) 20 VDS = 5 V RG = 150 kΩ f = 1 kHz 3V 2V Power Gain PG (dB) 16 4V 25 20 15 10 5 0 10 VDS = 5 V VG1 = 5 V VG2S = 4 V f = 200 MHz 20 50 100 200 500 1000 12 8 4 VG2S = 1 V 0 1 2 3 4 5 Gate1 Voltage VG1 (V) Gate Resistance RG (kΩ) Noise Figure vs. Gate Resistance 4 VDS = 5 V VG1= 5 V VG2S = 4 V f = 200 MHz 30 25 Power Gain vs. Drain Current Noise Figure NF (dB) Power Gain PG (dB) 3 20 15 10 5 VDS = 5 V VG1 = 5 V VG2S = 4 V RG = variable f = 200 MHz 5 10 15 20 25 30 2 1 0 10 20 50 100 200 500 1000 0 Gate Resistance RG (kΩ) Drain Current ID (mA) Rev.3.00 Aug 10, 2005 page 5 of 7 BB301M Noise Figure vs. Drain Current 4 VDS = 5 V VG1 = 5 V VG2S = 4 V RG = variable f = 200 MHz 30 25 Drain Current vs. Gate Resistance Noise Figure NF (dB) Drain Current ID (mA) 3 20 15 10 5 0 10 VDS = 5 V VG1 = 5 V VG2S = 4 V 20 50 100 200 500 1000 2 1 0 5 10 15 20 25 30 Drain Current ID (mA) Gate Resistance RG (kΩ) Input Capacitance vs. Gate2 to Source Voltage 4 Gain Reduction vs. Gate2 to Source Voltage 60 VDS = 5 V VG1 = 5 V VG2S = 4 V RG = 100 kΩ f = 200 MHz Gain Reduction GR (dB) 50 40 30 20 10 Input Capacitance Ciss (pF) 3 2 1 VDS = 5 V VG1 = 5 V RG = 100 kΩ f = 1 MHz 1 2 3 4 5 0 1 2 3 4 5 0 Gate2 to Source Voltage VG2S (V) Gate2 to Source Voltage VG2S (V) Rev.3.00 Aug 10, 2005 page 6 of 7 BB301M Package Dimensions JEITA Package Code SC-61AA RENESAS Code PLSP0004ZA-A Package Name MPAK-4 / MPAK-4V MASS[Typ.] 0.013g D e2 b1 B B e A Q c E HE Reference Symbol Dimension in Millimeters L A A xM S A b L1 A3 e2 LP e A2 A I1 b5 yS A1 S e1 b b2 c c1 c b1 b3 c1 I1 b4 A-A Section B-B Section Pattern of terminal position areas A A1 A2 A3 b b1 b2 b3 c c1 D E e e2 HE L L1 LP x y b4 b5 e1 I1 Q Min 1.0 0 1.0 0.35 0.55 Nom 0.1 2.7 1.35 1.1 0.25 0.42 0.62 0.4 0.6 0.13 0.11 1.5 0.95 0.85 2.8 Max 1.3 0.1 1.2 0.5 0.7 0.15 3.1 1.65 2.2 0.35 0.15 0.25 3.0 0.75 0.55 0.65 0.05 0.05 0.55 0.75 1.05 1.95 0.3 Ordering Information Part Name BB301MAW-TL-E Quantity 3000 Shipping Container φ 178 mm Reel, 8 mm Emboss Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.3.00 Aug 10, 2005 page 7 of 7 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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