BB305MEW-TL-E

BB305M Built in Biasing Circuit MOS FET IC UHF/VHF RF Amplifier REJ03G0829-0600 (Previous ADE-208-607D) Rev.6.00 Aug.10.2005 Features • • • • Built in Biasing Circuit; To reduce using parts cost & PC board space. Superior cross modulation characteristics. High gain; (PG = 28 dB typ. at f = 200 MHz) Wide supply voltage range; Applicable with 5V to 9V supply voltage. • Withstanding to ESD; Built in ESD absorbing diode. Withstand up to 200V at C=200pF, Rs=0 conditions. • Provide mini mold packages; MPAK-4(SOT-143Rmod) Outline RENESAS Package code: PLSP0004ZA-A (Package name: MPAK-4) 2 3 1 4 1. Source 2. Gate1 3. Gate2 4. Drain Notes: 1. Marking is “EW –”. 2. BB305M is individual type number of RENESAS BBFET. Rev.6.00 Aug 10, 2005 page 1 of 9 BB305M Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate1 to source voltage Gate2 to source voltage Drain current Channel power dissipation Channel temperature Storage temperature Symbol VDS VG1S VG2S ID Pch Tch Tstg Ratings 12 +10 –0 ±10 25 150 150 –55 to +150 Unit V V V mA mW °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate1 to source breakdown voltage Gate2 to source breakdown voltage Gate1 to source cutoff current Gate2 to source cutoff current Gate1 to source cutoff voltage Gate2 to source cutoff voltage Input capacitance Output capacitance Reverse transfer capacitance Drain current Symbol V(BR)DSS V(BR)G1SS V(BR)G2SS IG1SS IG2SS VG1S(off) VG2S(off) Ciss Coss Crss ID(op) 1 ID(op) 2 Forward transfer admittance |yfs|1 |yfs|2 Power gain PG1 PG2 Noise figure NF1 NF2 Min 12 +10 ±10 — — 0.4 0.4 2.3 1.1 — 10 — 23 — 24 — — — Typ — — — — — — — 2.8 1.5 0.017 15 13 28 28 28 28 1.4 1.4 Max — — — +100 ±100 1.0 1.0 3.5 1.9 0.04 20 — — — — — 1.9 — Unit V V V nA nA V V pF pF pF mA mA mS mS dB dB dB dB Test conditions ID = 200 µA, VG1S = VG2S = 0 IG1 = +10 µA, VG2S = VDS = 0 IG2 = ±10 µA, VG1S = VDS = 0 VG1S = +9 V, VG2S = VDS = 0 VG2S = ±9 V, VG1S = VDS = 0 VDS = 5 V, VG2S = 4 V ID = 100 µA VDS = 5 V, VG1S = 5 V ID = 100 µA VDS = 5 V, VG1 = 5 V VG2S =4 V, RG = 82 kΩ f = 1 MHz VDS = 5 V, VG1 = 5 V, VG2S = 4 V RG = 82 kΩ VDS = 9 V, VG1 = 9 V, VG2S = 6 V RG = 220 kΩ VDS = 5 V, VG1 = 5 V, VG2S = 4 V RG =82 kΩ, f = 1 kHz VDS = 9 V, VG1 = 9 V, VG2S = 6 V RG = 220 kΩ, f = 1 kHz VDS = 5 V, VG1 = 5 V, VG2S = 4 V RG = 82 kΩ, f = 200 MHz VDS = 9 V, VG1 = 9 V, VG2S = 6 V RG = 220 kΩ, f = 200 MHz VDS = 5 V, VG1 = 5 V, VG2S = 4 V RG = 82 kΩ, f = 200 MHz VDS = 9 V, VG1 = 9 V, VG2S = 6 V RG = 220 kΩ, f = 200 MHz Rev.6.00 Aug 10, 2005 page 2 of 9 BB305M Main Characteristics Test Circuit for Operating Items (ID(op) , |yfs|, Ciss, Coss, Crss, NF, PG) VG2 Gate 2 Gate 1 RG VG1 A ID Drain Source 200MHz Power Gain, Noise Figure Test Circuit VT 1000p VG2 1000p VT 1000p 47k Input(50Ω) 1000p 36p L1 1000p 47k BBFET L2 1000p 47k Output(50Ω) 10p max 1000p 1SV70 RG 82k RFC 1SV70 1000p VD = VG1 Unit : Resistance (Ω) Capacitance (F) L1 : φ1mm Enameled Copper Wire,Inside dia 10mm, 2Turns L2 : φ1mm Enameled Copper Wire,Inside dia 10mm, 2Turns RFC : φ1mm Enameled Copper Wire,Inside dia 5mm, 2Turns Rev.6.00 Aug 10, 2005 page 3 of 9 BB305M Maximum Channel Power Dissipation Curve Channel Power Dissipation Pch (mW) 200 25 47 kΩ kΩ Typical Output Characteristics VG2S = 4 V VG1 = VDS 150 Drain Current ID (mA) 20 15 100 10 50 5 RG = kΩ 68 Ω k 82 k Ω 0 10 k Ω 0 12 k Ω 150 k Ω 180 kΩ 220 0 50 100 150 200 0 1 2 3 4 56 5 Ambient Temperature Ta (°C) Drain to Source Voltage VDS (V) Drain Current vs. Gate2 to Source Voltage 25 VDS = VG1 = 5 V 47 k Ω 56 k Ω Drain Current vs. Gate1 Voltage 20 VDS = 5 V RG = 68 kΩ 16 Drain Current ID (mA) 20 15 68 k Ω 82 k Ω 100 k Ω 120 k Ω 150 k Ω 180 k Ω Drain Current ID (mA) 12 3V 8 4V 10 5 2V 4 VG2S = 1 V 1 2 3 4 5 RG = 220 kΩ 0 0.8 1.6 2.4 3.2 4.0 0 Gate2 to Source Voltage VG2S (V) Gate1 Voltage VG1 (V) Drain Current vs. Gate1 Voltege 20 VDS = 5 V RG = 82 kΩ 20 Drain Current vs. Gate1 Voltege 16 16 VDS = 5 V RG = 100 kΩ Drain Current ID (mA) Drain Current ID (mA) 12 3V 4V 12 4V 8 3V 2V VG2S = 1 V 0 1 2 3 4 5 8 2V 4 VG2S = 1 V 0 1 2 3 4 5 4 Gate1 Voltage VG1 (V) Gate1 Voltage VG1 (V) Rev.6.00 Aug 10, 2005 page 4 of 9 BB305M Forward Transfer Admittance vs. Gate1 Voltage Forward Transfer Admittance |yfs | (mS) Forward Transfer Admittance |yfs| (mS) 30 VDS = 5 V RG = 68 kΩ f = 1 kHz 4V 3V 18 2V 30 VDS = 5 V RG = 82 kΩ f = 1 kHz 4V 3V 18 2V Forward Transfer Admittance vs. Gate1 Voltage 24 24 12 12 6 VG2S = 1 V 0 1 2 3 4 5 6 VG2S = 1 V 0 1 2 3 4 5 Gate1 Voltage VG1 (V) Gate1 Voltage VG1 (V) Forward Transfer Admittance vs. Gate1 Voltage Forward Transfer Admittance |yfs| (mS) 30 VDS = 5 V RG = 100 kΩ f = 1 kHz 4V 3V 18 2V 40 35 30 25 20 15 10 10 Power Gain vs. Gate Resistance 12 Power Gain PG (dB) 24 6 V G2S = 1 V 0 1 2 3 4 5 VDS = 5 V VG1 = 5 V VG2S = 4 V f = 200 MHz 20 50 100 200 500 1000 Gate1 Voltage VG (V) Gate Resistance RG (kΩ) Noise Figure vs. Gate Resistance 4 40 VDS = 5 V VG1 = 5 V VG2S = 4 V f = 200 MHz 35 Power Gain vs. Drain Current Noise Figure NF (dB) 3 Power Gain PG (dB) 30 25 20 15 10 0 VDS = 5 V VG1 = 5 V VG2S = 4 V RG = variable f = 200 MHz 5 10 15 20 25 30 2 1 0 10 20 50 100 200 500 1000 Gate Resistance RG (kΩ) Drain Current ID (mA) Rev.6.00 Aug 10, 2005 page 5 of 9 BB305M Noise Figure vs. Drain Current 4 VDS = 5 V VG1 = 5 V VG2S = 4 V RG = variable f = 200 MHz 30 25 Drain Current vs. Gate Resistance Noise Figure NF (dB) 3 Drain Current ID (mA) 20 15 10 5 0 10 VDS = 5 V VG1 = 5 V VG2S = 4 V 20 50 100 200 500 1000 2 1 0 5 10 15 20 25 30 Drain Current ID (mA) Gate Resistance RG (kΩ) Gain Reduction vs. Gate2 to Source Voltage 60 6 VDS = 5 V VG1 = 5 V VG2S = 4 V RG = 82 kΩ f = 200 MHz Input Capacitance vs. Gate2 to Source Voltage Gain Reduction GR (dB) 50 40 30 20 10 Input Capacitance Ciss (pF) 5 4 3 2 1 0 0 1 2 3 4 5 VDS = 5 V VG1 = 5 V RG = 82 kΩ f = 1 MHz 0 1 2 3 4 5 Gate2 to Source Voltage VG2S (V) Gate2 to Source Voltage VG2S (V) Rev.6.00 Aug 10, 2005 page 6 of 9 BB305M S11 Parameter vs. Frequency .8 .6 .4 3 .2 4 5 10 0 .2 .4 .6 .8 1 1.5 2 3 45 10 –10 –.2 –5 –4 –3 –.4 –.6 –.8 –1.5 –2 –120° S21 Parameter vs. Frequency 90 ° 1 Scale: 1 / div. 6 0° 1.5 2 120° 150° 30 ° 180° 0° –150° –30° –60° –90° –1 Test Condition : VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 82 kΩ 50 to 1000 MHz (50 MHz step) Test Condition : VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 82 kΩ 50 to 1000 MHz (50 MHz step) S12 Parameter vs. Frequency 90° 120° S22 Parameter vs. Frequency .8 .6 .4 3 1 1.5 2 30 ° .2 Scale: 0.002 / div. 60 ° 150° 4 5 10 180° 0° 0 .2 .4 .6 .8 1 1.5 2 3 45 10 –10 –.2 –150° –30° –.4 –120° –5 –4 –3 –2 –.6 –.8 –1 –1.5 –60° –90° Test Condition : VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 82 kΩ 50 to 1000 MHz (50 MHz step) Test Condition : VDS = 5 V , VG1 = 5 V VG2S = 4 V , RG = 82 kΩ 50 to 1000 MHz (50 MHz step) Rev.6.00 Aug 10, 2005 page 7 of 9 BB305M S Parameter (VDS = VG1 = 5V, VG2S = 4V, RG = 82kΩ, Zo = 50Ω) f (MHz) 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 850 900 950 1000 S11 MAG. 0.991 0.991 0.982 0.975 0.972 0.956 0.942 0.928 0.920 0.906 0.894 0.880 0.868 0.854 0.842 0.835 0.820 0.802 0.801 0.789 ANG. –4.8 –9.9 –15.4 –20.7 –25.6 –30.6 –35.5 –40.1 –44.9 –49.2 –53.6 –57.8 –62.1 –66.2 –70.3 –73.9 –77.7 –81.5 –84.7 –87.9 MAG. 2.69 2.68 2.66 2.62 2.60 2.54 2.47 2.42 2.38 2.32 2.25 2.18 2.12 2.06 2.00 1.94 1.89 1.83 1.78 1.73 S21 ANG. 174.9 169.3 163.4 157.5 152.0 146.3 140.9 135.7 130.5 125.7 120.8 116.2 111.5 106.8 102.5 98.4 94.0 89.6 85.6 82.1 MAG. 0.00090 0.00153 0.00243 0.00293 0.00370 0.00444 0.00478 0.00535 0.00551 0.00549 0.00584 0.00542 0.00562 0.00509 0.00465 0.00427 0.00416 0.00289 0.00288 0.00241 S12 ANG. 91.4 90.5 73.8 74.9 70.1 69.0 63.7 64.8 56.8 58.6 54.4 53.3 49.5 48.6 49.7 51.6 53.3 57.9 72.9 78.9 MAG. 0.991 0.992 0.991 0.989 0.985 0.981 0.977 0.973 0.967 0.962 0.957 0.952 0.944 0.939 0.933 0.927 0.921 0.915 0.909 0.904 S22 ANG. –2.2 –4.8 –7.5 –9.9 –12.6 –15.0 –17.3 –19.7 –22.0 –24.5 –26.9 –29.2 –31.5 –33.8 –36.1 –38.3 –40.5 –42.7 –44.9 –47.1 Rev.6.00 Aug 10, 2005 page 8 of 9 BB305M Package Dimensions JEITA Package Code SC-61AA RENESAS Code PLSP0004ZA-A Package Name MPAK-4 / MPAK-4V MASS[Typ.] 0.013g D e2 b1 B B e A Q c E HE Reference Symbol Dimension in Millimeters L A A xM S A b L1 A3 e2 LP e A2 A I1 b5 yS A1 S e1 b b2 c c1 c b1 b3 c1 I1 b4 A-A Section B-B Section Pattern of terminal position areas A A1 A2 A3 b b1 b2 b3 c c1 D E e e2 HE L L1 LP x y b4 b5 e1 I1 Q Min 1.0 0 1.0 0.35 0.55 Nom 0.1 2.7 1.35 1.1 0.25 0.42 0.62 0.4 0.6 0.13 0.11 1.5 0.95 0.85 2.8 Max 1.3 0.1 1.2 0.5 0.7 0.15 3.1 1.65 2.2 0.35 0.15 0.25 3.0 0.75 0.55 0.65 0.05 0.05 0.55 0.75 1.05 1.95 0.3 Ordering Information Part Name BB305MEW-TL-E Quantity 3000 Shipping Container φ 178 mm Reel, 8 mm Emboss Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.6.00 Aug 10, 2005 page 9 of 9 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: (408) 382-7500, Fax: (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: (1628) 585-100, Fax: (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: 2265-6688, Fax: 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: (2) 2715-2888, Fax: (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: (21) 6472-1001, Fax: (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: 6213-0200, Fax: 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: 2-796-3115, Fax: 2-796-2145 http://www.renesas.com Renesas Technology Malaysia Sdn. Bhd. Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: 7955-9390, Fax: 7955-9510 © 2005. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .3.0