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EL5178IY

EL5178IY

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    TSSOP8

  • 描述:

    IC OPAMP DIFF 1 CIRCUIT 8MSOP

  • 数据手册
  • 价格&库存
EL5178IY 数据手册
DATASHEET EL5178, EL5378 FN7491 Rev 7.00 February 4, 2016 700MHz Differential Twisted-Pair Drivers The EL5178 and EL5378 are single and triple high bandwidth amplifiers with an output in differential form. They are primarily targeted for applications such as driving twisted-pair lines in component video applications. The inputs can be in either single-ended or differential form but the outputs are always in differential form. On the EL5178 and EL5378, two feedback inputs provide the user with the ability to set the gain of each device (stable at minimum gain of 2). The output common mode level for each channel is set by the associated REF pin, which has a -3dB bandwidth of over 110MHz. Generally, these pins are grounded but can be tied to any voltage reference. All outputs are short-circuit protected to withstand temporary overload condition. The EL5178 is available in 8 Ld MSOP and SOIC packages and EL5378 is available in a 28 Ld QSOP package. All are specified for operation over the full -40°C to +85°C temperature range. Features • Fully differential inputs, outputs, and feedback • Differential input range ±2.3V • 700MHz 3dB bandwidth • 1000V/µs slew rate • Low distortion at 5MHz and 20MHz • Single 5V or dual ±5V supplies • 60mA maximum output current • Low power - 12.5mA per channel • Pb-free (RoHS compliant) Applications • Twisted-pair driver • Differential line driver • VGA over twisted-pair • ADSL/HDSL driver • Single-ended to differential amplification • Transmission of analog signals in a noisy environment Pin Configurations EL5378 (28 LD QSOP) TOP VIEW EL5178 (8 LD MSOP, SOIC) TOP VIEW FBP 1 IN+ 2 + - ER G N FBN 4 O L NO REF 3 AI AV E B8 LOUT+ A L NC 1 7 VS- INP1 2 6 VS+ INN1 3 5 OUT- REF1 4 + - 27 FBP1 26 FBN1 25 OUT1B NC 5 24 VSP INP2 6 23 VSN INN2 7 22 OUT2 REF2 8 NC 9 + - 21 FBP2 20 FBN2 INP3 10 19 OUT2B INN3 11 18 OUT3 REF3 12 NC 13 EN 14 FN7491 Rev 7.00 February 4, 2016 28 OUT1 + - 17 FBP3 16 FBN3 15 OUT3B Page 1 of 18 EL5178, EL5378 Pin Descriptions EL5178 (NO LONGER AVAILABLE) EL5378 PIN NAME 17, 21, 27 FBP3, FBP2, FBP1 PIN FUNCTION Feedback from non-inverting outputs 2, 6, 10 INP1, INP2, INP3 Non-inverting inputs 3, 7, 11 INN1, INN2, INN3 Inverting inputs, note that on EL5178, this pin is also the REF pin 16, 20, 26 FBN3, FBN2, FBN1 Feedback from inverting outputs 15, 19, 25 OUT3B, OUT2B, OUT1B 24 VSP Positive supply 23 VSN Negative supply 18, 22, 28 OUT3, OUT2, OUT1 1, 5, 9, 13 NC No connect; grounded for best crosstalk performance 4, 8, 12 REF1, REF2, REF3 Reference inputs, sets common-mode output voltage 14 EN ENABLE 1 FBP Feedback from non-inverting output 2 IN+ Non-inverting input 3 REF Inverting input, note that on EL5178, this pin is also the REF pin 4 FBN Feedback from inverting output 5 OUT- Inverting output 6 VS+ Positive supply 7 VS- Negative supply 8 OUT+ Inverting outputs Non-inverting outputs Non-inverting output Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING TEMP RANGE (°C) PACKAGE (RoHS Compliant) PKG. DWG. # EL5178ISZ (No longer available, recommended replacement: EL5174ISZ) 5178ISZ -40 to +85 8 Ld SOIC (150 mil) M8.15E EL5178IYZ (No longer available, recommended replacement: EL5174ISZ) BBHAA -40 to +85 8 Ld MSOP (3.0mm) M8.118A EL5378IUZ EL5378IUZ -40 to +85 28 Ld QSOP (150 mil) M28.15 NOTES: 1. Add “-T13” suffix for 2.5k unit or “-T7” suffix for 1k unit Tape and Reel options. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for EL5178, EL5378. For more information on MSL please see tech brief TB363. FN7491 Rev 7.00 February 4, 2016 Page 2 of 18 EL5178, EL5378 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage (VS+ to VS-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V Supply Voltage Rate-of-Rise (dV/dT) . . . . . . . . . . . . . . . . . . . . . . . . . . 1V/µs Input Voltage (IN+, IN- to VS+, VS-) . . . . . . . . . . . . . VS- - 0.3V to VS+ + 0.3V Differential Input Voltage (IN+ to IN-). . . . . . . . . . . . . . . . . . . . . . . . . . ±4.8V Maximum Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60mA Input Current (all inputs and references). . . . . . . . . . . . . . . . . . . . . . . . 4mA ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300V Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+135°C Ambient Operating Temperature . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. Electrical Specifications VS+ = +5V, VS- = -5V, TA = +25°C, VIN = 0V, RLD = 1kΩ, CLD = 2.7pF, [RF = 604Ω, RG = 402Ω (EL5178)], [RF = 402Ω, RG = 274Ω (EL5378)], unless otherwise specified. PARAMETER DESCRIPTION TEST CONDITIONS MIN (Note 4) TYP MAX (Note 4) UNIT AC PERFORMANCE BW -3dB Bandwidth AV = 2, CLD = 2.7pF 700 MHz AV = 5, CLD = 2.7pF 80 MHz AV = 2, CLD = 2.7pF, RLD = 200Ω 320 MHz BW ±0.1dB Bandwidth AV = 2, CLD = 2.7pF 45 MHz SR Slew Rate, Differential (EL5178) VOUT = 3VP-P, 20% to 80% 650 850 V/µs Slew Rate, Differential (EL5378) VOUT = 3VP-P, 20% to 80% 650 1000 V/µs tSTL Settling Time to 0.1% VOUT = 2VP-P 35 ns tOVR Output Overdrive Recovery Time AV = 2 20 ns GBWP Gain Bandwidth Product 350 MHz VREFBW (-3dB) VREF -3dB Bandwidth (EL5378) CLD = 2.7pF 110 MHz VREFSR+ VREF Slew Rate - Rise (EL5378) VOUT = 2VP-P, 20% to 80% 134 V/µs VREFSR- VREF Slew Rate - Fall (EL5378) VOUT = 2VP-P, 20% to 80% 70 V/µs VN Input Voltage Noise At 10kHz 18 nV/Hz IN Input Current Noise At 10kHz 1.5 pA/Hz HD2 Second Harmonic Distortion VOUT = 2VP-P, 5MHz -83 dBc VOUT = 2VP-P, 20MHz -72 dBc HD3 Third Harmonic Distortion VOUT = 2VP-P, 5MHz -88 dBc VOUT = 2VP-P, 20MHz -70 dBc dG Differential Gain at 3.58MHz RLD = 300Ω, AV = 2 0.06 % d Differential Phase at 3.58MHz RLD = 300Ω, AV = 2 0.13 ° eS Channel Separation (EL5378) At F = 1MHz 90 dB INPUT CHARACTERISTICS VOS Input Referred Offset Voltage IIN Input Bias Current (VIN+, VIN-) IREF Input Bias Current (VREF) (EL5378) RIN Differential Input Resistance CIN Differential Input Capacitance DMIR Differential Mode Input Range (EL5378) FN7491 Rev 7.00 February 4, 2016 VREF = ±3.0V ±1.9 ±30 mV -20 -14 -7 µA 0.05 2.3 4 µA 150 kΩ 1 pF ±2.3 V Page 3 of 18 EL5178, EL5378 Electrical Specifications VS+ = +5V, VS- = -5V, TA = +25°C, VIN = 0V, RLD = 1kΩ, CLD = 2.7pF, [RF = 604Ω, RG = 402Ω (EL5178)], [RF = 402Ω, RG = 274Ω (EL5378)], unless otherwise specified. (Continued) PARAMETER DESCRIPTION TEST CONDITIONS CMIR+ Common-Mode Positive Input Range at VIN+, VIN- (EL5378) CMIR- Common-Mode Negative Input Range at VIN+, VIN- (EL5378) VREFIN + Positive Reference Input Voltage Range (EL5378) VIN+ = VIN- = 0V VREFIN - Negative Reference Input Voltage Range (EL5378) VIN+ = VIN- = 0V VREFOS Output Offset Relative to VREF (EL5378) CMRR Input Common-Mode Rejection Ratio MIN (Note 4) TYP 3.1 3.4 -4.4 VIN = ±2.5V 3.2 MAX (Note 4) UNIT V -4.1 3.7 V V -3.3 -3.2 V ±50 ±100 mV 65 78 dB V OUTPUT CHARACTERISTICS VOUT Output Voltage Swing RL = 1kΩ ±3.4 ±3.7 IOUT(Max) Maximum Output Current RL = 10Ω, VIN+ = ±3.2V ±50 ±60 ROUT Output Impedance ±100 130 mA mΩ SUPPLY VSUPPLY Supply Operating Range IS(ON) Power Supply Current - Per Channel IS(OFF)+ Positive Power Supply Current - Disabled (EL5378) IS(OFF)- Negative Power Supply Current - Disabled (EL5378) PSRR Power Supply Rejection Ratio VS+ to VS- 4.75 10 EN pin tied to 4.8V VS from ±4.5V to ±5.5V 11 V 12.5 14 mA 1.7 10 µA -200 -120 µA 60 75 dB ENABLE (EL5378 ONLY) tEN Enable Time 130 ns tDS Disable Time 1.2 µs VIH EN Pin Voltage for Power-Up VIL EN Pin Voltage for Shutdown IIH-EN EN Pin Input Current High At VEN = 5V IIL-EN EN Pin Input Current Low At VEN = 0V VS+ - 1.5 VS+ - 0.5 V 123 -20 V -8 200 µA µA NOTE: 4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. FN7491 Rev 7.00 February 4, 2016 Page 4 of 18 EL5178, EL5378 Typical Performance Curves 20 VS = ±5V 15 RLD = 1kΩ CLD = 0pF 10 RF = 422Ω RF = 1kΩ GAIN (dB) GAIN (dB) VS = ±5V RLD = 1k CLD = 0pF AV = 2 RF = 2kΩ RF = 422Ω 5 AV = 2 0 -5 AV = 5 -10 -15 100k 1M FIGURE 1. EL5178 FREQUENCY RESPONSE FOR VARIOUS RF 100M 1G FIGURE 2. EL5178 FREQUENCY RESPONSE FOR VARIOUS GAIN VS = ±5V RF = 422Ω CLD = 0pF AV = 2 CLD = 22pF CLD = 12pF RLD = 1kΩ GAIN (dB) GAIN (dB) VS = ±5V RLD = 200Ω RF = 422Ω AV = 2 10M FREQUENCY (Hz) FREQUENCY (Hz) CLD = 5.6pF RLD = 200Ω CLD = 0pF 100k 1M FREQUENCY (Hz) 100k 1M VS = ±5V RLD = 1kΩ CLD = 0pF AV = 2 VOPP = 200mV VOPP = 1V VOPP = 2V 10M 100M 1G FREQUENCY (Hz) FIGURE 5. EL5178 FREQUENCY RESPONSE FOR VARIOUS VOPP FN7491 Rev 7.00 February 4, 2016 100M 1G FIGURE 4. EL5178 FREQUENCY RESPONSE FOR VARIOUS RLD GAIN (dB) GAIN (dB) FIGURE 3. EL5178 FREQUENCY RESPONSE FOR VARIOUS CLD VS = ±5V RF = 422Ω RLD = 200Ω CLD = 5.6pF AV = 2 10M FREQUENCY (Hz) Rf = 422Ω Rf = 210Ω Rf = 154Ω 100k 1M 10M 100M 1G FREQUENCY (Hz) FIGURE 6. EL5378 FREQUENCY RESPONSE FOR VARIOUS RF Page 5 of 18 EL5178, EL5378 Typical Performance Curves 15 GAIN (dB) 10 VS = ±5V RLD = 1kΩ CLD = 0pF RF = 422Ω VS = ±5V RF = 422Ω RLD = 200Ω AV = 2 AV = 2 5 0 -5 CLD = 12pF CLD = 5.6pF GAIN (dB) 20 (Continued) CLD = 0pF AV = 5 -10 -15 100k 1M 10M 100M 1G 100k 1M FIGURE 7. EL5378 FREQUENCY RESPONSE FOR VARIOUS GAIN 1M 1G RLD = 1kΩ RLD = 200Ω 100k 100M FIGURE 8. EL5378 FREQUENCY RESPONSE FOR VARIOUS CLD CURRENT NOISE (pA/Hz) VOLTAGE NOISE (nV/Hz) GAIN (dB) VS = ±5V CLD = 0pF RF = 422Ω AV = 2 10M FREQUENCY (Hz) FREQUENCY (Hz) 10M 100M 1G EN IN 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 9. EL5378 FREQUENCY RESPONSE FOR VARIOUS RLD FIGURE 10. VOLTAGE AND CURRENT NOISE vs FREQUENCY VS = ±5V CMRR (dB) CMRR (dB) VS = ±5V PSRR+ PSRR- 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 11. CMRR vs FREQUENCY FN7491 Rev 7.00 February 4, 2016 1G 10k 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 12. DIFFERENTIAL PSRR vs FREQUENCY Page 6 of 18 EL5178, EL5378 Typical Performance Curves (Continued) OUTPUT IMPEDANCE () IMPEDANCE (Ω) 100 10 1 0.1 10k 100k 1M 10M 10k 100M 100k FREQUENCY (Hz) INPUT-TO-OUTPUT DELAY (ns) CHANNEL SEPARATION (dB) CH1 CH2 CH1 CH3 100k 1M 10M 100M tdFALL tdRISE 1G VIN(P-P) (V) FIGURE 16. INPUT-TO-OUTPUT DELAY FIGURE 15. CHANNEL SEPARATION vs FREQUENCY VS = ±5V RLD = 1kΩ CLD = 0pF RF = 422Ω F = 40MHz 6VOPP-DM) F = 20MHz THD (dB) THD (dB) 100M VS = ±5V RF = 422Ω AV = +2 FREQUENCY (Hz) VS = ±5V RLD = 1kΩ RF = 422Ω AV = 2 10M FIGURE 14. OUTPUT IMPEDANCE [DISABLED] FIGURE 13. OUTPUT IMPEDANCE vs FREQUENCY VS = ±5V RLD = 200Ω RF = 422Ω AV = 2 1M FREQUENCY (Hz) F = 10MHz 4VOPP-DM 2VOPP-DM F = 2.2MHz F = 5MHz VOPP-DM (V) FIGURE 17. TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT SWING FN7491 Rev 7.00 February 4, 2016 FREQUENCY (Hz) FIGURE 18. TOTAL HARMONIC DISTORTION vs FREQUENCY Page 7 of 18 EL5178, EL5378 Typical Performance Curves (Continued) VIN VIN 200mV/DIV 1V/DIV VOUT VOUT 5ns/DIV 10ns/DIV FIGURE 19. SMALL SIGNAL TRANSIENT RESPONSE 2V/DIV FIGURE 20. LARGE SIGNAL TRANSIENT RESPONSE VOUT EN 4V/DIV VOUT 2V/DIV EN 4V/DIV 400ns/DIV 100ns/DIV FIGURE 22. EL5378 DISABLED RESPONSE FIGURE 21. EL5378 ENABLED RESPONSE VS = ±5V RL = 50Ω VS = ±5V RL = 50Ω IP3 (dBm) IP3 (dBm) f1 FREQUENCY (Hz) FIGURE 23. IP3 vs FREQUENCY FN7491 Rev 7.00 February 4, 2016 f2 2f2-f1 2f1-f2 FREQUENCY (Hz) FIGURE 24. THIRD ORDER INTERCEPT POINT Page 8 of 18 EL5178, EL5378 VOUT SWING (V) +VOUT -VOUT (Continued) ± SUPPLY CURRENT (mA) Typical Performance Curves +IS -IS TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 26. ± SUPPLY CURRENT vs TEMPERATURE FIGURE 25. OUTPUT SWING vs TEMPERATURE VOS (mV) INPUT BIAS CURRENT (µA) VS = ±5.5V TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 28. INPUT BIAS CURRENT vs TEMPERATURE FIGURE 27. OFFSET VOLTAGE vs TEMPERATURE 1.4 SLEW RATE (V/µs) POWER DISSIPATION (W) VOUT = 3VP-P 1.2 1.263W FIGURE 29. SLEW RATE vs TEMPERATURE FN7491 Rev 7.00 February 4, 2016 QSOP28 JA = +99°C/W 1.0 781mW 0.8 SO8 JA = +160°C/W 607mW 0.6 MSOP8 JA = +206°C/W 0.4 0.2 0 TEMPERATURE (°C) JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Page 9 of 18 EL5178, EL5378 Typical Performance Curves 1.8 JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.6 POWER DISSIPATION (W) (Continued) 1.583W 1.4 QSOP28 JA = +79°C/W 1.2 1.136W 1.0 1.087W 0.8 MSOP8 JA = +115°C/W 0.6 SO8 JA = +110°C/W 0.4 0.2 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FN7491 Rev 7.00 February 4, 2016 Page 10 of 18 RF1 422Ω IN+ REF RG 845Ω RS2 50Ω RS2 50Ω CL1 5pF -5V 1 FBP OUT 8 2 INP VSN 7 3 REF VSP 6 4 FBN OUTB 5 OUT RLD 1kΩ +5V RF2 EL5178, EL5378 FN7491 Rev 7.00 February 4, 2016 Connection Diagrams CL2 5pF OUTB 422Ω FIGURE 32. EL5178 +5V 1 NC OUT1 28 INP1 2 INP1 FBP1 27 INN1 3 INN1 FBN1 26 REF1 4 REF1 OUT1B 25 5 NC VSP 24 INP2 6 INP2 VSN 23 INN2 7 INN2 OUT2 22 REF2 8 REF2 FBP2 21 9 NC FBN2 20 INP3 10 INP3 OUT2B 19 INN3 11 INN3 OUT3 18 12 REF3 FBP3 17 13 NC FBN3 16 14 EN OUT3B 15 REF3 Page 11 of 18 RSP1 50Ω RSN1 50Ω RSR1 50Ω RSP2 50Ω RSN2 50Ω RSR2 50Ω RSP3 50Ω RSN3 50Ω RSR3 50Ω ENABLE FIGURE 33. EL5378 RF -5V 422Ω RLD1 1kΩ RG 845Ω RF 422Ω RF 422Ω RG 845Ω RF 422Ω RF 422Ω RG 845Ω RF 422Ω RLD2 1kΩ RLD3 1kΩ CL1 CL1B CL2 CL2B CL3 CL3B 5pF 5pF 5pF 5pF 5pF 5pF EL5178, EL5378 Simplified Schematic VS+ R1 IN+ IN- R3 R2 FBP R4 R7 R8 FBN VB1 OUT+ RCD REF RCD VB2 CC OUT- R9 R10 CC R5 R6 VS- FIGURE 34. SIMPLIFIED SCHEMATIC Description of Operation and Application Information Product Description The EL5178 and EL5378 are wide bandwidth, low power and single/differential ended to differential output amplifiers. The EL5178 is a single channel differential amplifier. Since the IN- pin and REF pin are tied together internally, the EL5178 can be used as a single ended to differential converter. The EL5378 is a triple channel differential amplifier. The EL5378 has a separate IN- pin and REF pin for each channel. It can be used as single/differential ended to differential converter. The EL5178 and EL5378 are internally compensated for closed loop gain of 2 or greater. Connected in gain of 2 and driving a 1kΩ differential load, the EL5178 and EL5378 have a -3dB bandwidth of 700MHz. Driving a 200Ω differential load at gain of 2, the bandwidth is about 320MHz. The EL5378 is available with a power-down feature to reduce the power while the amplifier is disabled. Input, Output and Supply Voltage Range The EL5178 and EL5378 have been designed to operate with a single supply voltage of 5V to 10V or split supplies with its total voltage from 5V to 10V. The amplifiers have an input common mode voltage range from -4.3V to 3.4V for ±5V supply. The differential mode input range (DMIR) between the two inputs is from -2.3V to +2.3V. The input voltage range at the REF pin is from -3.3V to 3.7V. If the input common mode or differential mode signal is outside the above-specified ranges, it will cause the output signal to become distorted. The output of the EL5178 and EL5378 can swing from -3.8V to +3.8V at 1kΩ differential load at ±5V supply. As the load resistance becomes lower, the output swing is reduced. Differential and Common-Mode Gain Settings the common mode signal and also part of the differential mode signal. For the true balance differential outputs, the REF pin must be tied to the same bias level as the IN+ pin. For a ±5V supply, just tie the REF pin to GND if the IN+ pin is biased at 0V with a 50Ω or 75Ω termination resistor. For a single supply application, if the IN+ is biased to half of the rail, the REF pin should also be biased to half of the rail. The gain setting for EL5178 is expressed in Equation 1: R F1 + R F2  V ODM = V IN +   1 + ---------------------------- RG   V OCM = V REF = 0V 2R F  V ODM = V IN +   1 + ----------- RG   (EQ. 1) Where: VREF = 0V RF1 = RF2 = RF EL5378 has a separate IN- pin and REF pin. It can be used as a single/differential ended to differential converter. The voltage applied at REF pin can set the output common mode voltage and the gain is one. The gain setting for EL5378 is expressed in Equation 2: R F1 + R F2  V ODM =  V IN + – V IN -    1 + ---------------------------- RG   2R F  V ODM =  V IN + – V IN -    1 + ----------- RG   (EQ. 2) V OCM = V REF Where: RF1 = RF2 = RF For EL5178, since the IN- pin and REF pin are bonded together as the REF pin in an 8 Ld package, the signal at the REF pin is part of FN7491 Rev 7.00 February 4, 2016 Page 12 of 18 EL5178, EL5378 Disable/Power-Down (for EL5378 only) RF1 The EL5378 can be disabled and its outputs placed in a high impedance state. The turn-off time is about 1.2µs and the turn-on time is about 130ns. When disabled, the amplifier's supply current is reduced to 1.7µA for IS+ and 120µA for IStypically, thereby effectively eliminating the power consumption. The amplifier's power-down can be controlled by standard CMOS signal levels at the EN pin. The applied logic signal is relative to the VS+ pin. Letting the EN pin float or applying a signal that is less than 1.5V below VS+ will enable the amplifier. The amplifier will be disabled when the signal at the EN pin is above VS+ - 0.5V. FBP VIN+ VIN- RG VREF V O+ IN+ INREF V O- FBN RF2 Output Drive Capability FIGURE 35. Choice of Feedback Resistor and Gain Bandwidth Product The feedback resistor forms a pole with the parasitic capacitance at the inverting input. As this pole becomes smaller, the amplifier's phase margin is reduced. This causes ringing in the time domain and peaking in the frequency domain. Therefore, RF has some maximum value that should not be exceeded for optimum performance. If a large value of RF must be used, a small capacitor in the few Pico farad range in parallel with RF can help to reduce the ringing and peaking at the expense of reducing the bandwidth. The bandwidth of the EL5178 and EL5378 depends on the load and the feedback network. RF and RG appear in parallel with the load. As this combination gets smaller, the bandwidth falls off. Consequently, RF also has a minimum value that should not be exceeded for optimum bandwidth performance. For the gains other than 1, optimum response is obtained with RF between 500Ω to 1kΩ. The EL5178 and EL5378 have a gain bandwidth product of 350MHz for RLD = 1kΩ. For gains 5, its bandwidth can be predicted by Equation 3: Gain  BW = 300MHz (EQ. 3) Driving Capacitive Loads and Cables The EL5178 and EL5378 can drive a 23pF differential capacitor in parallel with 200Ω differential load with less than 5dB of peaking at gain of 2. If less peaking is desired in applications, a small series resistor (usually between 5Ω to 50Ω) can be placed in series with each output to eliminate most peaking. However, this will reduce the gain slightly. If the gain setting is greater than 2, the gain resistor RG can then be chosen to make up for any gain loss, which may be created by the additional series resistor at the output. When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, a back-termination series resistor at the amplifier's output will isolate the amplifier from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. Again, a small series resistor at the output can help to reduce peaking. The EL5178 and EL5378 have internal short-circuit protection. Its typical short-circuit current is ±60mA. If the output is shorted indefinitely, the power dissipation could easily increase such that the part will be destroyed. Maximum reliability is maintained if the output current never exceeds ±60mA. This limit is set by the design of the internal metal interconnections. Power Dissipation With the high output drive capability of the EL5178 and EL5378, it is possible to exceed the +135°C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if the load conditions or package types need to be modified for the amplifier to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to Equation 4: T JMAX – T AMAX PD MAX = -------------------------------------------- JA (EQ. 4) Where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature JA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or as expressed in Equation 5: V O  PD = i   V STOT  I SMAX +  V STOT – V O   ------------ R LD   (EQ. 5) Where: VSTOT = Total supply voltage = VS+ - VSISMAX = Maximum quiescent supply current per channel VO = Maximum differential output voltage of the application RLD = Differential load resistance ILOAD = Load current i = Number of channels by setting the two PDMAX equations equal to each other, we can solve the output current and RLD to avoid the device overheat. FN7491 Rev 7.00 February 4, 2016 Page 13 of 18 EL5178, EL5378 Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail. For good AC performance, parasitic capacitance should be kept to a minimum. Use of wire-wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces. As the signal is transmitted through a cable, the high frequency signal will be attenuated. One way to compensate this loss is to boost the high frequency gain at the receiver side. Typical Applications RF FBP 50 TWISTED PAIR IN+ IN+ RT RG INREF EL5178/ EL5378 50 IN- ZO = 100Ω FBN EL5175/ EL5375 VO REF RF RFR RGR FIGURE 36. TWISTED PAIR CABLE RECEIVER RF GAIN (dB) FBP RT 75 RGC RG CL VO+ IN+ INREF VO- FBN RF fL 2R F DC Gain = 1 + ----------RG 1 f L  ------------------------2R G C C 2R F  HF Gain = 1 + -------------------------R G  R GC 1 f H  ----------------------------2R GC C C fH FREQUENCY FIGURE 37. TRANSMIT EQUALIZER FN7491 Rev 7.00 February 4, 2016 Page 14 of 18 EL5178, EL5378 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION CHANGE February 4, 2016 FN7491.7 Added "No longer available" across the 5178 pinout on page 1. Updated “Ordering Information” on page 2 by adding Temp Range column and updating tape and reel note to show options. Added "No longer available" under the "EL5178" header of “Pin Descriptions” on page 2. Changed "gain of 1" to "gain of 2"1st paragraph under “Product Description” on page 12. Changed "bounded" to "bonded".in 1st sentence under “Differential and Common-Mode Gain Settings” on page 12. Deleted from 1st and 2nd paragraph in “Choice of Feedback Resistor and Gain Bandwidth Product” on page 13 "For gains greater than 1," and "for gains other than 1" August 19, 2015 FN7491.6 Updated Ordering Information table on page 2. Added Revision History and About Intersil sections. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support FN7491 Rev 7.00 February 4, 2016 Page 15 of 18 EL5178, EL5378 Package Outline Drawing M8.15E 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09 4 4.90 ± 0.10 A DETAIL "A" 0.22 ± 0.03 B 6.0 ± 0.20 3.90 ± 0.10 4 PIN NO.1 ID MARK 5 (0.35) x 45° 4° ± 4° 0.43 ± 0.076 1.27 0.25 M C A B SIDE VIEW “B” TOP VIEW 1.75 MAX 1.45 ± 0.1 0.25 GAUGE PLANE C SEATING PLANE 0.10 C 0.175 ± 0.075 SIDE VIEW “A 0.63 ±0.23 DETAIL "A" (1.27) (0.60) NOTES: (1.50) (5.40) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. The pin #1 identifier may be either a mold or mark feature. 6. Reference to JEDEC MS-012. TYPICAL RECOMMENDED LAND PATTERN FN7491 Rev 7.00 February 4, 2016 Page 16 of 18 EL5178, EL5378 Package Outline Drawing M8.118A 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP) Rev 0, 9/09 3.0±0.1 8 A 0.25 CAB 3.0±0.1 4.9±0.15 DETAIL "X" 1.10 Max PIN# 1 ID B SIDE VIEW 2 1 0.18 ± 0.05 2 0.65 BSC TOP VIEW 0.95 BSC 0.86±0.09 H GAUGE PLANE C 0.25 SEATING PLANE 0.33 +0.07/ -0.08 0.08 C A B 0.10 ± 0.05 3°±3° 0.10 C 0.55 ± 0.15 DETAIL "X" SIDE VIEW 1 5.80 NOTES: 4.40 3.00 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSE Y14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. 4. Plastic interlead protrusions of 0.25mm max per side are not included. 5. Dimensions “D” and “E1” are measured at Datum Plane “H”. 6. This replaces existing drawing # MDP0043 MSOP 8L. 0.65 0.40 1.40 TYPICAL RECOMMENDED LAND PATTERN FN7491 Rev 7.00 February 4, 2016 Page 17 of 18 EL5178, EL5378 Shrink Small Outline Plastic Packages (SSOP) Quarter Size Outline Plastic Packages (QSOP) M28.15 N INDEX AREA H 0.25(0.010) M E GAUGE PLANE -B1 2 INCHES 3 0.25 0.010 SEATING PLANE -A- 28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE (0.150” WIDEBODY) B M A D h x 45° -C- e 0.17(0.007) M  A2 A1 B L C 0.10(0.004) C A M SYMBOL MIN MAX MIN MAX NOTES A 0.053 0.069 1.35 1.75 - A1 0.004 0.010 0.10 0.25 - A2 - 0.061 - 1.54 - B 0.008 0.012 0.20 0.30 9 C 0.007 0.010 0.18 0.25 - D 0.386 0.394 9.81 10.00 3 E 0.150 0.157 3.81 3.98 4 e NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 0.025 BSC 0.635 BSC - 0.228 0.244 5.80 6.19 - h 0.0099 0.0196 0.26 0.49 5 L 0.016 0.050 0.41 1.27 6 8° 0° H B S MILLIMETERS N  28 0° 28 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 7 8° Rev. 1 6/04 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.10mm (0.004 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: INCHES. Converted millimeter dimensions are not necessarily exact. © Copyright Intersil Americas LLC 2004-2016. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN7491 Rev 7.00 February 4, 2016 Page 18 of 18
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