DATASHEET
EL8171, EL8172
FN6293
Rev 6.00
October 9, 2015
Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers
The EL8171 and EL8172 are micropower instrumentation
amplifiers optimized for single supply operation over the
+2.4V to +5.5V range. Inputs and outputs can operate
rail-to-rail. As with all instrumentation amplifiers, a pair of
inputs provide very high common-mode rejection and are
completely independent from a pair of feedback terminals.
The feedback terminals allow zero input to be translated to
any output offset, including ground. A feedback divider
controls the overall gain of the amplifier.
Features
The EL8172 is compensated for a gain of 100 or more, and
the EL8171 is compensated for a gain of 10 or more. The
EL8171 and EL8172 have PMOS input devices that provide
sub-nA input bias currents.
• 170kHz -3dB bandwidth (G = 100)
The amplifiers can be operated from one lithium cell or two
Ni-Cd batteries. The EL8171 and EL8172 input range goes
from below ground to slightly above positive rail. The output
stage swings completely to ground (ground sensing) or
positive supply - no pull-up or pull-down resistors are
needed.
• 95µA maximum supply current
• Maximum input offset voltage
- 300µV (EL8172)
- 1500µV (EL8171)
• 50pA maximum input bias current
• 450kHz -3dB bandwidth (G = 10)
• Single supply operation
- Input voltage range is rail-to-rail
- Output swings rail-to-rail
- Ground sensing
• Pb-free (RoHS compliant)
Applications
• Battery- or solar-powered systems
• Strain gauges
Pinout
EL8171, EL8172
(8 LD SOIC)
TOP VIEW
DNC 1
IN- 2
IN+ 3
V- 4
+
+
8 FB+
7 V+
6 VOUT
5 FB-
• Current monitors
• Thermocouple amplifiers
Ordering Information
PART
NUMBER
(Note)
PART
MARKING
PACKAGE
(Pb-free)
PKG.
DWG. #
EL8171FSZ*(No 8171FSZ
longer available,
recommended
replacement:
EL8170FSZ-T7)
8 Ld SOIC
MDP0027
EL8172FSZ*
8 Ld SOIC
MDP0027
8172FSZ
*Add “-T7” suffix for tape and reel. Please refer to TB347 for details
on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
FN6293 Rev 6.00
October 9, 2015
Page 1 of 14
EL8171, EL8172
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage, V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage (EL8172) . . . . . . . . . . . . . . . . . . . . . . 0.5V
Differential Input Voltage (EL8171) . . . . . . . . . . . . . . . . . . . . . . 1.0V
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Thermal Resistance
JA (°C/W)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
122
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature . . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
V+ = +5V, V- = GND, VCM = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. Boldface limits apply
over the operating temperature range, -40°C to +125°C.
DESCRIPTION
CONDITIONS
MIN
(Note 1)
TYP
MAX
(Note 1)
UNIT
DC SPECIFICATIONS
VOS
TCVOS
Input Offset Voltage
Input Offset Voltage Temperature
Coefficient
EL8171
-1.5
-2
±0.47
1.5
2
mV
EL8172
-0.3
-0.7
±0.07
0.3
0.7
mV
EL8171
1.5
µV/°C
EL8172
0.14
µV/°C
IOS
Input Offset Current, ± IN, ± FB
-25
-500
±4
25
500
pA
pA
IB
Input Bias Current
-50
-4
±10
50
4
pA
nA
VIN
Input Voltage Range
Guaranteed by CMRR test
0
5
V
CMRR
Common Mode Rejection Ratio
VCM = 0V to +5V
75
100
dB
PSRR
Power Supply Rejection Ratio
EL8171, V+ = 2.4V to 5V
75
90
dB
EL8172, V+ = 2.4V to 5V
75
100
dB
EL8171, RL = 100k to 2.5V
-0.7
±0.15
0.7
%
EL8172, RL = 100k to 2.5V
-1
-1.5
±0.2
+1
1.5
%
%
4
10
10
mV
mV
0.13
0.2
0.25
V
V
EG
VOUT
Gain Error
Maximum Voltage Swing
Output low, 100k to 2.5V
Output low, 1k to 2.5V
Output high, 100k to 2.5V
4.985
4.980
4.996
V
V
Output high, 1k to GND
4.860
4.750
4.87
V
V
45
38
65
IS
Supply Current
VSUPPLY
Supply Operating Range
V+ to V-
2.4
IO+
Output Source Current into 10 to V+/2 V+ = 5V
23
19
32
mA
6
4.5
8
mA
V+ = 2.4V
FN6293 Rev 6.00
October 9, 2015
95
110
µA
5.5
V
Page 2 of 14
EL8171, EL8172
Electrical Specifications
PARAMETER
IO-
V+ = +5V, V- = GND, VCM = 1/2V+, RL = Open, TA = +25°C, unless otherwise specified. Boldface limits apply
over the operating temperature range, -40°C to +125°C. (Continued)
DESCRIPTION
Output Sink Current into 10 to V+/2
CONDITIONS
MIN
(Note 1)
TYP
MAX
(Note 1)
UNIT
V+ = 5V
19
15
26
mA
V+ = 2.4V
5
4
7
mA
Gain = 10V/V
450
kHz
Gain = 20
210
kHz
Gain = 50
66
kHz
Gain = 100
33
kHz
Gain = 100
170
kHz
Gain = 200
70
kHz
Gain = 500
25
kHz
Gain = 1000
12
kHz
f = 0.1Hz to 10Hz
14
µVP-P
10
µVP-P
220
nV/Hz
EL8172
80
nV/Hz
EL8171, fo = 1kHz
0.9
pA/Hz
EL8172, fo = 1kHz
0.2
pA/Hz
EL8171
85
dB
100
dB
90
dB
92
dB
97
dB
92
dB
AC SPECIFICATIONS
-3dB BW
-3dB Bandwidth
EL8171
EL8172
eN
Input Noise Voltage
EL8171
EL8172
Input Noise Voltage Density
iN
Input Noise Current Density
CMRR @ 60Hz Input Common Mode Rejection Ratio
EL8171
EL8172
PSRR+ @
120Hz
Power Supply Rejection Ratio (V+)
PSRR- @
120Hz
Power Supply Rejection Ratio (V-)
EL8171
EL8172
EL8171
EL8172
fo = 1kHz
VCM = 1VPP,
RL = 10kto VCM
V+, V- = ±2.5V,
VSOURCE = 1VPP,
RL = 10kto VCM
V+, V- = ±2.5V,
VSOURCE = 1VPP,
RL = 10kto VCM
TRANSIENT RESPONSE
SR
Slew Rate
RL = 1k to GND
0.4
0.35
0.55
0.7
0.7
V/µs
NOTES:
1. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
FN6293 Rev 6.00
October 9, 2015
Page 3 of 14
EL8171, EL8172
Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, unless otherwise specified.
70
GAIN = 1000
60
GAIN (dB)
GAIN (dB)
GAIN = 200
GAIN = 100
40
GAIN = 50
30
GAIN = 10
1
10
GAIN = 5,000
70
GAIN = 2,000
GAIN = 1,000
60
GAIN = 500
50
GAIN = 20
20
COMMON-MODE INPUT = 1/2V+
GAIN = 10,000
80
GAIN = 500
50
10
90
COMMON-MODE INPUT = 1/2V+
GAIN = 200
GAIN = 100
40
100
1k
10k
FREQUENCY (Hz)
100k
30
1M
FIGURE 1. EL8171 FREQUENCY RESPONSE vs CLOSED
LOOP GAIN
1
10
100
1k
10k
FREQUENCY (Hz)
100k
FIGURE 2. EL8172 FREQUENCY RESPONSE vs CLOSED
LOOP GAIN
25
45
40
V+ = 5V
35
V+ = 5V
30
15
5
0
GAIN (dB)
GAIN (dB)
20
10
1M
V+ = 2.4V
AV = 10
RL = 10k
CL = 10pF
RF/RG = 10
RF = 1k
RG = 100
10
100
20
15
10
5
1k
10k
100k
V+ = 2.4V
25
0
1M
AV = 100
RL = 10k
CL = 10pF
RF/RG = 100
RF = 10k
RG = 100
10
100
FREQUENCY (Hz)
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 3. EL8171 FREQUENCY RESPONSE vs SUPPLY
VOLTAGE
25
FIGURE 4. EL8172 FREQUENCY RESPONSE vs SUPPLY
VOLTAGE
50
820pF
470pF
220pF
5
100pF
AV = 10
R = 10k
CL = 10pF
RF/RG = 10
RF = 10k
RG = 100
10
100
40
35
30
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 5. EL8171 FREQUENCY RESPONSE vs CLOAD
FN6293 Rev 6.00
October 9, 2015
GAIN (dB)
GAIN (dB)
1200pF
15
10
2200pF
45
20
25
820pF
56pF
AV = 10
R = 10k
CL = 10pF
RF/RG = 10
RF = 10k
RG = 100
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 6. EL8172 FREQUENCY RESPONSE vs CLOAD
Page 4 of 14
EL8171, EL8172
Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
120
90
80
100
70
CMRR (dB)
CMRR (dB)
60
50
40
AV = 10
30
20
10
80
60
AV = 100
40
20
0
-10
10
100
1k
10k
100k
0
10
1M
100
FREQUENCY (Hz)
120
120
100
100
PSRR (dB)
PSRR (dB)
80
PSRR+
60
PSRR40
AV = 10
1M
PSRR+
60
PSRR40
20
10
100
1k
10k
100k
0
10
1M
100
FREQUENCY (Hz)
10k
100k
1M
FIGURE 10. EL8172 PSRR vs FREQUENCY
1400
INPUT VOLTAGE NOISE (nV/Hz)
700
1200
1000
800
600
AV = 10
400
200
0
1k
FREQUENCY (Hz)
FIGURE 9. EL8171 PSRR vs FREQUENCY
INPUT VOLTAGE NOISE (nV/Hz)
100k
AV = 10
20
0
10k
FIGURE 8. EL8172 CMRR vs FREQUENCY
FIGURE 7. EL8171 CMRR vs FREQUENCY
80
1k
FREQUENCY (Hz)
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 11. EL8171 VOLTAGE NOISE SPECTRAL DENSITY
FN6293 Rev 6.00
October 9, 2015
600
500
400
300
AV = 100
200
100
0
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 12. EL8172 VOLTAGE NOISE SPECTRAL DENSITY
Page 5 of 14
EL8171, EL8172
Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
2.0
6
CURRENT NOISE (pA/Hz)
CURRENT NOISE (pA/Hz)
1.8
5
4
3
2
AV = 10
1
0
1
10
100
1k
10k
1.6
1.4
1.2
1.0
0.8
AV = 100
0.6
0.4
0.2
0.0
100k
1
10
100
FREQUENCY (Hz)
100k
FIGURE 14. EL8172 CURRENT NOISE SPECTRAL DENSITY
VOLTAGE NOISE (5µV/DIV)
VOLTAGE NOISE (2µV/DIV)
FIGURE 13. EL8171 CURRENT NOISE SPECTRAL DENSITY
TIME (1s/DIV)
TIME (1s/DIV)
FIGURE 15. EL8171 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
(GAIN = 10)
90
N = 1000
75
85
MAX
70
65
MEDIAN
60
55
MIN
50
45
40
-40
FIGURE 16. EL8172 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
(GAIN = 100)
SUPPLY CURRENT (A)
80
SUPPLY CURRENT (A)
10k
1k
FREQUENCY (Hz)
N = 1500
80
MAX
75
70
MEDIAN
65
60
MIN
55
50
45
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 17. EL8171 SUPPLY CURRENT vs TEMPERATURE,
V+, V- = ±2.5V, VIN = 0V
FN6293 Rev 6.00
October 9, 2015
40
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 18. EL8172 SUPPLY CURRENT vs TEMPERATURE,
V+, V- = ±2.5V, VIN = 0V
Page 6 of 14
EL8171, EL8172
Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
2.5
0.7
N = 1000
2.0
1.5
MAX
VOS (µV)
VOS (µV)
0.5
MAX
0.3
1.0
MEDIAN
0
-0.5
0.1
MEDIAN
-0.1
-0.3
-1.0
MIN
-0.5
-1.5
-2.0
N = 1500
0.5
MIN
-40
-20
0
20
40
60
80
100
-0.7
120
-40
-20
0
TEMPERATURE (°C)
FIGURE 19. EL8171 VOS vs TEMPERATURE, V+, V- = ±2.5V,
VIN = 0V
2.5
80
100
120
N = 1500
0.7
MAX
0.5
0.5
VOS (µV)
1.0
VOS (µV)
60
0.9
1.5
MEDIAN
0
-0.5
-1.0
MAX
0.3
0.1
MEDIAN
-0.1
-0.3
-1.5
MIN
MIN
-0.5
-2.0
-2.5
-0.7
-40
-20
0
20
40
60
80
100
120
-40
-20
0
TEMPERATURE (°C)
40
60
80
100
120
FIGURE 22. EL8172 VOS vs TEMPERATURE, V+, V- = ±1.2V,
VIN = 0V
140
140
N = 1500
N = 1000
MAX
130
CMRR (dB)
110
MEDIAN
100
MAX
130
120
120
110
MEDIAN
100
90
90
80
-40
20
TEMPERATURE (°C)
FIGURE 21. EL8171 VOS vs TEMPERATURE, V+, V- = ±1.2V,
VIN = 0V
CMRR (dB)
40
FIGURE 20. EL8172 VOS vs TEMPERATURE, V+, V- = ±2.5V,
VIN = 0V
N = 1000
2.0
20
TEMPERATURE (°C)
MIN
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 23. EL8171 CMRR vs TEMPERATURE,
VCM = +2.5V TO -2.5V, V+, V- = ±2.5V
FN6293 Rev 6.00
October 9, 2015
120
80
-40
MIN
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 24. EL8172 CMRR vs TEMPERATURE,
VCM = +2.5V TO -2.5V, V+, V- = ±2.5V
Page 7 of 14
EL8171, EL8172
Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
140
140
N = 1000
MAX
120
120
110
110
100
MEDIAN
90
MAX
MEDIAN
100
90
MIN
80
80
MIN
70
60
N = 1500
130
PSRR (dB)
PSRR (dB)
130
-40
-20
0
20
70
40
60
80
100
60
120
-40
-20
0
20
FIGURE 25. EL8171 PSRR vs TEMPERATURE,
V+, V- = ±1.2V TO ±2.5V
0.7
1.5
N = 1000
GAIN ERROR (%)
GAIN ERROR (%)
MAX
0.4
0.3
0.2
MEDIAN
0.1
0
MIN
-20
0
20
40
60
80
TEMPERATURE (°C)
100
100
120
N = 1500
MAX
0.9
0.7
0.5
0.3
MEDIAN
MIN
-20
0
20
40
60
80
TEMPERATURE (°C)
FIGURE 28. EL8172% GAIN ERROR vs TEMPERATURE,
RL = 100k
4.91
N = 1000
4.90
4.89
4.88
4.87
MEDIAN
4.85
N = 1500
4.89
MAX
VOUT (V)
VOUT (V)
120
1.1
-0.1
-40
120
4.90
4.88
MAX
4.87
4.86
MEDIAN
4.85
MIN
MIN
4.84
4.84
4.83
-40
100
0.1
FIGURE 27. EL8171% GAIN ERROR vs TEMPERATURE,
RL = 100k
4.86
80
1.3
0.5
4.91
60
FIGURE 26. EL8172 PSRR vs TEMPERATURE,
V+, V- = ±1.2V TO ±2.5V
0.6
-0.1
-40
40
TEMPERATURE (°C)
TEMPERATURE (°C)
-20
0
20
40
60
80
TEMPERATURE (°C)
100
FIGURE 29. EL8171 VOUT HIGH vs TEMPERATURE,
RL = 1k, V+, V- = ±2.5V
FN6293 Rev 6.00
October 9, 2015
120
4.83
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 30. EL8172 VOUT HIGH vs TEMPERATURE,
RL = 1k, V+, V- = ±2.5V
Page 8 of 14
EL8171, EL8172
Typical Performance Curves V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, unless otherwise specified. (Continued)
180
200
N = 1000
180
160
VOUT (mV)
VOUT (mV)
MAX
160
MEDIAN
140
120
MIN
MAX
150
140
MEDIAN
130
MIN
120
110
100
80
-40
N = 1000
170
100
-20
0
20
40
60
80
100
90
-40
120
-20
0
TEMPERATURE (°C)
0.65
0.60
MAX
+SLEW RATE (V/µs)
+SLEW RATE (V/µs)
0.58
N = 1000
0.55
MEDIAN
0.50
0.45
MIN
0.40
0.35
0.30
-40
-20
0
MAX
N = 1500
0.56
0.54
0.52
MEDIAN
0.50
0.48
0.46
MIN
0.44
20
40
60
80
TEMPERATURE (°C)
100
0.40
-40
120
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 34. EL8172 +SLEW RATE vs TEMPERATURE,
INPUT = ±0.015V @ GAIN + 100
0.65
N = 1000
MAX
0.65
N = 1500
MAX
0.60
0.60
-SLEW RATE (V/µS)
- SLEW RATE (V/µS)
120
0.42
FIGURE 33. EL8171 +SLEW RATE vs TEMPERATURE,
INPUT = ±0.015V @ GAIN + 100
0.70
100
FIGURE 32. EL8172 VOUT LOW vs TEMPERATURE,
RL = 1k, V+, V- = ±2.5V
FIGURE 31. EL8171 VOUT LOW vs TEMPERATURE,
RL = 1k, V+, V- = ±2.5V
0.60
20
40
60
80
TEMPERATURE (°C)
MEDIAN
0.55
0.50
0.45
MIN
0.40
0.55
MEDIAN
0.50
0.45
MIN
0.35
0.30
-40
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 35. EL8171 -SLEW RATE vs TEMPERATURE,
INPUT = ±0.015V @ GAIN + 100
FN6293 Rev 6.00
October 9, 2015
120
0.40
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 36. EL8172 -SLEW RATE vs TEMPERATURE,
INPUT = ±0.015V @ GAIN + 100
Page 9 of 14
EL8171, EL8172
Pin Descriptions
EL8171/EL8172
PIN NAME
EQUIVALENT CIRCUIT
PIN FUNCTION
1
DNC
2
IN-
Circuit 1A, Circuit 1B
3
IN+
Circuit 1A, Circuit 1B
4
V-
Circuit 3
5
FB-
Circuit 1A, Circuit 1B
8
FB+
Circuit 1A, Circuit 1B
7
V+
Circuit 3
Positive supply terminal.
6
VOUT
Circuit 2
Output Voltage.
Do Not Connect; Internal connection - Must be left floating.
High impedance input terminals. EL8172 input circuit is shown in Circuit 1A, and
the EL8171 input circuit is shown in Circuit 1B. EL8171: to avoid offset drift, it is
recommended that the terminals are not overdriven beyond 1V and the input
current must never exceed 5mA.
Negative supply terminal.
High impedance feedback terminals. EL8172 input circuit is shown in Circuit 1A,
and the EL8171 input circuit is shown in Circuit 1B. EL8171: to avoid offset drift, it
is recommended that the terminals are not overdriven beyond 1V and the input
current must never exceed 5mA.
V+
V+
IN+
FB+
INFB-
INFB-
V-
CIRCUIT 1A
IN+
FB+
OUT
V-
V-
CIRCUIT 1B
Description of Operation and Application
Information
Product Description
The EL8171 and EL8172 are micropower instrumentation
amplifiers (in-amps) which deliver rail-to-rail input amplification
and rail-to-rail output swing on a single 2.4V to 5.5V supply. The
EL8171 and EL8172 also deliver excellent DC and AC
specifications while consuming only 65µA typical supply current.
Because EL8171 and EL8172 provide an independent pair of
feedback terminals to set the gain and to adjust the output level,
these in-amps achieve high common-mode rejection ratio
regardless of the tolerance of the gain setting resistors. The
EL8171 is internally compensated for a minimum closed loop gain
of 10 or greater, well suited for moderate to high gains. For higher
gains, the EL8172 is internally compensated for a minimum gain
of 100.
Input Protection
All input and feedback terminals of the EL8171 and EL8172 have
internal ESD protection diodes to both positive and negative
supply rails, limiting the input voltage to within one diode drop
beyond the supply rails. The inverting inputs and FB- inputs have
ESD diodes to the V-rail, and the non-inverting inputs and FB+
terminals have ESD diodes to the V+ rail. The EL8172 has
additional back-to-back diodes across the input terminals and
also across the feedback terminals. If overdriving the inputs is
necessary, the external input current must never exceed 5mA. On
the other hand, the EL8171 has no clamps to limit the differential
voltage on the input terminals allowing higher differential input
FN6293 Rev 6.00
October 9, 2015
V+
V+
CAPACITIVELY
COUPLED
ESD CLAMP
VCIRCUIT 2
CIRCUIT 3
voltages at lower gain applications. It is recommended however,
that the input terminals of the EL8171 are not overdriven beyond
1V to avoid offset drift. An external series resistor may be used as
an external protection to limit excessive external voltage and
current from damaging the inputs.
Input Stage and Input Voltage Range
The input terminals (IN+ and IN-) of the EL8171 and EL8172
are single differential pair P-MOSFET devices aided by an
Input Range Enhancement Circuit (IREC) to increase the
headroom of operation of the common-mode input voltage.
The feedback terminals (FB+ and FB-) also have a similar
topology. As a result, the input common-mode voltage range of
both the EL8171 and EL8172 is rail-to-rail. These in-amps are
able to handle input voltages that are at or slightly beyond the
supply and ground making these in-amps well suited for single
5V or 3.3V low voltage supply systems. There is no need to
move the common-mode input of the in-amps to achieve
symmetrical input voltage.
Output Stage and Output Voltage Range
A pair of complementary MOSFET devices drive the output
VOUT to within a few mV of the supply rails. At a 100k load,
the PMOS sources current and pulls the output up to 4mV
below the positive supply, while the NMOS sinks current and
pulls the output down to 4mV above the negative supply, or
ground in the case of a single supply operation. The current
sinking and sourcing capability of the EL8171 and EL8172 are
internally limited to less than 35mA.
Page 10 of 14
EL8171, EL8172
Gain Setting
2.4V TO 5.5V
VIN, the potential difference across IN+ and IN-, is replicated
(less the input offset voltage) across FB+ and FB-. The
obsession of the EL8171 and EL8172 in-amp is to maintain the
differential voltage across FB+ and FB- equal to IN+ and IN-;
(FB+ - FB-) = (IN+ - IN-). Consequently, the transfer function
can be derived. The gain of the EL8171 and EL8172 is set by
two external resistors, the feedback resistor RF, and the gain
resistor RG.
2.4V TO 5.5V
7
VIN/2
3 IN+
2 IN-
VIN/2
8 FB+
VCM
5 FB-
+
2 IN-
VCM
5 FB-
2.4V TO 5.5V
R2
6
EL8171/2
-
VOUT
V4
RG
RF
V+
EL8171/2
-
6
VOUT
FIGURE 38. CIRCUIT 2 - GAIN SETTING AND REFERENCE
CONNECTION
RF
RF
V OUT = 1 + -------- V IN + 1 + -------- V REF
R G
R G
V-
(EQ. 2)
susceptibility to external noise is reduced, however the VREF
source must be capable of sourcing or sinking the feedback
current from VOUT through RF and RG.
RF
2.4V TO 5.5V
7
VIN/2
3 IN+
(EQ. 1)
In Figure 37, the FB+ pin and one end of resistor RG are
connected to GND. With this configuration, Equation 1 is only
true for a positive swing in VIN; negative input swings will be
ignored and the output will be at ground.
Unlike a three-op amp instrumentation amplifier, a finite series
resistance seen at the REF terminal does not degrade the
EL8171 and EL8172's high CMRR performance, eliminating
the need for an additional external buffer amplifier. Circuit 2
(Figure 38) uses the FB+ pin to provide a high impedance REF
terminal.
The FB+ pin is used as a REF terminal to center or to adjust
the output. Because the FB+ pin is a high impedance input, an
economical resistor divider can be used to set the voltage at
the REF terminal without degrading or affecting the CMRR
performance. Any voltage applied to the REF terminal will shift
VOUT by VREF times the closed loop gain, which is set by
resistors RF and RG. See Circuit 2 (Figure 38). Note that any
noise or unwanted signals on the reference supply will be
amplified at the output according to Equation 2.
The FB+ pin can also be connected to the other end of resistor,
RG. See Circuit 3 (Figure 39). Keeping the basic concept that the
EL8171 and EL8172 in-amps maintain constant differential
voltage across the input terminals and feedback terminals (IN+ IN- = FB+ - FB-), the transfer function of Circuit 3 can be derived.
Note that the VREF gain term is eliminated and
2 IN-
VIN/2
8 FB+
VCM
5 FB-
1
V+
+
+
EL8171/2
-
6
VOUT
V4
Reference Connection
FN6293 Rev 6.00
October 9, 2015
+
R1
FIGURE 37. CIRCUIT 1 - GAIN IS BY EXTERNAL RESISTORS
RF AND RG
RF
V OUT = 1 + -------- V IN
R G
V+
+
-
8 FB+
1
REF
4
RG
3 IN+
VIN/2
1
+
-
7
VIN/2
RG
RF
VREF
FIGURE 39. CIRCUIT 3 - REFERENCE CONNECTION WITH AN
AVAILABLE VREF
RF
V OUT = 1 + -------- V IN + V REF
R
G
(EQ. 3)
External Resistor Mismatches
Because of the independent pair of feedback terminals provided
by the EL8171 and EL8172, the CMRR is not degraded by any
resistor mismatches. Hence, unlike a three op amp and especially
a two op amp in-amp, the EL8171 and EL8172 reduce the cost of
external components by allowing the use of 1% or more tolerance
resistors without sacrificing CMRR performance. The EL8171 and
EL8172 CMRR will be maintained regardless of the tolerance of
the resistors used.
Gain Error and Accuracy
The EL8172 has a Gain Error (EG) of 0.2% typical. The EL8171
has an EG of 0.15% typical. The gain error indicated in the
“Electrical Specifications” table on page 2 is the inherent gain
error of the EL8171 and EL8172 and does not include the gain
Page 11 of 14
EL8171, EL8172
error contributed by the resistors. There is an additional gain
error due to the tolerance of the resistors used. The resulting
non-ideal transfer function effectively becomes:
RF
V OUT = 1 + -------- 1 – E RG + E RF + E G V IN
R G
(EQ. 4)
where:
• PDMAXTOTAL is the sum of the maximum power dissipation
of each amplifier in the package (PDMAX)
• PDMAX for each amplifier can be calculated as shown in
Equation 7:
V OUTMAX
PD MAX = 2*V S I SMAX + V S - V OUTMAX ---------------------------RL
(EQ. 7)
Where:
ERG = Tolerance of RG
ERF = Tolerance of RF
where:
EG
• TMAX = Maximum ambient temperature
= Gain Error of the EL8171 or EL8172
• JA = Thermal resistance of the package
The term [1-(ERG +ERF +EG)] is the deviation from the
theoretical gain. Thus, (ERG +ERF +EG) is the total gain error.
For example, if 1% resistors are used for the EL8171, the total
gain error would be:
• PDMAX = Maximum power dissipation of 1 amplifier
= E RG + E RF + E G typical
• IMAX = Maximum supply current of 1 amplifier
= 0.01 + 0.01 + 0.003
(EQ. 5)
= 2.3%
• VS = Supply voltage (Magnitude of V+ and V-)
• VOUTMAX = Maximum output voltage swing of the
application
• RL = Load resistance
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply conditions.
It is therefore important to calculate the maximum junction
temperature (TJMAX) for all applications to determine if power
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These
parameters are related in Equation 6:
T JMAX = T MAX + JA xPD MAXTOTAL
FN6293 Rev 6.00
October 9, 2015
(EQ. 6)
Page 12 of 14
EL8171, EL8172
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make
sure that you have the latest revision.
DATE
REVISION
October 9, 2015
FN6293.6
CHANGE
- Updated Ordering Information Table on page 1.
- Added Revision History.
- Added About Intersil Verbiage.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
© Copyright Intersil Americas LLC 2005-2007. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6293 Rev 6.00
October 9, 2015
Page 13 of 14
EL8171, EL8172
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4° ±4°
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
A
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
-
N
SO-8
SO16
(0.150”)
8
14
16
NOTES:
Rev. M 2/07
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
FN6293 Rev 6.00
October 9, 2015
Page 14 of 14
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