H7N0405LD

H7N0405LD, H7N0405LS, H7N0405LM Silicon N Channel MOS FET High Speed Power Switching REJ03G1367-0100 Rev.1.00 Sep 25, 2006 Features • Low on-resistance RDS(on) = 4.0 mΩ typ. • Low drive current. • Capable of 4.5 V gate drive Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK (L) ) 4 4 RENESAS Package code: PRSS0004AE-B (Package name: LDPAK (S)-(1) ) 1 1 2 3 2 1. Gate 2. Drain 3. Source 4. Drain 3 H7N0405LD H7N0405LS RENESAS Package code: PRSS0004AE-C (Package name: LDPAK (S)-(2) ) 4 G D 1 2 3 S H7N0405LM Rev.1.00 Sep 25, 2006 page 1 of 7 H7N0405LD, H7N0405LS, H7N0405LM Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Tc = 25°C 3. Tch = 25°C, Rg ≥ 50 Ω Symbol VDSS VGSS ID ID (pulse)Note1 IDR IAPNote3 EARNote3 PchNote2 Tch Tstg Rating 40 ±20 80 320 80 40 213 80 150 –55 to +150 Unit V V A A A A mJ W °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source break down voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cut off voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer admittance Total gate charge Gate to source charge Gate to drain charge Turn-off delay time Rise time Body-drain diode forward voltage Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Notes: 4. Pulse test Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDF trr Min 40 ±20 — — 1.5 — — 54 — — — — — — — — — — — — Typ — — — — — 4.0 6.2 90 5600 825 550 100 25 25 40 400 100 26 0.94 40 Max — — ±10 10 2.5 5.0 8.7 — — — — — — — — — — — — — Unit V V µA µA V mΩ mΩ S pF pF pF nC nC nC ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 40 V, VGS = 0 ID = 1 mA, VDS = 10 VNote4 ID = 40 A, VGS = 10 VNote4 ID = 40 A, VGS = 4.5 VNote4 ID = 40 A, VGS = 10 VNote4 VDS = 10 V, VGS = 0, f = 1 MHz VDD = 25 V, VGS = 10 V, ID = 80 A VGS = 10 V, ID = 40 A, RL = 0.75 Ω, Rg = 4.7 Ω IF = 80 A, VGS = 0 IF = 80 A, VGS = 0 diF/dt = 100 A/µs Rev.1.00 Sep 25, 2006 page 2 of 7 H7N0405LD, H7N0405LS, H7N0405LM Main Characteristics Power vs. Temperature Derating 160 1000 300 120 10 Maximum Safe Operation Area 10 0µ s Channel Dissipation Pch (W) µs Drain Current ID (A) 100 30 1 m 10 3 1 0.3 0.1 0.03 80 DC Operation (Tc = 25°C) s 40 Operation in this area is limited by RDS(on) PW = 10 ms (1 shot) 0 50 100 150 200 Ta = 25°C 0.01 0.1 0.3 1 3 10 30 100 Case Temperature Tc (°C) Drain to Source Voltage VDS (V) Typical Output Characteristics 100 6V 10 V 4.0 V 60 4.4 V 100 Typical Transfer Characteristics VDS = 10 V Pulse Test Drain Current ID (A) Drain Current ID (A) 80 80 60 40 VGS = 3.6 V Pulse Test 0 2 4 6 8 10 40 –40°C 25°C Tc = 150°C 0 1 2 3 4 5 20 20 Drain to Source Voltage VDS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source On State Resistance RDS(on) (mΩ) 100 Pulse Test 30 Gate to Source Voltage VGS (V) Static Drain to Source on State Resistance RDS(on) (mΩ) Static Drain to Source on State Resistance vs. Temperature 15 Pulse Test 10 10, 20, 50 A 10 VGS = 4.5 V 4.5 V 5 10, 20, 50 A VGS = 10 V 0 –50 0 50 100 150 3 10 V 1 1 3 10 30 100 Drain Current ID (A) Case Temperature Tc (°C) Rev.1.00 Sep 25, 2006 page 3 of 7 H7N0405LD, H7N0405LS, H7N0405LM Typical Capacitance vs. Drain to Source Voltage 10000 3000 Dynamic Input Characteristics 100 Drain to Source Voltage VDS (V) Capacitance C (pF) 80 VDD = 40 V 25 V 10 V VDS VGS 16 1000 Coss 300 100 30 V = 0 GS f = 1 MHz 10 0 10 Crss 60 12 40 8 20 VDD = 40 V 25 V 10 V 40 80 120 160 4 0 200 20 30 40 50 0 Drain to Source Voltage VDS (V) Gate Charge Qg (nc) Reverse Drain Current vs. Source to Drain Voltage Maximum Avalanche Energy vs. Channel Temperature Derating Repetitive Avalanche Energy EAR (mJ) 100 250 IAP = 40 A VDD = 25 V duty < 0.1 % Rg ≥ 50 Ω Reverse Drain Current IDR (A) 80 10 V 200 60 5V 40 VGS = 0, –5 V Pulse Test 0 0.4 0.8 1.2 1.6 2.0 150 100 20 50 0 25 50 75 100 125 150 Source to Drain Voltage VSD (V) Channel Temperature Tch (°C) Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 0.1 0.05 2 0.0 θch - c(t) = γs (t) • θch - c θch - c = 1.56°C/ W, Tc = 25°C 0.03 1 0.0 h 1s 0.01 10 µ ot p e uls PDM PW T D= PW T 100 µ 1m 10 m 100 m 1 10 100 Pulse Width PW (s) Rev.1.00 Sep 25, 2006 page 4 of 7 Gate to Source Voltage VGS (V) Ciss ID = 80 A 20 H7N0405LD, H7N0405LS, H7N0405LM Avalanche Test Circuit EAR = Avalanche Waveform 1 2 VDSS • L • IAP2 • VDSS – VDD VDS Monitor L IAP Monitor V(BR)DSS IAP VDD ID VDS Rg D. U. T Vin 15 V 50 Ω 0 VDD Switching Time Test Circuit Switching Time Waveform Vin Monitor D.U.T. Rg RL Vout Monitor Vin Vout 10% 10% 90% 10% Vin 10 V VDS = 30 V 90% td(on) 90% td(off) tf tr Rev.1.00 Sep 25, 2006 page 5 of 7 H7N0405LD, H7N0405LS, H7N0405LM Package Dimensions • H7N0405LD Package Name LDPAK(L) JEITA Package Code  RENESAS Code PRSS0004AE-A Previous Code LDPAK(L) / LDPAK(L)V MASS[Typ.] 1.40g Unit: mm (1.4) 4.44 ± 0.2 10.2 ± 0.3 1.3 ± 0.15 11.3 ± 0.5 0.3 10.0 + 0.5 – 8.6 ± 0.3 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 11.0 ± 0.5 0.2 0.86 + 0.1 – 2.49 ± 0.2 0.4 ± 0.1 • H7N0405LS Package Name LDPAK(S)-(1) JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B Previous Code LDPAK(S)-(1) / LDPAK(S)-(1)V MASS[Typ.] 1.30g Unit: mm 4.44 ± 0.2 10.2 ± 0.3 (1.4) 8.6 ± 0.3 + 0.3 – 0.5 10.0 (1.5) (1.5) 2.49 ± 0.2 0.2 0.1 + 0.1 – 7.8 7.0 2.2 1.37 ± 0.2 1.3 ± 0.2 2.54 ± 0.5 0.3 3.0 + 0.5 – 0.2 0.86 + 0.1 – 0.4 ± 0.1 2.54 ± 0.5 Rev.1.00 Sep 25, 2006 page 6 of 7 1.7 1.3 ± 0.15 7.8 6.6 H7N0405LD, H7N0405LS, H7N0405LM • H7N0405LM Package Name LDPAK(S)-(2) JEITA Package Code  RENESAS Code PRSS0004AE-C Previous Code LDPAK(S)-(2) / LDPAK(S)-(2)V MASS[Typ.] 1.35g Unit: mm 4.44 ± 0.2 10.2 ± 0.3 (1.4) 8.6 ± 0.3 + 0.3 – 0.5 2.49 ± 0.2 10.0 (1.5) (2.3) 0.2 0.1 + 0.1 – 7.8 7.0 2.2 1.37 ± 0.2 1.3 ± 0.2 2.54 ± 0.5 0.4 ± 0.1 0.3 5.0 + 0.5 – 0.2 0.86 + 0.1 – 2.54 ± 0.5 Ordering Information Part Name H7N0405LD-E H7N0405LSTL-E H7N0405LMTL-E Quantity 500 pcs 1000 pcs 1000 pcs Shipping Container Box (Conductive Sack) Taping Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.1.00 Sep 25, 2006 page 7 of 7 1.7 1.3 ± 0.15 7.8 6.6 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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