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H7N0608LM

H7N0608LM

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

  • 描述:

    H7N0608LM - Silicon N Channel MOS FET High Speed Power Switching - Renesas Technology Corp

  • 数据手册
  • 价格&库存
H7N0608LM 数据手册
H7N0608LD, H7N0608LS, H7N0608LM Silicon N Channel MOS FET High Speed Power Switching REJ03G0144-0100Z Rev.1.00 Oct.30.2003 Features • Low on-resistance RDS(on) = 6.0 mΩ typ. • Low drive current • Available for 4.5 V gate drive Outline LDPAK D 4 4 4 G 1 S 1 2 1 3 2 3 2 H7N0608LS H7N0608LM 3 H7N0608LD 1. Gate 2. Drain 3. Source 4. Drain Rev.1.00, Oct.30.2003, page 1 of 11 H7N0608LD, H7N0608LS, H7N0608LM Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Symbol VDSS VGSS ID ID (pulse) IDR IAP Note3 Note1 Ratings 60 ±20 70 280 70 40 137 80 150 –55 to +150 Unit V V A A A A mJ W °C °C EARNote3 Pch Tch Tstg Note2 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C 3. Value at Tch = 25°C, Rg ≥ 50 Ω Rev.1.00, Oct.30.2003, page 2 of 11 H7N0608LD, H7N0608LS, H7N0608LM Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol Min V(BR)DSS 60 Typ — — — — — 6.0 8.0 75 6200 680 350 100 20 20 45 220 125 35 0.94 40 Max — — ±10 10 2.5 8.0 12 — — — — — — — — — — — — — Unit V V µA µA V mΩ mΩ S pF pF pF nC nC nC ns ns ns ns V ns IF = 70 A, VGS = 0 IF = 70 A, VGS = 0 diF/dt = 100 A/µs Test Conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 60 V, VGS = 0 ID = 1 mA, VDS = 10 VNote1 ID = 35 A, VGS = 10 VNote1 ID = 35 A, VGS = 4.5 VNote1 ID = 35 A, VGS = 10 VNote1 VDS = 10 V VGS = 0 f = 1 MHz VDD = 25 V VGS = 10 V ID = 70 A VGS = 10 V, ID = 35 A RL = 0.86 Ω Rg = 4.7 Ω Gate to source breakdown Voltage V(BR)GSS ±20 Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf trr IGSS IDSS VGS(off) RDS(on) — — 1.5 — — 45 — — — — — — — — — — — — Body–drain diode forward voltage VDF Body–drain diode reverse recovery time Notes: 1. Pulse test Rev.1.00, Oct.30.2003, page 3 of 11 H7N0608LD, H7N0608LS, H7N0608LM Main Characteristics Power vs. Temperature Derating 160 Pch (W) Maximum Safe Operation Area 1000 300 (A) 10 DC Operation (Tc = 25°C) 10 0µ s 120 100 30 10 3 1 0.3 0.1 PW = 10 ms (1 shot) µs 1 ID s m Channel Dissipation 80 Drain Current 40 Operation in this area is limited by RDS(on) 0 50 100 150 Tc (°C) 200 0.03 Ta = 25°C 0.01 0.1 0.3 1 3 10 30 VDS 100 (V) Case Temperature Drain to Source Voltage Typical Output Characteristics 100 10 V 4.5 V 4.0 V Pulse Test (A) Typical Transfer Characteristics 100 VDS = 10 V Pulse Test (A) 80 80 ID 60 ID Drain Current 3.6 V 60 Drain Current 40 VGS = 3.2 V 20 40 Tc = 150°C 25°C –40°C 20 0 2 4 6 8 VDS (V) 10 0 2 4 6 8 VGS 10 (V) Drain to Source Voltage Gate to Source Voltage Rev.1.00, Oct.30.2003, page 4 of 11 H7N0608LD, H7N0608LS, H7N0608LM Drain to Source Saturation Voltage vs. Gate to Source Voltage Pulse Test Drain to Source on State Resistance RDS(on) (mΩ) Drain to Source Saturation Voltage VDS(on) (V) Static Drain to Source on State Resistance vs. Drain Current 100 500 Pulse Test 30 400 ID = 50 A 300 10 VGS = 4.5 V 10 V 200 20 A 100 10 A 3 0 4 8 12 16 VGS (V) 1 20 1 3 Gate to Source Voltage 30 100 300 1000 10 Drain Current ID (A) Drain to Source on State Resistance RDS(on) (mΩ) Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance vs. Temperature 20 Pulse Test 16 Forward Transfer Admittance vs. Drain Current 1000 300 100 30 10 3 1 0.3 0.1 0.1 0.3 1 3 10 (A) 30 100 25°C 150°C VDS = 10 V Pulse Test Tc = –40°C 12 10, 20 A 8 4.5 V 50 A 4 VGS = 10 V 0 25 10, 20, 50 A 0 –50 –25 50 75 100 125 150 Tc (°C) Case Temperature Drain Current ID Rev.1.00, Oct.30.2003, page 5 of 11 H7N0608LD, H7N0608LS, H7N0608LM Body-Drain Diode Reverse Recovery Time di / dt = 100 A / µs VGS = 0, Ta = 25°C Typical Capacitance vs. Drain to Source Voltage Ciss 1000 10000 3000 Reverse Recovery Time trr (ns) 300 100 30 10 3 1 0.1 Capacitance C (pF) 1000 Coss 300 100 30 10 0 VGS = 0 f = 1 MHz 10 20 30 40 (V) 50 Crss 0.3 1 3 10 30 IDR (A) 100 Reverse Drain Current Drain to Source Voltage VDS Dynamic Input Characteristics 100 VDS (V) VGS 16 (V) ID = 85 A 20 1000 300 tf Switching Characteristics VGS Switching Time t (ns) 80 VDD = 50 V 25 V 10 V tr td(off) Drain to Source Voltage Gate to Source Voltage 100 td(on) 30 tr 10 VGS = 10 V, VDD = 30 V 3 PW = 5 µs, duty < 1 % Rg = 4.7 Ω 1 0.1 0.3 3 10 1 Drain Current ID tf 60 VDS 12 40 8 20 VDD = 50 V 25 V 10 V 40 80 120 160 Gate Charge Qg (nc) 4 0 200 0 30 (A) 100 Rev.1.00, Oct.30.2003, page 6 of 11 H7N0608LD, H7N0608LS, H7N0608LM Reverse Drain Current vs. Source to Drain Voltage 100 Maximum Avalanche Energy vs. Channel Temperature Derating Repetitive Avalanche Energy EAR (mJ) 200 IAP = 40 A VDD = 25 V duty < 0.1 % Rg > 50 Ω (A) Reverse Drain Current IDR 80 10 V 160 60 120 40 5V VGS = 0, –5 V Pulse Test 80 20 40 0 25 0 0.4 0.8 1.2 1.6 VSD 2.0 (V) Source to Drain Voltage 50 75 100 125 Channel Temperature Tch (°C) 150 Avalanche Test Circuit EAR = Avalanche Waveform 1 2 • L • I AP • 2 VDSS VDSS – V DD V DS Monitor L I AP Monitor V (BR)DSS I AP VDD ID V DS Rg Vin 15 V D. U. T 50 Ω 0 VDD Rev.1.00, Oct.30.2003, page 7 of 11 H7N0608LD, H7N0608LS, H7N0608LM Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance γs (t) 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 0.1 0.05 2 0.0 0.0 1 θch - c(t) = γs (t) • θch - c θch - c = 1.56°C/ W, Tc = 25°C e PDM PW T 0.03 1s ho t ls pu D= PW T 0.01 10 µ 100 µ 1m 10 m 100 m 1 10 100 Pulse Width PW (S) Switching Time Test Circuit Waveform Vin Monitor Rg D.U.T. RL Vout Monitor Vin Vout 10% 10% 90% td(on) tr 90% td(off) 90% 10% Vin 10 V V DS = 30 V tf Rev.1.00, Oct.30.2003, page 8 of 11 H7N0608LD, H7N0608LS, H7N0608LM Package Dimensions • H7N0608LD As of January, 2003 Unit: mm (1.4) 4.44 ± 0.2 10.2 ± 0.3 1.3 ± 0.15 11.3 ± 0.5 0.3 10.0 + 0.5 – 8.6 ± 0.3 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 11.0 ± 0.5 0.2 0.86 + 0.1 – 2.49 ± 0.2 0.4 ± 0.1 Package Code JEDEC JEITA Mass (reference value) LDPAK (L) — — 1.40 g Rev.1.00, Oct.30.2003, page 9 of 11 H7N0608LD, H7N0608LS, H7N0608LM • H7N0608LS As of January, 2003 Unit: mm 4.44 ± 0.2 10.2 ± 0.3 (1.4) 8.6 ± 0.3 + 0.3 – 0.5 10.0 (1.5) (1.5) 2.49 ± 0.2 0.2 0.1 + 0.1 – 7.8 7.0 2.2 1.37 ± 0.2 0.3 3.0 + 0.5 – 1.3 ± 0.2 2.54 ± 0.5 0.2 0.86 + 0.1 – 0.4 ± 0.1 2.54 ± 0.5 Package Code JEDEC JEITA Mass (reference value) LDPAK (S)-(1) — — 1.30 g Rev.1.00, Oct.30.2003, page 10 of 11 1.7 1.3 ± 0.15 7.8 6.6 H7N0608LD, H7N0608LS, H7N0608LM • H7N0608LM As of January, 2003 Unit: mm 4.44 ± 0.2 10.2 ± 0.3 (1.4) 8.6 ± 0.3 + 0.3 – 0.5 2.49 ± 0.2 (2.3) 0.2 0.1 + 0.1 – (1.5) 10.0 7.8 7.0 2.2 1.37 ± 0.2 1.3 ± 0.2 2.54 ± 0.5 0.4 ± 0.1 0.3 5.0 + 0.5 – 0.2 0.86 + 0.1 – 2.54 ± 0.5 Package Code JEDEC JEITA Mass (reference value) LDPAK (S)-(2) — — 1.35 g Rev.1.00, Oct.30.2003, page 11 of 11 1.7 1.3 ± 0.15 7.8 6.6 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: (408) 382-7500 Fax: (408) 382-7501 Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: (1628) 585 100, Fax: (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: (89) 380 70 0, Fax: (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: 2265-6688, Fax: 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Tel: (2) 2715-2888, Fax: (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: (21) 6472-1001, Fax: (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: 6213-0200, Fax: 6278-8001 http://www.renesas.com © 2003. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon 1.0
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