HA1630S08CMEL-E

Data Sheet HA1630S07 Single CMOS High Drive Operational Amplifier R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Description HA1630S07 is a low power single CMOS operational amplifier featuring high output current with typical current supply of 60 μA (2.7 V to 5.5 V). This IC designed to operate from a single power supply and have full swing outputs. Available in CMPAK-5 and MPAK-5 package, the miniature size of this IC not only allows compact integration in portable devices but also minimizes distance of signal sources (sensors), thus reducing external noise pick up prior to amplification. This IC exhibit excellent current drive-power ratio capable of 2 kΩ load driving and yet resistant to oscillation for capacitive loads up to 200 pF. Features • • • • • IDD = 60 μA Typ (VDD = 3 V, RL = No load) VDD = 2.7 V to 5.5 V VIO = 6 mV Max IIB = 1 pA Typ IOSOURCE = 15 mA Typ (VDD = 3.0 V, VOH = 2.5 V) IOSINK = 15 mA Typ (VDD = 3.0 V, VOL = 0.5 V) • Input common voltage range includes ground Low supply current Low voltage operation Low input offset voltage Low input bias current High output current Ordering Information Part No. HA1630S07CM HA1630S07LP R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Package Name CMPAK-5 MPAK-5 Package Code PTSP0005ZC-A PLSP0005ZB-A Page 1 of 15 HA1630S07 Pin Arrangement VDD 5 VOUT 4 + − 1 2 3 VIN(+) VSS VIN(–) (Top view) Equivalent Circuit VDD Vbias2 VIN(–) VIN(+) VOUT Vbias1 Vbias3 VSS R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Page 2 of 15 HA1630S07 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Supply voltage Differential input voltage Input voltage Output current Power dissipation VDD VIN(diff) VIN IOUT PT Operating temperature Storage temperature Topr Tstg Note: Ratings 7.0 –VDD to +VDD –0.1 to +VDD 40 80 (CMPAK-5) 120 (MPAK-5) –40 to +85 –55 to +125 Unit V V V mA mW Note 1 2 °C °C 1. Do not apply input voltage exceeding VDD or 7 V. 2. If Ta > 25°C, CMPAK-5: –0.8 mW/°C MPAK-5: –1.2 mW/°C Electrical Characteristics DC Characteristics (Ta = 25°C, VDD = 3.0 V, VSS = 0 V) Item Input offset voltage Input bias current Input offset current Common mode input voltage range Supply current Output source current Output sink current Open loop voltage gain Common mode rejection ratio Power supply rejection ratio Output high voltage Output low voltage Note: Symbol VIO IIB IIO VCM IDD IOSOURCE IOSINK AV CMRR PSRR VOH VOL Min — — — –0.1 — 7.5 7.5 55 50 55 2.9 — Typ — (1) (1) — 60 15 15 80 80 80 — — Max 6 — — 1.8 170 — — — — — — 0.1 Unit mV pA pA V μA mA mA dB dB dB V V Test Conditions VIN = 1.5 V, RL = 1 MΩ VIN = 1.5 V VIN = 1.5 V VIN(+) = 1.0 V, RL = ∞ VOUT = 2.5 V VOUT = 0.5 V RL = 100 kΩ VIN1 = 0 V, VIN2 = 1.8 V VDD1 = 2.7 V, VDD2 = 5.5 V RL = 2 kΩ to VSS RL = 2 kΩ to VDD ( ) : Design specification AC Characteristics (Ta = 25°C, VDD = 3.0 V, VSS = 0 V) Item Slew rate Gain bandwidth product Note: Symbol SRr SRf GBW Min — — — Typ (1) (1) (1.5) Max — — — Unit V/μs MHz Test Conditions VIN = 1.5 V, CL = 15 pF (VINL = 0.2 V, VINH = 1.7 V) VIN = 1.5 V, CL = 15 pF ( ) : Design specification R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Page 3 of 15 HA1630S07 Table of Graphs Supply current Electrical Characteristics IDD Output high voltage Output low voltage Output source current VOH VOL IOSOURCE Output sink current IOSINK Input offset voltage VIO Common mode input voltage range VCM Common mode rejection ratio Power supply rejection ratio Input bias current CMRR PSRR IIB Slew rate (rising) SRr Slew rate (falling) SRf Open loop gain AV Phase margin Noise input voltage PM VNI R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 vs. Supply voltage vs. Temperature vs. Rload vs. Rload vs. Output high voltage vs. Temperature vs. Output low voltage vs. Temperature vs. Supply voltage vs. Input voltage vs. Temperature vs. Supply voltage vs. Temperature vs. Input voltage vs. Supply voltage vs. Input voltage vs. Temperature vs. Cload vs. Temperature Time waveform vs. Cload vs. Temperature Time waveform vs. Rload vs. Frequency vs. Cload vs. Frequency Characteristic Curves 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Test Circuit No. 1 1 2 3 4 4 5 5 6 6 7 8 8 9 10 11, 12 11, 12 18 19 20 21 22 23 24 25, 26 27 28 13 13 13 13 13 13 14 14 14 15 Page 4 of 15 HA1630S07 Test Circuits (Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25°C) 1. Supply Current, IDD − + 2. Output High Voltage, VOH A − + VDD 1V V 1V 4. Output Source Current, IOSOURCE 3. Output Low Voltage, VOL RLOAD = 2 kΩ V − + VDD RLOAD = 2 kΩ − + VDD 1V VDD A 1V 5. Output Sink Current, IOSINK VOUT 6. Input Offset Voltage vs. Operating Voltage 1 MΩ 1 kΩ − + VDD A 1V − + VOUT V 1 kΩ VDD VDD/2 VOUT 1 MΩ VIO = VOUT / 1001 7. Input Offset Voltage, VIO 8. Common Mode Input Voltage Range, VCM 1 MΩ 1 kΩ 1 kΩ 1 MΩ 1 MΩ VOUT V − + –1.5 V 1 kΩ 1.5 V 1 kΩ VIN − + VOUT V Note: VCML and VCMH are values of VIN when VIO changes more than 50 dB taking VIN = 0 V as reference. VDD VIO 1 MΩ VCML 1.5 V VIN = 0 V VIN VCMH VIO = VOUT / 1001 R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Page 5 of 15 HA1630S07 Test Circuits (cont.) (Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25°C) 9. Common Mode Rejection Ratio, CMRR 1 MΩ 1 kΩ VOUT V − + 1.5 V 1 kΩ VIN Measure Point Calculate VIO –1.5 V VOUT1 VIO1 = VOUT1 / 1001 0.3 V VOUT2 VIO2 = VOUT2 / 1001 VDD Measure Point Calculate VIO 2.7 V VOUT1 VIO1 = VOUT1 / 1001 VOUT2 VIO2 = VOUT2 / 1001 VIN –1.5 V 1 MΩ CMRR Calculation CMRR = 20log10 |[VIO2 – VIO1]| 0.3 – (–1.5 V) 10. Power Supply Rejection Ratio, PSRR 1 MΩ 1 kΩ 1 kΩ 1 MΩ VOUT V − + VDD/2 –VDD/2 5.5 V 11. Input Bias Current, IIB+ 12. Input Bias Current, IIB– − A + A VDD VIN CMRR Calculation PSRR = 20log10 − + |[VIO2 – VIO1]| 5.5 V – 2.7 V VDD VIN 13. Slew Rate (Large Signal Input) VIN 1.7 V – 0.2 V − + 50 Ω VOUT V 15 pF VDD 90% ΔVtr VOUT 10% Δttr R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 SRr = ΔVtr / Δttr SRf = ΔVtf / Δttf 90% ΔVtf 10% Δttf Page 6 of 15 HA1630S07 Test Circuits (cont.) (Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25°C) 14. Open Loop Voltage Gain, AV 1 MΩ 10 kΩ 10 to 100 MHz –40 dBm V VIN − + 50 Ω VOUT V 1.5 V AV = 20log10 101 × |VOUT| |VIN| –1.5 V 15. Noise Input Voltage, VNI 1 MΩ 1 kΩ − + VOUT V 1.5 V VNI = VOUT 1001 –1.5 V R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Page 7 of 15 HA1630S07 Characteristic Curves Figure 2 HA1630S07 Supply Current vs. Ambient Temperature 90 Supply Current, IDD (A) Supply Current, IDD (A) Figure 1 HA1630S07 Supply Current vs. Supply Voltage 80 70 60 50 40 30 20 2 3 4 5 Supply Voltage, VDD (V) 6 90 80 70 40 30 20 –50 3.0 2.9 2.8 2.7 100 1k 10 k Resistor Load, RL () 100 k Figure 5 HA1630S07 Output High Voltage vs. Output Source Current 6 VDD = 5.5 V 5 VDD = 5.0 V 4 3 VDD = 3.0 V 2 1 VDD = 2.7 V 0 0 10 20 30 40 50 Output Source Current, IOSOURCE (mA) R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Output Low Voltage, VOL (V) 3.1 –25 0 25 50 75 100 Ambient Temperature, Ta (C) Figure 4 HA1630S07 Output Low Voltage vs. Resistor Load Output Source Current, IOSOURCE (mA) Output High Voltage, VOH (V) Output High Voltage, VOH (V) VDD = 3.0 V VDD = 2.7 V, 3.0 V 50 Figure 3 HA1630S07 Output High Voltage vs. Resistor Load 3.2 VDD = 5.5 V 60 0.3 VDD = 3.0 V 0.2 0.1 0.0 –0.1 100 1k 10 k Resistor Load, RL () 100 k Figure 6 HA1630S07 Output Source Current vs. Ambient Temperature 30 VDD = 3.0 V 25 20 15 10 5 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (C) Page 8 of 15 HA1630S07 VDD = 2.7 V 1 0 VDD = 5.0 V VDD = 5.5 V 0 10 20 30 40 50 Output Sink Current, IOSINK (mA) Figure 9 HA1630S07 Input Offset Voltage vs. Supply Voltage 6 4 2 0 –2 –4 –6 2 3 4 5 Supply Voltage, VDD (V) 6 Output Sink Current, IOSINK (mA) VDD = 3.0 V 2 Input Offset Voltage, VIO (mV) Figure 7 HA1630S07 Output Low Voltage vs. Output Sink Current 3 Figure 11 HA1630S07 Input Offset Voltage vs. Ambient Temperature 6 VDD = 2.7 V, 3.0 V, 5.5 V 4 2 0 –2 –4 –6 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Figure 8 HA1630S07 Output Sink Current vs. Ambient Temperature 30 VDD = 3.0 V 25 20 15 10 5 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) Figure 10 HA1630S07 Input Offset Voltage vs. Input Voltage 15 VDD = 1.5 V, VSS = –1.5 V 10 5 0 –5 –10 –15 –2.5 –1.5 –0.5 0.5 Input Voltage, VIN (V) 1.5 Figure 12 HA1630S07 Common Mode Input Voltage vs. Supply Voltage 5 Common Mode Input Voltage, VCM (V) Input Offset Voltage, VIO (mV) Input Offset Voltage, VIO (mV) Output Low Voltage, VOL (V) Characteristic Curves (cont.) 4 VCM+ 3 2 Common Mode Input Voltage Range 1 0 –1 –2 VCM– 2 3 4 5 Supply Voltage, VDD (V) 6 Page 9 of 15 HA1630S07 VDD = 3.0 V VCM+ 1.0 Common Mode Input Voltage Range 0.0 VCM– Input Bias Current, IIB (pA) Power Supply Rejection Ratio, PSRR (dB) –1.0 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) Figure 15 HA1630S07 Power Supply Rejection Ratio vs. Supply Voltage 120 100 80 60 40 20 0 2 3 4 5 Supply Voltage, VDD (V) 6 Figure 17 HA1630S07 Input Bias Current vs. Ambient Temperature 100 VDD = 3.0 V 50 0 –50 –100 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (°C) R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Figure 14 HA1630S07 Common Mode Rejection Ratio vs. Input Voltage 120 VDD = 1.5 V, VSS = –1.5 V 100 80 60 40 20 0 –2 –1 0 Input Voltage, VIN (V) 1 Figure 16 HA1630S07 Input Bias Current vs. Input Voltage Input Bias Current, IIB (pA) 2.0 Slew Rate (rising), SRr (V/μs) Common Mode Input Voltage, VCM (V) Figure 13 HA1630S07 Common Mode Input Voltage vs. Ambient Temperature 3.0 Common Mode Rejection Ratio, CMRR (dB) Characteristic Curves (cont.) 100 VDD = 3.0 V 50 0 –50 –100 0 1 2 Input Voltage, VIN (V) 3 Figure 18 HA1630S07 Slew Rate (rising) vs. Capacitive Load 3.0 VDD = 3.0 V 2.0 1.0 0.0 0 100 200 300 Capacitive Load, CL (pF) 400 Page 10 of 15 HA1630S07 Characteristic Curves (cont.) Figure 20 HA1630S07 Slew Rate (rising) 3.0 VDD = 2.7 V, 3.0 V, 5.5 V 2.0 SRr = 1.10 V/s 1.0 0.0 –50 –25 0 25 50 75 100 Ambient Temperature, Ta (C) Figure 21 HA1630S07 Slew Rate (falling) vs. Capacitive Load 3.0 VDD = 3.0 V 2.0 1.0 0.0 0 50 100 150 200 250 300 350 400 Capacitive Load, CL (pF) Slew Rate (falling), SRf (V/s) Slew Rate (falling), SRf (V/s) Slew Rate (rising), SRr (V/s) Figure 19 HA1630S07 Slew Rate (rising) vs. Ambient Temperature Figure 22 HA1630S07 Slew Rate (falling) vs. Ambient Temperature 3.0 VDD = 2.7 V, 3.0 V, 5.5 V 2.0 1.0 0.0 –50 Figure 23 HA1630S07 Slew Rate (falling) R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Figure 24 HA1630S07 Open Loop Gain vs. Resistor Load Open Loop Gain, AV (dB) SRf = 1.23 V/s –25 0 25 50 75 100 Ambient Temperature, Ta (C) 120 VDD = 3.0 V 100 80 60 40 20 0 100 1k 10 k Resistor Load, RL () 100 k Page 11 of 15 HA1630S07 Characteristic Curves (cont.) Figure 26 HA1630S07 Open Loop Gain, Phase vs. Frequency 180 90 Phase 0 –50 –100 10 100 1 k 10 k 100 k 1 M Frequency, f (Hz) –90 10 M Phase Margin, PM (deg.) Figure 27 HA1630S07 Phase Margin vs. Capacitive Load 80 VDD = 3.0 V 70 60 50 40 30 20 10 0 0 50 100 150 200 250 300 350 400 Capacitive Load, CL (pF) R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 100 VDD = 3.0 V CL = 400 pF Gain 50 0 180 90 Phase 0 –50 –100 10 270 100 Phase (deg.) 0 270 Open Loop Gain, AV (dB) Gain 50 VDD = 3.0 V RL = 100 k Noise Input Voltage, VNI (V/Hz) 100 Phase (deg.) Open Loop Gain, AV (dB) Figure 25 HA1630S07 Open Loop Gain, Phase vs. Frequency –90 10 M 1 k 10 k 100 k 1 M Frequency, f (Hz) Figure 28 HA1630S07 Noise Input Voltage vs. Frequency 1.0 VDD = 3.0 V 0.8 0.6 0.4 0.2 0.0 10 100 1k Frequency, f (Hz) 10 k Page 12 of 15 HA1630S07 Package Dimensions JEITA Package Code RENESAS Code Previous Code MASS (Typ) [g] SC-88A PTSP0005ZC-A CMPAK-5 / CMPAK-5V 0.006 D A e Q c E HE LP L A A x M L1 S A A2 y S b c A-A Section A3 b A A1 S Reference Dimensions in millimeters Symbol Min Nom Max A A1 A2 A3 b c D E e HE L L1 LP x y Q 0.8 0 0.8 ⎯ 0.15 0.1 1.8 1.15 ⎯ 1.8 0.3 0.1 0.2 ⎯ ⎯ ⎯ ⎯ ⎯ 0.9 0.25 0.22 0.13 2.0 1.25 0.65 2.1 ⎯ ⎯ ⎯ ⎯ ⎯ 0.25 1.1 0.1 1.0 ⎯ 0.3 0.15 2.2 1.35 ⎯ 2.4 0.7 0.5 0.6 0.05 0.05 ⎯ © 2013 Renesas Electronics Corporation. All rights reserved. R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Page 13 of 15 HA1630S07 JEITA Package Code RENESAS Code Previous Code MASS (Typ) [g] SC-74A PLSP0005ZB-A MPAK-5 / MPAK-5V 0.015 D A e Q E HE L A c LP L1 A3 A x M S A b A2 A A1 y S S b c A-A Section Reference Dimensions in millimeters Symbol Min Nom Max A A1 A2 A3 b c D E e HE L L1 LP x y Q 1.0 0 1.0 ⎯ 0.35 0.11 2.8 1.5 ⎯ 2.5 0.3 0.1 0.2 ⎯ ⎯ ⎯ ⎯ ⎯ 1.1 0.25 0.4 0.16 2.95 1.6 0.95 2.8 ⎯ ⎯ ⎯ ⎯ ⎯ 0.3 1.4 0.1 1.3 ⎯ 0.5 0.26 3.1 1.8 ⎯ 3.0 0.7 0.5 0.6 0.05 0.05 ⎯ © 2013 Renesas Electronics Corporation. All rights reserved. R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 Page 14 of 15 HA1630S07 Taping & Reel Specification [Taping] Package Code MPAK-5 CMPAK-5 W 8 8 P 4 4 Ao 3.3 2.25 Bo 3.3 2.45 Ko 1.5 1.1 E 1.75 1.75 D1 1.05 1.05 F 3.5 3.5 Maximum Storage No. 3,000 pcs/reel 3,000 pcs/reel 4.0 φ 1.5 Unit: mm E 2.0 Cover tape B0 W F A0 D1 P Tape withdraw direction [Ordering Information] φ178 ± 2 2.0 ± 0.5 W2 9 9 4 ± 0.5 W1 11.4 11.4 0° Tape width 8 8 12 [Reel] Package MPAK-5 CMPAK-5 11.4 φ13 ± 0.5 K0 Ordering Unit 3,000 pcs 9.0 Mark Indication • MPAK-5 1 G R03DS0083EJ0200 Rev.2.00 Jan 10, 2014 • CMPAK-5 Trace Code 1G Trace Code Page 15 of 15 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. 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