HAT1047RJ

HAT1047R, HAT1047RJ Silicon P Channel Power MOS FET High Speed Power Switching REJ03G0074-0500Z (Previous ADE-208-1545D(Z)) Rev.5.00 Aug.27.2003 Features • • • • For Automotive Application (at Type Code "J") Low on-resistance Capable of –4.5 V gate drive High density mounting Outline SOP-8 8 5 76 56 7 8 DD D D 3 12 4 4 G SSS 123 1, 2, 3 4 5, 6, 7, 8 Source Gate Drain Rev.5.00, Aug.27.2003, page 1 of 9 HAT1047R, HAT1047RJ Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Avalanche current HAT1047R HAT1047RJ Avalanche energy HAT1047R HAT1047RJ Channel dissipation Channel temperature Storage temperature Pch Tch Tstg Note2 Symbol VDSS VGSS ID ID(pulse)Note1 IDR IAP Note3 Ratings –30 ±20 –14 –112 –14 — –14 Unit V V A A A — A — mJ W °C °C EAR Note3 — 19.6 2.5 150 –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1 % 2. When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s 3. Value at Tch = 25°C, Rg ≥ 50 Ω Rev.5.00, Aug.27.2003, page 2 of 9 HAT1047R, HAT1047RJ Electrical Characteristics (Ta = 25°C) Item Symbol Min –30 Typ — — — — — — — 10 19 16 3500 750 520 64 10 12 23 45 80 25 –0.82 45 Max — — ±10 ±1 — –20 –2.5 12 25 — — — — — — — — — — — –1.07 — Unit V mV µA µA µA µA V mΩ mΩ S pF pF pF nc nc nc ns ns ns ns V ns Test Conditions ID = –10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ± 16V, VDS = 0 VDS = –30 V, VGS = 0 VDS = –24 V, VGS = 0 Ta = 125°C VDS = –10 V, ID = –1 mA ID = –7 A, VGS = –10 V Note4 ID = –7 A, VGS = –4.5 V Note4 ID = –7 A, VDS = –10 V Note4 VDS = –10 V VGS = 0 f = 1 MHz VDD = –10 V VGS = –10 V ID = –14 A VGS = –10 V, ID = –7A VDD ≅ –10 V RL = 1.43 Ω RL = 4.7 Ω IF = –14 A, VGS = 0 Note4 IF = –14 A, VGS = 0 diF/ dt = 100 A/µs Drain to source breakdown voltage V(BR)DSS Gate to source leak current Zero gate voltage drain current Zero gate voltage drain current HAT1047R HAT1047RJ IGSS IDSS IDSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDF trr Gate to source breakdown voltage V(BR)GSS ±20 — — — — –1.0 — — 9.6 — — — — — — — — — — — — Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Notes: 4. Pulse test Rev.5.00, Aug.27.2003, page 3 of 9 HAT1047R, HAT1047RJ Main Characteristics Power vs. Temperature Derating 4.0 Pch (W) Maximum Safe Operation Area -500 -100 I D (A) PW Op era tio n( 3.0 Test condition. When using the glass epoxy board. (FR4 40 x 40 x 1.6 mm), (PW ≤ 10s) 10 µs 10 0µ -10 1m s Channel Dissipation DC =1 s Drain Current 2.0 0m N s 1.0 -1 Operation in this area is limited by R DS(on) -0.1 Ta = 25°C 1 shot Pulse PW ≤ 1 ote 1 0s ) 0 50 100 150 200 Ambient Temperature Ta (°C) -0.01 -0.1 -0.3 -1 -3 -10 -30 -100 Drain to Source Voltage V DS (V) Note 1: When using the glass epoxy board. ( FR4 40 x 40 x 1.6 mm) Typical Output Characteristics Typical Transfer Characteristics -50 -10 V -8 V I D (A) -50 Pulse Test (A) -40 -4 V -40 V DS = -10 V Pulse Test -30 Drain Current ID Drain Current -30 -20 -3 V -10 VGS = -2 V 0 -2 -4 -6 -8 -10 -20 75°C 25°C Tc = -25°C 0 -1 -2 -3 -4 VGS (V) -5 -10 Drain to Source Voltage V DS (V) Gate to Source Voltage Rev.5.00, Aug.27.2003, page 4 of 9 HAT1047R, HAT1047RJ Drain to Source Saturation Voltage vs. Gate to Source Voltage Drain to Source Saturation Voltage V DS(on) (mV) I D = -10 A -160 Pulse Test Drain to Source On State Resistance R DS(on) (m Ω) -200 Static Drain to Source on State Resistance vs. Drain Current 100 Pulse Test 50 -4.5 V -120 -5 A 20 10 -80 VGS = -10 V 5 2 1.0 -1 -40 -2 A 0 -12 -4 -8 Gate to Source Voltage -16 -20 V GS (V) -2 -5 -10 -20 -50 -100 -200 Drain Current I D (A) Static Drain to Source on State Resistance R DS(on) (mΩ ) Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance vs. Temperature 40 Pulse Test 32 -10 A Forward Transfer Admittance vs. Drain Current 500 200 100 50 20 10 5 2 1.0 0.5 0.1 1.0 10 100 25°C 75°C Tc = –25°C V DS = -10 V Pulse Test 24 V GS = -4.5 V I D = -2,-5 A 16 -2, -5, -10 A -10 V 8 0 -40 0 40 80 120 160 Case Temperature Tc (°C) Drain Current I D (A) Rev.5.00, Aug.27.2003, page 5 of 9 HAT1047R, HAT1047RJ Body-Drain Diode Reverse Recovery Time 500 Reverse Recovery Time trr (ns) Typical Capacitance vs. Drain to Source Voltage 30000 VGS = 0 f = 1 MHz 10000 Ciss 200 100 50 Capacitance C (pF) 1000 Coss Crss 20 10 -1 di / dt = 100 A / µs V GS = 0, Ta = 25°C -2 -5 -10 -20 -50 -100 Reverse Drain Current I DR (A) 100 0 -10 -20 -30 -40 -50 Drain to Source Voltage V DS (V) Dynamic Input Characteristics V DS (V) Switching Time t (ns) -10 V DS V DD = - 5 V -10 V -25 V V GS (V) 0 0 1000 500 200 100 50 20 10 Switching Characteristics V GS = -10 V, VDD = -10 V PW = 5 µs, duty < 1 % -4 Drain to Source Voltage Gate to Source Voltage -20 -8 V GS -12 t d(off) tr -30 VDD = - 5 V -10 V -25 V tf t d(on) -40 I D = -14 A 16 32 48 64 Gate Charge Qg (nc) -16 -20 80 -50 0 -0.1 -0.2 -0.5 -1 -2 -5 I D (A) -10 -20 Drain Current Rev.5.00, Aug.27.2003, page 6 of 9 HAT1047R, HAT1047RJ Maximum Avalanche Energy vs. Channel Temperature Derating Repetitive Avalanche Energy EAR (mJ) Reverse Drain Current vs. Source to Drain Voltage -50 (A) 20 I AP = -14 A V DD = -15 V duty < 0.1 % Rg > 50 Ω -40 Reverse Drain Current I F -10 V -5V 16 -30 V GS = 0, 5 V 12 -20 8 -10 Pulse Test 0 -0.4 -0.8 -1.2 -1.6 -2.0 4 0 25 Source to Drain Voltage V SDF (V) 50 75 100 125 150 Channel Temperature Tch (°C) Avalanche Test Circuit 1 2 Avalanche Waveform 2 V DS Monitor L IAP Monitor EAR = L • I AP • VDSS VDSS - VDD V (BR)DSS I AP VDD ID V DS Rg Vin -15 V D. U. T 50 Ω 0 VDD Rev.5.00, Aug.27.2003, page 7 of 9 HAT1047R, HAT1047RJ Normalized Transient Thermal Impedance vs. Pulse Width 10 Normalized Transient Thermal Impedance γ s (t) 1 D=1 0.5 0.1 0.2 0.1 0.05 0.01 0.02 0.01 lse θ ch - f(t) = γ s (t) x θ ch - f θ ch - f = 83.3°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm) u tp PDM PW T 0.001 1s ho D= PW T 0.0001 10 µ 100 µ 1m 10 m 100 m 1 10 Pulse Width PW (S) 100 1000 1000 Switching Time Test Circuit Vin Monitor Rg D.U.T. RL Vout Monitor Vin Switching Time Waveform 10% 90% Vin -10 V V DD = -10 V Vout td(on) 90% 10% tr td(off) 90% 10% tf Rev.5.00, Aug.27.2003, page 8 of 9 HAT1047R, HAT1047RJ Package Dimensions As of January, 2003 Unit: mm 4.90 5.3 Max 5 8 1 4 3.95 *0.22 ± 0.03 0.20 ± 0.03 1.75 Max 0.75 Max 6.10 – 0.30 + 0.10 1.08 0˚ – 8˚ + 0.67 0.14 – 0.04 + 0.11 1.27 0.60 – 0.20 *0.42 ± 0.08 0.40 ± 0.06 0.15 0.25 M *Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms — 0.085 g Rev.5.00, Aug.27.2003, page 9 of 9 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: (408) 382-7500 Fax: (408) 382-7501 Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: (1628) 585 100, Fax: (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: (89) 380 70 0, Fax: (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: 2265-6688, Fax: 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Tel: (2) 2715-2888, Fax: (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: (21) 6472-1001, Fax: (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: 6213-0200, Fax: 6278-8001 http://www.renesas.com © 2003. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon 1.0