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HAT2050T

HAT2050T

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

  • 描述:

    HAT2050T - Silicon N Channel Power MOS FET High Speed Power Switching - Renesas Technology Corp

  • 数据手册
  • 价格&库存
HAT2050T 数据手册
HAT2050T Silicon N Channel Power MOS FET High Speed Power Switching REJ03G1171-0300 (Previous: ADE-208-660A) Rev.3.00 Sep 07, 2005 Features • • • • Low on-resistance Capable of 4 V gate drive Low drive current High density mounting Outline RENESAS Package code: PTSP0008JB-A (Package name: TSSOP-8 ) 1 D 8 D 87 65 12 34 4 G 5 G 1, 8 2, 3, 6, 7 4, 5 SS 67 MOS2 Drain Source Gate SS 23 MOS1 Rev.3.00 Sep 07, 2005 page 1 of 7 HAT2050T Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Channel dissipation Channel dissipation Channel temperature Storage temperature Symbol VDSS VGSS ID ID (pulse) IDR Note 1 Value 100 ±20 1 4 1 1.0 1.5 150 –55 to +150 Unit V V A A A W W °C °C Pch Note 3 Pch Tch Tstg Note 2 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. 1 Drive operation: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s 3. 2 Drive operation: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Note: 4. Pulse test Symbol V (BR) DSS V (BR) GSS IGSS IDSS VGS (off) RDS (on) RDS (on) |yfs| Ciss Coss Crss td (on) tr td (off) tf VDF trr Min 100 ±20 — — 1.3 — — 0.7 — — — — — — — — — Typ — — — — — 0.56 0.72 1.1 90 42 20 11 24 14 11 0.84 85 Max — — ±10 1 2.3 0.75 1.0 — — — — — — — — 1.1 — Unit V V µA µA V Ω Ω S pF pF pF ns ns ns ns V ns IF = 1 A, VGS = 0 IF = 1 A, VGS = 0 diF/dt = 20 A/µs Note 4 Test Conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 100 V, VGS = 0 VDS = 10 V, ID = 1 mA ID = 0.5 A, VGS = 10 V Note 4 ID = 0.5 A, VGS = 4 V ID = 0.5 A, VDS = 10 V VDS = 10 V VGS = 0 f = 1 MHz VGS = 4 V, ID = 0.5 A, VDD ≅ 10 V Note 4 Note 4 Rev.3.00 Sep 07, 2005 page 2 of 7 HAT2050T Main Characteristics Power vs. Temperature Derating 2.0 10 Test Condition: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s 3 10 Maximum Safe Operation Area 10 µs 0µ Pch (W) ID (A) 1.5 1 DC s Channel Dissipation 0.3 0.1 0.03 0.01 Op Drain Current 1.0 1 Dr ive 0.5 Op ion ms (P Operation in W ≤1 this area is 0 s) N limited by RDS (on) o er PW 1m at = s 10 2 Dr ive er er Op ion at te 5 at ion 0 0 50 100 150 200 Ta = 25°C 0.003 1 shot Pulse 1 Drive Operation 0.001 0.2 1 3 10 30 100 200 Ambient Temperature Ta (°C) Drain to Source Voltage VDS (V) Note 5: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) Typical Output Characteristics 5 8V Pulse Test 5 Typical Transfer Characteristics (A) (A) 4 10 V 3 6V 5V 4V 4 –25°C Tc = 75°C 25°C ID ID 3 Drain Current 2 3V 1 VGS = 2.5 V 0 0 2 4 6 8 10 Drain Current 2 1 VDS = 10 V Pulse Test 0 0 2 4 6 8 10 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage VDS (on) (V) Pulse Test 1.6 ID = 2 A 1.2 Static Drain to Source on State Resistance vs. Drain Current Drain to Source on State Resistance RDS (on) (Ω) 20 Pulse Test 10 5 2.0 Drain to Source Voltage 2 1 0.5 4V VGS = 10 V 0.8 1A 0.4 0.5 A 0 0 2 4 6 8 10 0.2 0.2 0.5 1 2 5 10 20 Gate to Source Voltage VGS (V) Drain Current ID (A) Rev.3.00 Sep 07, 2005 page 3 of 7 HAT2050T Static Drain to Source on State Resistance vs. Temperature 2.0 Pulse Test 1.6 ID = 2 A 1 A, 0.5 A 1.2 VGS = 2.5 V 0.8 4V 2A 1 A, 0.5 A 0.4 Static Drain to Source on State Resistance RDS (on) (Ω) Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) 5 Tc = –25°C 2 1 0.5 75°C 25°C 0.2 0.1 0.05 0.02 VDS = 10 V Pulse Test 0.05 0.1 0.2 0.5 1 2 0 –40 0 40 80 120 160 Case Temperature Tc (°C) Drain Current ID (A) Typical Capacitance vs. Drain to Source Voltage 1000 300 100 30 10 3 1 Ciss Coss Crss VGS = 0 f = 1 MHz Body-Drain Diode Reverse Recovery Time Reverse Recovery Time trr (ns) 500 100 50 20 10 5 0.1 di / dt = 20 A / µs VGS = 0, Ta = 25°C 0.2 0.5 1 2 5 10 Capacitance C (pF) 200 0 10 20 30 40 50 Reverse Drain Current IDR (A) Drain to Source Voltage VDS (V) Dynamic Input Characteristics VDS (V) ID = 1 A VDD = 5 V 10 V 20 V VGS VDS 20 4 8 Switching Characteristics VGS (V) 10 100 50 td(off) td(on) tr 5 tf 50 40 Drain to Source Voltage Switching Time t (ns) 30 6 Gate to Source Voltage 20 10 10 VDD = 20 V 10 V 5V 0 0.8 1.6 2.4 3.2 2 2 1 0.01 0.02 VGS = 4 V, VDD = 10 V PW = 5 µs, duty ≤ 1 % 0.05 0.1 0.2 0.5 1 0 0 4.0 Gate Charge Qg (nc) Drain Current ID (A) Rev.3.00 Sep 07, 2005 page 4 of 7 HAT2050T Reverse Drain Current vs. Source to Drain Voltage 5 Reverse Drain Current IDR (A) 4 3 2 5V VGS = 0 1 Pulse Test 0 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage Normalized Transient Thermal Impedance γ s (t) 10 VSD (V) Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation) 1 D=1 0.5 0.2 0.1 0.1 0.05 0.02 0.01 1s h p ot uls 0.01 e θch – f (t) = γ s (t) • θch – f θch – f = 166°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) PDM PW T D= PW T 0.001 0.0001 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation) Normalized Transient Thermal Impedance γ s (t) 10 1 D=1 0.5 0.1 0.2 0.1 0.01 0.05 0.02 0.01 h p ot uls e θch – f (t) = γ s (t) • θch – f θch – f = 210°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) PDM PW T D= PW T 0.001 1s 0.0001 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Rev.3.00 Sep 07, 2005 page 5 of 7 HAT2050T Switching Time Test Circuit Switching Time Waveform Vin Monitor D.U.T. RL Vout Monitor Vin Vout 10% 10% 90% 10% Vin 4V 50 Ω VDD = 10 V td(on) 90% tr 90% td(off) tf Rev.3.00 Sep 07, 2005 page 6 of 7 HAT2050T Package Dimensions JEITA Package Code P-TSSOP8-4.4 × 3-0.65 RENESAS Code PTSP0008JB-A Package Name TTP-8D MASS[Typ.] 0.034g F *1 D 8 5 *2 E HE bp b1 Index mark c1 c 1 Z 4 *3 bp Terminal cross section NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. xM Reference Symbol Dimension in Millimeters Min Nom 3.00 4.40 Max 3.30 e L1 D E A2 A1 A 0.03 0.07 0.10 1.10 A bp b1 0.15 0.22 0.20 0.30 A1 c 0.12 0.17 0.15 0.22 y Detail F L c1 0° HE e x y Z L L1 0.40 6.20 8° 6.40 0.65 0.13 0.10 0.805 0.50 1.0 0.60 6.60 Ordering Information Part Name Quantity Shipping Container HAT2050T-EL-E 3000 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.3.00 Sep 07, 2005 page 7 of 7 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: (408) 382-7500, Fax: (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: (1628) 585-100, Fax: (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: 2265-6688, Fax: 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: (2) 2715-2888, Fax: (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: (21) 6472-1001, Fax: (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: 6213-0200, Fax: 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: 2-796-3115, Fax: 2-796-2145 http://www.renesas.com Renesas Technology Malaysia Sdn. Bhd. Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: 7955-9390, Fax: 7955-9510 © 2005. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .3.0
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