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HC5515CMZ

HC5515CMZ

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    LCC28

  • 描述:

    IC TELECOM INTERFACE 28PLCC

  • 数据手册
  • 价格&库存
HC5515CMZ 数据手册
HC5515 ® Data Sheet June 6, 2006 FN4235.6 ITU CO/PABX SLIC with Low Power Standby Features The HC5515 is a subscriber line interface circuit which is interchangeable with Ericsson’s PBL3860 for distributed central office applications. Enhancements include immunity to circuit latch-up during hot plug and absence of false signaling in the presence of longitudinal currents. • Programmable Current Feed (20mA to 60mA) The HC5515 is fabricated in a High Voltage Dielectrically Isolated (DI) Bipolar Process that eliminates leakage currents and device latch-up problems normally associated with junction isolated ICs. The elimination of the leakage currents results in improved circuit performance for wide temperature extremes. The latch free benefit of the DI process guarantees operation under adverse transient conditions. This process feature makes the HC5515 ideally suited for use in harsh outdoor environments. • Compatible with Ericsson’s PBL3860 Ordering Information Applications PART NUMBER PART MARKING HC5515CM HC5515CM HC5515CMZ HC5515CMZ (Note) TEMP. RANGE (°C) PACKAGE 0 to 70 28 Ld PLCC 0 to 70 28 Ld PLCC (Pb-free) • DI Monolithic High Voltage Process • Ring Trip Detection • Thermal Shutdown • On-Hook Transmission • Wide Battery Voltage Range (-24V to -58V) • Low Standby Power • -40°C to 85°C Ambient Temperature Range • Pb-Free Plus Anneal Available (RoHS Compliant) • Digital Loop Carrier Systems • Pair Gain • Fiber-In-The-Loop ONUs • POTS N28.45 • Wireless Local Loop • PABX N28.45 • Hybrid Fiber Coax PKG. DWG. # NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 • Programmable Loop Current Detector Threshold and Battery Feed Characteristics • Related Literature - AN9632, Operation of the HC5523/15 Evaluation Board CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2000, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. HC5515 Block Diagram RINGRLY DT DR RING RELAY DRIVER 4-WIRE INTERFACE VF SIGNAL PATH RING TRIP DETECTOR VTX RSN TIP RING HPT 2-WIRE INTERFACE HPR LOOP CURRENT DETECTOR E0 DIGITAL MULTIPLEXER C1 C2 VBAT VCC VEE DET BIAS RD AGND RDC BGND RSG 2 FN4235.6 June 6, 2006 HC5515 Absolute Maximum Ratings Thermal Information Temperature, Humidity Storage Temperature Range . . . . . . . . . . . . . . . . .-65°C to 150°C Operating Temperature Range. . . . . . . . . . . . . . . . -40°C to 110°C Operating Junction Temperature Range . . . . . . . .-40°C to 150°C Power Supply (-40°C ≤ TA ≤ 85°C) Supply Voltage VCC to GND . . . . . . . . . . . . . . . . . . . . 0.5V to 7V Supply Voltage VEE to GND. . . . . . . . . . . . . . . . . . . . . -7V to 0.5V Supply Voltage VBAT to GND . . . . . . . . . . . . . . . . . . . -80V to 0.5V Ground Voltage between AGND and BGND . . . . . . . . . . . . . -0.3V to 0.3V Relay Driver Ring Relay Supply Voltage . . . . . . . . . . . . . . . . . . . . . . 0V to 20V Ring Relay Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Ring Trip Comparator Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VBAT to 0V Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5mA to 5mA Digital Inputs, Outputs (C1, C2, E0, DET) Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to VCC Output Voltage (DET Not Active) . . . . . . . . . . . . . . . . . .0V to VCC Output Current (DET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Tipx and Ringx Terminals (-40°C ≤ TA ≤ 85°C) Tipx or Ringx Voltage, Continuous (Referenced to GND)VBAT to +2V Tipx or Ringx, Pulse < 10ms, TREP > 10s . . . . VBAT -20V to +5V Tipx or Ringx, Pulse < 10µs, TREP > 10s. . . . VBAT -40V to +10V Tipx or Ringx, Pulse < 250ns, TREP > 10s. . . VBAT -70V to +15V Tipx or Ringx Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70mA ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .500V Thermal Resistance (Typical, Note 1) θJA (°C/W) 28 Lead PLCC Package. . . . . . . . . . . . . . . . . . . . . . 53 Continuous Power Dissipation at 70°C 28 Lead PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5W Package Power Dissipation at 70°C, t < 100ms, tREP > 1s 28 Lead PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4W Derate above . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18.8mW/°C PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18.8mW/°C Maximum Junction Temperature Range . . . . . . . . . . -40°C to 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C (PLCC - Lead Tips Only) Die Characteristics Gate Count . . . . . . . . . . . . . . . . . . . . . . 543 Transistors, 51 Diodes CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Typical Operating Conditions These represent the conditions under which the part was developed and are suggested as guidelines. PARAMETER CONDITIONS Case Temperature MIN TYP MAX UNITS -40 - 100 °C -40°C to 85°C 4.75 - 5.25 V VEE with Respect to AGND -40°C to 85°C -5.25 - -4.75 V VBAT with Respect to BGND -40°C to 85°C -58 - -24 V VCC with Respect to AGND TA = 0°C to 70°C, VCC = +5V ±5%, VEE = -5V ±5%, VBAT = -48V, AGND = BGND = 0V, RDC1 = RDC2 = 41.2kΩ, RD = 39kΩ, RSG = 0Ω, RF1 = RF2 = 0Ω, CHP = 10nF, CDC = 1.5µF, ZL = 600Ω, Unless Otherwise Specified. Electrical Specifications PARAMETER CONDITIONS MIN Overload Level 1% THD, ZL = 600Ω, (Note 2, Figure 1) Longitudinal Impedance (Tip/Ring) 0 < f < 100Hz (Note 3, Figure 2) VTX 19 TIP 27 RL 600Ω RT 600kΩ VTRO MAX UNITS 3.1 - - VPEAK - 20 35 Ω/Wire AT TIP 27 1VRMS 0 < f < 100Hz EL C TYP VT 300Ω VTX 19 RT 600kΩ 2.16µF IDCMET 23mA RRX RING 28 RSN 16 ERX 300kΩ 300Ω VR AR RRX RING 28 LZT = VT/AT FIGURE 1. OVERLOAD LEVEL (TWO-WIRE PORT) 3 RSN 16 300kΩ LZR = VR/AR FIGURE 2. LONGITUDINAL IMPEDANCE FN4235.6 June 6, 2006 HC5515 TA = 0°C to 70°C, VCC = +5V ±5%, VEE = -5V ±5%, VBAT = -48V, AGND = BGND = 0V, RDC1 = RDC2 = 41.2kΩ, RD = 39kΩ, RSG = 0Ω, RF1 = RF2 = 0Ω, CHP = 10nF, CDC = 1.5µF, ZL = 600Ω, Unless Otherwise Specified. (Continued) Electrical Specifications PARAMETER CONDITIONS MIN TYP MAX UNITS LONGITUDINAL CURRENT LIMIT (TIP/RING) Off-Hook (Active) No False Detections, (Loop Current), LB > 45dB (Note 4, Figure 3A) 20 - - mAPEAK/ Wire On-Hook (Standby), RL = ∞ No False Detections (Loop Current) (Note 5, Figure 3B) 5 - - mAPEAK/ Wire 368Ω 368Ω A TIP 27 RSN 16 A 2.16µF EL 39kΩ C EL RDC1 41.2kΩ RD -5V 2.16µF A 368Ω RING RDC 14 41.2kΩ 28 DET RSN 16 39kΩ RD RDC1 41.2kΩ RDC2 RDC RING 14 41.2kΩ 28 DET CDC -5V 2.16µF CDC RDC2 C TIP 27 C A 368Ω 1.5µF FIGURE 3A. OFF-HOOK 1.5µF FIGURE 3B. ON-HOOK FIGURE 3. LONGITUDINAL CURRENT LIMIT OFF-HOOK LONGITUDINAL BALANCE Longitudinal to Metallic IEEE 455 - 1985, RLR, RLT = 368Ω 0.2kHz < f < 4.0kHz (Note 6, Figure 4) 53 70 - dB Longitudinal to Metallic RLR, RLT = 300Ω, 0.2kHz < f < 4.0kHz (Note 6, Figure 4) 53 70 - dB Metallic to Longitudinal FCC Part 68, Para 68.310 0.2kHz < f < 1.0kHz 50 55 - dB 1.0kHz < f < 4.0kHz (Note 7) 50 55 - dB Longitudinal to 4-Wire 0.2kHz < f < 4.0kHz (Note 8, Figure 4) 53 70 - dB Metallic to Longitudinal RLR, RLT = 300Ω, 0.2kHz < f < 4.0kHz (Note 9, Figure 5) 50 55 - dB 4-Wire to Longitudinal 0.2kHz < f < 4.0kHz (Note 10, Figure 5) 50 55 - dB RLT RLT TIP 27 EL VTX 19 C RT 600kΩ VTR 2.16µF RRX RLR RING 28 RSN 16 RT 600kΩ ETR VTX C VL 300kΩ FIGURE 4. LONGITUDINAL TO METALLIC AND LONGITUDINAL TO 4-WIRE BALANCE 2-Wire Return Loss CHP = 20nF 2.16µF VTX 19 TIP 27 300Ω RRX RLR RING 28 300Ω RSN 16 ERX 300kΩ FIGURE 5. METALLIC TO LONGITUDINAL AND 4-WIRE TO LONGITUDINAL BALANCE 0.2kHz to 0.5kHz (Note 11, Figure 6) 25 - - dB 0.5kHz to 1.0kHz (Note 11, Figure 6) 27 - - dB 1.0kHz to 3.4kHz (Note 11, Figure 6) 23 - - dB Active, IL = 0 - -1.5 - V Standby, IL = 0 - -48 - V TIP IDLE VOLTAGE RING IDLE VOLTAGE 4 FN4235.6 June 6, 2006 HC5515 TA = 0°C to 70°C, VCC = +5V ±5%, VEE = -5V ±5%, VBAT = -48V, AGND = BGND = 0V, RDC1 = RDC2 = 41.2kΩ, RD = 39kΩ, RSG = 0Ω, RF1 = RF2 = 0Ω, CHP = 10nF, CDC = 1.5µF, ZL = 600Ω, Unless Otherwise Specified. (Continued) Electrical Specifications PARAMETER MIN TYP MAX UNITS VBAT = -52V, RSG = 0Ω CONDITIONS 43 - 47 V Overload Level ZL > 20kΩ, 1% THD (Note 12, Figure 7) 3.1 - - VPEAK Output Offset Voltage EG = 0, ZL = ∞ (Note 13, Figure 7) -60 - 60 mV Output Impedance (Guaranteed by Design) 0.2kHz < f < 03.4kHz - 5 20 W 2-Wire to 4-Wire (Metallic to VTX) Voltage Gain 0.3kHz < f < 03.4kHz (Note 14, Figure 7) 0.98 1.0 1.02 V/V TIP-RING Open Loop Metallic Voltage, VTR 4-WIRE TRANSMIT PORT (VTX) ZD 2.16µF TIP 27 R VTX 19 RL 600Ω VM RT 600kΩ VS R EG ZIN RLR TIP 27 C VTX 19 VTR RT 600kΩ IDCMET 23mA RSN 16 RING 28 300kΩ FIGURE 6. TWO-WIRE RETURN LOSS ZL RRX RRX RING 28 VTXO VTX RSN 16 300kΩ FIGURE 7. OVERLOAD LEVEL (4-WIRE TRANSMIT PORT), OUTPUT OFFSET VOLTAGE, 2-WIRE TO 4-WIRE VOLTAGE GAIN AND HARMONIC DISTORTION 4-WIRE RECEIVE PORT (RSN) DC Voltage IRSN = 0mA - 0 - V RX Sum Node Impedance (Gtd by Design) 0.2kHz < f < 3.4kHz - - 20 W Current Gain-RSN to Metallic 0.3kHz < f < 3.4kHz (Note 15, Figure 8) 900 1000 1100 Ratio 2-Wire to 4-Wire 0dBm at 1.0kHz, ERX = 0V 0.3kHz < f < 3.4kHz (Note 16, Figure 9) -0.2 - 0.2 dB 4-Wire to 2-Wire 0dBm at 1.0kHz, EG = 0V 0.3kHz < f < 3.4kHz (Note 17, Figure 9) -0.2 - 0.2 dB 4-Wire to 4-Wire 0dBm at 1.0kHz, EG = 0V 0.3kHz < f < 3.4kHz (Note 18, Figure 9) -0.2 - 0.2 dB 2-Wire to 4-Wire 0dBm, 1kHz (Note 19, Figure 9) -0.2 - 0.2 dB 4-Wire to 2-Wire 0dBm, 1kHz (Note 20, Figure 9) -0.2 - 0.2 dB 2-Wire to 4-Wire +3dBm to +7dBm (Note 21, Figure 9) -0.15 - 0.15 dB 2-Wire to 4-Wire -40dBm to +3dBm (Note 21, Figure 9) -0.1 - 0.1 dB 2-Wire to 4-Wire -55dBm to -40dBm (Note 21, Figure 9) -0.2 - 0.2 dB 4-Wire to 2-Wire -40dBm to +7dBm (Note 22, Figure 9) -0.1 - 0.1 dB FREQUENCY RESPONSE (OFF-HOOK) INSERTION LOSS GAIN TRACKING (Ref = -10dBm, at 1.0kHz) 5 FN4235.6 June 6, 2006 HC5515 TA = 0°C to 70°C, VCC = +5V ±5%, VEE = -5V ±5%, VBAT = -48V, AGND = BGND = 0V, RDC1 = RDC2 = 41.2kΩ, RD = 39kΩ, RSG = 0Ω, RF1 = RF2 = 0Ω, CHP = 10nF, CDC = 1.5µF, ZL = 600Ω, Unless Otherwise Specified. (Continued) Electrical Specifications PARAMETER CONDITIONS 4-Wire to 2-Wire -55dBm to -40dBm (Note 22, Figure 9) MIN TYP MAX UNITS -0.2 - 0.2 dB GRX = ((VTR1- VTR2)(300k))/(-3)(600) Where: VTR1 is the Tip to Ring Voltage with VRSN = 0V and VTR2 is the Tip to Ring Voltage with VRSN = -3V V RSN = 0V C RRX TIP 27 RL 600Ω RSN 16 VRSN = -3V TIP 27 RL 600Ω 300kΩ RDC1 41.2kΩ VTR IDCMET VTX 19 RT 600kΩ VTR EG CDC RDC2 RING 28 RDC 14 RRX 1/ωC < RL RING 28 1.5µF 41.2kΩ FIGURE 8. CURRENT GAIN-RSN TO METALLIC RSN 16 VTX ERX 300kΩ FIGURE 9. FREQUENCY RESPONSE, INSERTION LOSS, GAIN TRACKING AND HARMONIC DISTORTION NOISE Idle Channel Noise at 2-Wire C-Message Weighting (Note 23, Figure 10) - 8.5 - dBrnC Psophometrical Weighting (Note 23, Figure 10) - -81.5 - dBrnp C-Message Weighting (Note 24, Figure 10) - 8.5 - dBrnC Psophometrical Weighting (Note 23, Figure 10) - -81.5 - dBrnp 2-Wire to 4-Wire 0dBm, 1kHz (Note 25, Figure 7) - -65 -54 dB 4-Wire to 2-Wire 0dBm, 0.3kHz to 3.4kHz (Note 26, Figure 9) - -65 -54 dB Idle Channel Noise at 4-Wire HARMONIC DISTORTION BATTERY FEED CHARACTERISTICS Constant Loop Current Tolerance RDCX = 41.2kΩ IL = 2500/(RDC1 + RDC2), -40°C to 85°C (Note 27) 0.85IL IL 1.15IL mA Loop Current Tolerance (Standby) IL = (VBAT-3)/(RL +1800), -40°C to 85°C (Note 28) 0.75IL IL 1.25IL mA Open Circuit Voltage (VTIP - VRING) -40°C to 85°C, (Active) RSG = ∞ 14 16.67 20 V On-Hook to Off-Hook RD = 33kΩ, -40°C to 85°C 11 465/RD 17.2 mA Off-Hook to On-Hook RD = 33kΩ, -40°C to 85°C 9.5 405/RD 15.0 mA Loop Current Hysteresis RD = 33kΩ, -40°C to 85°C - 60/RD - mA LOOP CURRENT DETECTOR TIP 27 RL 600Ω VTX 19 RT 600kΩ VTR VTX RRX RING 28 RSN 16 300kΩ FIGURE 10. IDLE CHANNEL NOISE 6 FN4235.6 June 6, 2006 HC5515 TA = 0°C to 70°C, VCC = +5V ±5%, VEE = -5V ±5%, VBAT = -48V, AGND = BGND = 0V, RDC1 = RDC2 = 41.2kΩ, RD = 39kΩ, RSG = 0Ω, RF1 = RF2 = 0Ω, CHP = 10nF, CDC = 1.5µF, ZL = 600Ω, Unless Otherwise Specified. (Continued) Electrical Specifications PARAMETER CONDITIONS MIN TYP MAX UNITS RING TRIP DETECTOR (DT, DR) Offset Voltage Source Res = 0 -20 - 20 mV Input Bias Current Source Res = 0 -360 - 360 nA Input Common-Mode Range Source Res = 0 VBAT +1 - 0 V Input Resistance Source Res = 0, Unbalanced 1 - - MΩ Source Res = 0, Balanced 3 - - MΩ VSAT at 25mA IOL = 25mA - 0.2 0.6 V Off-State Leakage Current VOH = 12V - - 10 µA 0 - 0.8 V RING RELAY DRIVER DIGITAL INPUTS (E0, C1, C2) Input Low Voltage, VIL 2 - VCC V VIL = 0.4V -200 - - µA Input Low Current, IIL: E0 VIL = 0.4V -100 - - µA Input High Current VIH = 2.4V - - 40 µA Output Low Voltage, VOL IOL = 2mA - - 0.45 V Output High Voltage, VOH IOH = 100µA Input High Voltage, VIH Input Low Current, IIL: C1, C2 DETECTOR OUTPUT (DET) Internal Pull-Up Resistor 2.7 - - V 8 15 25 kΩ - 26.3 70 mW POWER DISSIPATION (VBAT = -48V) Open Circuit State C1 = C2 = 0 On-Hook, Standby C1 = C2 = 1 - 37.5 85 mW On-Hook, Active C1 = 0, C2 = 1, RL = High Impedance - 110 300 mW Off-Hook, Active C1 = 0, C2 = 1, RL = 600Ω - 1.1 1.4 W 150 - 180 °C TEMPERATURE GUARD Thermal Shutdown SUPPLY CURRENTS (VBAT = -28V) Open Circuit State (C1, 2 = 0, 0) On-Hook Standby State (C1, 2 = 1, 1) On-Hook Active State (C1, 2 = 0, 1) On-Hook ICC - 1.3 2.8 mA IEE - 0.6 2.0 mA IBAT - 0.35 1.2 mA ICC - 1.6 3.5 mA IEE - 0.62 2.0 mA IBAT - 0.55 1.6 mA ICC - 3.7 9.5 mA IEE - 1.1 4.0 mA IBAT - 2.2 5.2 mA PSRR VCC to 2 or 4-Wire Port (Note 29, Figure 11) - 40 - dB VEE to 2 or 4-Wire Port (Note 29, Figure 11) - 40 - dB 7 FN4235.6 June 6, 2006 HC5515 TA = 0°C to 70°C, VCC = +5V ±5%, VEE = -5V ±5%, VBAT = -48V, AGND = BGND = 0V, RDC1 = RDC2 = 41.2kΩ, RD = 39kΩ, RSG = 0Ω, RF1 = RF2 = 0Ω, CHP = 10nF, CDC = 1.5µF, ZL = 600Ω, Unless Otherwise Specified. (Continued) Electrical Specifications PARAMETER CONDITIONS VBAT to 2 or 4-Wire Port (Note 29, Figure 11) -48V SUPPLY +5V SUPPLY -5V SUPPLY MIN TYP MAX UNITS - 40 - dB 100mVRMS, 50Hz TO 4kHz TIP 27 VTX 19 RT 600kΩ RL 600Ω PSRR = 20 log (VT X/VIN) VTX RRX RING 28 RSN 16 300kΩ FIGURE 11. POWER SUPPLY REJECTION RATIO Circuit Operation and Design Information The HC5515 is a current feed voltage sense Subscriber Line Interface Circuit (SLIC). This means that for short loop applications the SLIC provides a programed constant current to the tip and ring terminals while sensing the tip to ring voltage. The following discussion separates the SLIC’s operation into its DC and AC paths, then follows up with additional circuit and design information. Constant Loop Current (DC) Path SLIC in the Active Mode The DC path establishes a constant loop current that flows out of tip and into the ring terminal. The loop current is programmed by resistors RDC1, RDC2 and the voltage on the RDC pin (Figure 12). The RDC voltage is determined by the voltage across R1 in the saturation guard circuit. Under constant current feed conditions, the voltage drop across R1 sets the RDC voltage to -2.5V. This occurs when current flows through R1 into the current source I2. The RDC voltage establishes a current (IRSN) that is equal to VRDC/(RDC1 +RDC2). This current is then multiplied by 1000, in the loop current circuit, to become the tip and ring loop currents. For the purpose of the following discussion, the saturation guard voltage is defined as the maximum tip to ring voltage at which the SLIC can provide a constant current for a given battery and overhead voltage. 8 For loop resistances that result in a tip to ring voltage less than the saturation guard voltage the loop current is defined as: 2.5V I L = -------------------------------------- × 1000 R DC1 + R DC2 (EQ. 1) where: IL = Constant loop current, and RDC1 and RDC2 = Loop current programming resistors. Capacitor CDC between RDC1 and RDC2 removes the VF signals from the battery feed control loop. The value of CDC is determined by Equation 2: 1 1 C DC = T × ⎛ --------------- + ---------------⎞ ⎝R ⎠ R DC1 DC2 (EQ. 2) where T = 30ms. NOTE: The minimum CDC value is obtained if RDC1 = RDC2 . Figure 13 illustrates the relationship between the tip to ring voltage and the loop resistance. For a 0Ω loop resistance both tip and ring are at VBAT/2. As the loop resistance increases, so does the voltage differential between tip and ring. When this differential voltage becomes equal to the saturation guard voltage, the operation of the SLIC’s loop feed changes from a constant current feed to a resistive feed. The loop current in the resistive feed region is no longer constant but varies as a function of the loop resistance. FN4235.6 June 6, 2006 HC5515 VTX + - ITIP IRSN LOOP CURRENT CIRCUIT TIP RRX RSN RDC1 ITIP IRING RING IRING - SATURATION GUARD CIRCUIT + CDC RDC2 RDC -2.5V + A2 A1 I1 HC5515 R1 + I2 -5V 17.3kΩ RSG -5V RSG -5V FIGURE 12. DC LOOP CURRENT VBAT = -48V, IL = 23mA, RSG = 4.0kΩ TIP TO RING VOLTAGE (V) 0 VTIP SATURATION GUARD VOLTAGE -10 CONSTANT CURRENT FEED REGION RESISTIVE FEED REGION -20 -30 -40 -50 SATURATION GUARD VOLTAGE 0 ∞ 1.2K LOOP RESISTANCE (Ω) VRING FIGURE 13. VTR vs RL Figure 14 shows the relationship between the saturation guard voltage, the loop current and the loop resistance. Notice from Figure 14 that for a loop resistance 1.2kΩ the SLIC is operating in the resistive feed region. Operation in the resistive feed region allows long loop and off-hook transmission by keeping the tip and ring voltages off the rails. Operation in this region is transparent to the customer. TIP TO RING VOLTAGE (V) 50 VBAT = -48V, RSG = 4.0kΩ 40 5 5 • 10 V SGREF = 12.5 + ----------------------------------R SG + 17300 (EQ. 3) where: VSGREF = Saturation Guard reference voltage, and RSG = Saturation Guard programming resistor. When the Saturation guard reference voltage is exceeded, the tip to ring voltage is calculated using Equation 4: 5 CONSTANT CURRENT FEED REGION 16.66 + 5 • 10 ⁄ ( R SG + 17300 ) V TR = R L × -----------------------------------------------------------------------------------+R ) ⁄ 600 R + (R SATURATION GUARD VOLTAGE, VTR = 38V where: 30 L DC1 (EQ. 4) DC2 VTR = Voltage differential between tip and ring, and VBAT = -24V, RSG = ∞ 20 10 0 The Saturation Guard circuit (Figure 12) monitors the tip to ring voltage via the transconductance amplifier A1. A1 generates a current that is proportional to the tip to ring voltage difference. I1 is internally set to sink all of A1’s current until the tip to ring voltage exceeds 12.5V. When the tip to ring voltage exceeds 12.5V (with no RSG resistor) A1 supplies more current than I1 can sink. When this happens A2 amplifies its input current by a factor of 12 and the current through R1 becomes the difference between I2 and the output current from A2. As the current from A2 increases, the voltage across R1 decreases and the output voltage on RDC decreases. This results in a corresponding decrease in the loop current. The RSG pin provides the ability to increase the saturation guard reference voltage beyond 12.5V. Equation 3 gives the relationship between the RSG resistor value and the programmable saturation guard reference voltage: RL = Loop resistance. SATURATION GUARD VOLTAGE, VTR = 13V RESISTIVE FEED REGION 0 10 20 30 LOOP CURRENT (mA) RL 100kΩ 4kΩ 2kΩ
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