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HIN208ECAZ-T

HIN208ECAZ-T

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    SSOP24

  • 描述:

    IC TRANSCEIVER FULL 4/4 24SSOP

  • 数据手册
  • 价格&库存
HIN208ECAZ-T 数据手册
DATASHEET HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E ±15kV, ESD-Protected, +5V Powered, RS-232 Transmitters/Receivers The HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E family of RS-232 transmitters/receivers interface circuits meet all ElA high-speed RS-232E and V.28 specifications, and are particularly suited for those applications where 12V is not available. A redesigned transmitter circuit improves data rate and slew rate, which makes this suitable for ISDN and high speed modems. The transmitter outputs and receiver inputs are protected to 15kV ESD (Electrostatic Discharge). They require a single +5V power supply and feature onboard charge pump voltage converters which generate +10V and -10V supplies from the 5V supply. The family of devices offers a wide variety of high-speed RS-232 transmitter/receiver combinations to accommodate various applications (see Selection Table). FN4315 Rev 17.00 September 14, 2015 Features • Pb-Free Plus Anneal Available (RoHS Compliant) • High Speed ISDN Compatible . . . . . . . . . . . . . 230kbits/s • ESD Protection for RS-232 I/O Pins to 15kV (IEC61000) • Meets All RS-232E and V.28 Specifications • Requires Only 0.1F or Greater External Capacitors • Two Receivers Active in Shutdown Mode (HIN213E) • Requires Only Single +5V Power Supply • Onboard Voltage Doubler/Inverter • Low Power Consumption (Typ) . . . . . . . . . . . . . . . . . 5mA • Low Power Shutdown Function (Typ) . . . . . . . . . . . . .1A The HIN206E, HIN211E and HIN213E feature a low power shutdown mode to conserve energy in battery powered applications. In addition, the HIN213E provides two active receivers in shutdown mode allowing for easy “wakeup” capability. • Three-State TTL/CMOS Receiver Outputs • Multiple Drivers - 10V Output Swing for +5V Input - 300 Power-Off Source Impedance - Output Current Limiting - TTL/CMOS Compatible The drivers feature true TTL/CMOS input compatibility, slew rate-limited output, and 300 power-off source impedance. The receivers can handle up to 30V input, and have a 3k to 7k input impedance. The receivers also feature hysteresis to greatly improve noise rejection. • Multiple Receivers - 30V Input Voltage Range - 3k to 7k Input Impedance - 0.5V Hysteresis to Improve Noise Rejection Applications • Any System Requiring High-Speed RS-232 Communications Port - Computer - Portable, Mainframe, Laptop - Peripheral - Printers and Terminals - Instrumentation, UPS - Modems, ISDN Terminal Adaptors Selection Table LOW POWER SHUTDOWN/TTL THREE-STATE NUMBER OF RECEIVERS ACTIVE IN SHUTDOWN 4 Capacitors No/No 0 4 Capacitors Yes/Yes 0 3 4 Capacitors No/No 0 4 4 Capacitors No/No 0 5 4 Capacitors Yes/Yes 0 POWER SUPPLY VOLTAGE NUMBER OF RS-232 DRIVERS NUMBER OF RS-232 RECEIVERS NUMBER OF 0.1F EXTERNAL CAPACITORS HIN202E +5V 2 2 HIN206E +5V 4 3 HIN207E +5V 5 HIN208E +5V 4 HIN211E +5V 4 PART NUMBER HIN213E +5V 4 5 4 Capacitors Yes/Yes 2 HIN232E +5V 2 2 4 Capacitors No/No 0 FN4315 Rev 17.00 September 14, 2015 Page 1 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Ordering Information PART NO. (Note 1) PART MARKING TEMP. RANGE (°C) PACKAGE (RoHS Compliant) PKG. DWG. # HIN202ECBZ 202ECBZ 16 Ld SOIC (W) M16.3 HIN202ECBZ-T (Note 2) 202ECBZ 16 Ld SOIC (W) Tape and Reel M16.3 HIN202ECBNZ 202ECBNZ 16 Ld SOIC (N) M16.15 HIN202ECBNZ-T (Note 2) 202ECBNZ 16 Ld SOIC (N) Tape and Reel M16.15 HIN202ECPZ 202ECPZ 16 Ld PDIP* E16.3 HIN202EIBZ 202EIBZ 16 Ld SOIC (W) M16.3 HIN202EIBZ-T (Note 2) 202EIBZ 16 Ld SOIC (W) Tape and Reel M16.3 HIN202EIBNZ 202EIBNZ 16 Ld SOIC (N) M16.15 HIN202EIBNZ-T (Note 2) 202EIBNZ 16 Ld SOIC (N) Tape and Reel M16.15 HIN206ECBZ HIN206ECBZ 24 Ld SOIC M24.3 HIN206ECBZ-T (Note 2) HIN206ECBZ 24 Ld SOIC Tape and Reel M24.3 HIN206EIAZ HIN206EIAZ 24 Ld SSOP M24.209 HIN206EIAZ-T (Note 2) HIN206EIAZ 24 Ld SSOP Tape and Reel M24.209 HIN207ECAZ HIN207ECAZ 24 Ld SSOP M24.209 HIN207ECAZ-T (Note 2) HIN207ECAZ 24 Ld SSOP Tape and Reel M24.209 HIN207ECBZ HIN207ECBZ 24 Ld SOIC M24.3 HIN207ECBZ-T (Note 2) HIN207ECBZ 24 Ld SOIC Tape and Reel M24.3 HIN207EIAZ HIN207EIAZ 24 Ld SSOP M24.209 HIN207EIAZ-T (Note 2) HIN207EIAZ 24 Ld SSOP Tape and Reel M24.209 HIN207EIBZ HIN207EIBZ 24 Ld SOIC M24.3 HIN207EIBZ-T (Note 2) HIN207EIBZ 24 Ld SOIC Tape and Reel M24.3 HIN208ECAZ HIN208ECAZ 24 Ld SSOP M24.209 HIN208ECAZ-T (Note 2) HIN208ECAZ 24 Ld SSOP Tape and Reel M24.209 HIN208ECBZ HIN208ECBZ 24 Ld SOIC M24.3 HIN208ECBZ-T (Note 2) HIN208ECBZ 24 Ld SOIC Tape and Reel M24.3 HIN208EIAZ HIN208EIAZ 24 Ld SSOP M24.209 HIN208EIAZ-T (Note 2) HIN208EIAZ 24 Ld SSOP Tape and Reel M24.209 HIN208EIBZ HIN208EIBZ 24 Ld SOIC M24.3 HIN211ECAZ HIN211ECAZ 28 Ld SSOP M28.209 HIN211ECAZ-T (Note 2) HIN211ECAZ 28 Ld SSOP Tape and Reel M28.209 HIN211ECBZ HIN211ECBZ 28 Ld SOIC M28.3 HIN211ECBZ-T (Note 2) HIN211ECBZ 28 Ld SOIC Tape and Reel M28.3 HIN211EIAZ HIN211EIAZ 28 Ld SSOP M28.209 HIN211EIAZ-T (Note 2) HIN211EIAZ 28 Ld SSOP Tape and Reel M28.209 HIN211EIBZ HIN211EIBZ 28 Ld SOIC M28.3 HIN213ECAZ HIN213ECAZ 28 Ld SSOP M28.209 HIN213ECAZ-T (Note 2) HIN213ECAZ 28 Ld SSOP Tape and Reel M28.209 HIN213EIAZ HIN213EIAZ 28 Ld SSOP M28.209 HIN213EIAZ-T (Note 2) HIN213EIAZ 28 Ld SSOP Tape and Reel M28.209 HIN213EIBZ HIN213EIBZ 28 Ld SOIC M28.3 FN4315 Rev 17.00 September 14, 2015 0 to 70 -40 to 85 0 to 70 -40 to 85 0 to 70 -40 to 85 0 to 70 -40 to 85 0 to 70 -40 to 85 0 to 70 -40 to 85 Page 2 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Ordering Information (Continued) PART NO. (Note 1) PART MARKING TEMP. RANGE (°C) PACKAGE (RoHS Compliant) PKG. DWG. # HIN232ECAZ HIN232ECAZ 16 Ld SSOP M16.209 HIN232ECAZ-T (Note 2) HIN232ECAZ 16 Ld SSOP Tape and Reel M16.209 HIN232ECBNZ 232ECBNZ 16 Ld SOIC (N) M16.15 HIN232ECBNZ-T (Note 2) 232ECBNZ 16 Ld SOIC (N) Tape and Reel M16.15 HIN232ECBZ 232ECBZ 16 Ld SOIC (W) M16.3 HIN232ECBZ-T (Note 2) 232ECBZ 16 Ld SOIC (W) Tape and Reel M16.3 HIN232ECPZ HIN232ECPZ 16 Ld PDIP* E16.3 HIN232EIBNZ 232EIBNZ 16 Ld SOIC (N) M16.15 HIN232EIBNZ-T (Note 2) 232EIBNZ 16 Ld SOIC (N) Tape and Reel M16.15 HIN232EIVZ (No longer available, recommended replacement: HIN232ECAZ) 232EIVZ 16 Ld TSSOP M16.173 HIN232EIVZ-T (Note 2) (No longer available, recommended replacement: HIN232ECAZ-T) 232EIVZ 16 Ld TSSOP Tape and Reel M16.173 0 to 70 -40 to 85 *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTES: 1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. Please refer to TB347 for details on reel specifications. FN4315 Rev 17.00 September 14, 2015 Page 3 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts HIN202E (PDIP, SOIC) TOP VIEW HIN206E (SOIC, SSOP) TOP VIEW T3OUT 1 24 T4OUT 15 GND T1OUT 2 23 R2IN 14 T1OUT T2OUT 3 22 R2OUT R1IN 4 21 SD R1OUT 5 20 EN T2IN 6 19 T4IN T1IN 7 18 T3IN GND 8 17 R3OUT VCC 9 16 R3IN 16 VCC C1+ 1 V+ 2 C1- 3 C2+ 4 13 R1IN C2- 5 12 R1OUT 6 11 T1IN T2OUT 7 10 T2IN V- 9 R2OUT R2IN 8 C1+ 10 15 V- V+ 11 14 C2- C1- 12 13 C2+ +5V 9 +5V 16 1 0.1F + 3 4 0.1F T1IN T2IN R1OUT + 5 C1+ C1C2+ C2- 0.1F VCC +5V TO 10V VOLTAGE INVERTER V+ +10V TO -10V VOLTAGE INVERTER 2 + 0.1F V- 6 + 11 +5V 400k T1 10 +5V 400k T2 14 7 12 0.1F 13 0.1F T1OUT T2OUT R1IN 5k R1 T1IN T2IN T3IN T4IN R1OUT 10 C1+ + 12 C113 C2+ + 14 C2- VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER V- 15 +5V 400k 7 T1 6 +5V 400k T2 18 +5V 400k T3 19 +5V 400k T4 9 8 5k R2 R2IN R2OUT 2 3 1 24 5 4 23 R3OUT EN 17 20 0.1F T1OUT T2OUT T3OUT T4OUT R1IN R2IN 5k R2 15 0.1F 5k 22 GND + + R1 R2OUT 11 V+ 16 5k R3 R3IN 21 SD GND 8 FN4315 Rev 17.00 September 14, 2015 Page 4 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts (Continued) HIN207E (SOIC, SSOP) TOP VIEW T3OUT 1 T1OUT 2 T2OUT 3 22 R2OUT 21 T5IN 20 T5OUT 5 19 T4IN T1IN 7 VCC 1 24 T3OUT T1OUT 2 23 R3IN R2IN 3 22 R3OUT R2OUT 4 21 T4IN T1IN 5 20 T4OUT R1OUT 6 19 T3IN R1IN 7 18 T2IN GND 8 17 R4OUT VCC 9 16 R4IN 23 R2IN T2IN 6 GND T2OUT 24 T4OUT R1IN 4 R1OUT HIN208E (SOIC, SSOP) TOP VIEW 18 T3IN 17 R3OUT 8 16 R3IN 9 C1+ 10 15 V14 C2- V+ 11 13 C2+ C1- 12 15 V- C1+ 10 V+ 11 14 C2- C1- 12 13 C2+ +5V +5V 9 9 0.1F 0.1F T1IN T2IN T3IN T4IN T5IN R1OUT 10 C1+ + 12 C113 C2+ + 14 C2- VCC V+ +10V TO -10V VOLTAGE INVERTER V- 15 +5V 400k T1 +5V 400k 6 T2 +5V 400k 18 T3 +5V 400k 19 T4 +5V 400k 21 T5 7 2 3 1 24 20 5 4 0.1F T1OUT T2OUT T3OUT T4OUT T1IN T2IN T3IN T4IN R1IN GND V- 15 18 +5V 400k T2 19 +5V 400k T3 21 +5V 400k T4 R2IN R3OUT R3IN R4OUT + + 2 1 24 20 6 7 0.1F 0.1F T1OUT T2OUT T3OUT T4OUT R1IN 5k 4 3 R2IN 5k 22 23 R3IN 5k R3 16 5k +10V TO -10V VOLTAGE INVERTER T1 5k R3 +5V TO 10V VOLTAGE DOUBLER R1 R2OUT 11 V+ R2 23 17 VCC +5V 400k 5 T5OUT 5k 22 17 16 R4IN 5k R4 GND 8 FN4315 Rev 17.00 September 14, 2015 0.1F R1OUT R2 R3OUT 0.1F 0.1F + R1 R2OUT 11 +5V TO 10V VOLTAGE DOUBLER + 10 C1+ + 12 C113 C2+ + 14 C2- 8 Page 5 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts (Continued) HIN211E (SOIC, SSOP) TOP VIEW HIN213E (SOIC, SSOP) TOP VIEW T3OUT 1 28 T4OUT T3OUT 1 28 T4OUT T1OUT 2 27 R3IN T1OUT 2 27 R3IN T2OUT 3 26 R3OUT T2OUT 3 26 R3OUT R2IN 4 25 SD R2IN 4 25 SD R2OUT 5 24 EN R2OUT 5 24 EN T2IN 6 23 R4IN T2IN 6 23 R4IN T1IN 7 22 R4OUT T1IN 7 22 R4OUT R1OUT 8 21 T4IN R1OUT 8 21 T4IN R1IN 9 20 T3IN R1IN 9 20 T3IN GND 10 19 R5OUT GND 10 19 R5OUT VCC 11 18 R5IN VCC 11 18 R5IN C1+ 12 17 V- C1+ 12 17 V- V+ 13 16 C2- V+ 13 16 C2- C1- 14 15 C2+ C1- 14 15 C2+ NOTE: R4 and R5 active in shutdown. +5V +5V 11 0.1F 0.1F T1IN T2IN T3IN T4IN R1OUT 12 C1+ + 14 C115 C2+ + 16 C2- VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER V- 17 +5V 400k 7 T1 6 +5V 400k T2 20 +5V 400k T3 21 +5V 400k T4 2 3 1 28 8 9 5 EN 26 T2OUT T2IN T3OUT T3IN T4OUT T4IN R1IN R1OUT 6 +5V 400k T2 20 +5V 400k T3 21 +5V 400k T4 R2IN R2OUT R3IN R3OUT R4IN R4OUT GND 25 R5IN SD R5OUT EN 0.1F T1OUT 3 T2OUT 1 T3OUT 28 T4OUT 9 R1IN 5k 5 4 R2IN 5k 26 27 R3IN 5k 22 23 R4IN 5k 19 24 0.1F 2 R4 18 + + 8 5k R5 V- 17 R3 23 5k +10V TO -10V VOLTAGE INVERTER T1 5k 19 18 5k R5 25 R5IN SD GND 10 FN4315 Rev 17.00 September 14, 2015 T1IN +5V TO 10V VOLTAGE DOUBLER R2 27 22 24 T1OUT 13 V+ +5V 400k 7 5k R4 R5OUT 0.1F VCC R1 4 R3 R4OUT 0.1F 12 C1+ + 14 C115 C2+ + 16 C2- 5k R2 R3OUT 11 0.1F 0.1F + R1 R2OUT 13 V+ + 10 Page 6 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts (Continued) HIN232E (PDIP, SOIC, SSOP) (TSSOP - NO LONGER AVAILABLE OR SUPPORTED) TOP VIEW +5V 16 1 C1+ 1 16 VCC V+ 2 15 GND C1- 3 14 T1OUT C2+ 4 13 R1IN C2- 5 12 R1OUT V- 6 T2OUT 7 R2IN 8 0.1F + 3 4 0.1F 11 T1IN T1IN 10 T2IN 9 R2OUT T2IN R1OUT + 5 C1+ C1C2+ C2- VCC +5V TO 10V VOLTAGE INVERTER V+ +10V TO -10V VOLTAGE INVERTER + 11 +5V 400k T1 10 +5V 400k T2 0.1F V- 6 + 0.1F 14 7 12 13 T1OUT T2OUT R1IN 5k R1 R2OUT 2 9 8 R2IN 5k R2 GND 15 Pin Descriptions PIN VCC FUNCTION Power Supply Input 5V 10%, (5V 5% HIN207E). V+ Internally generated positive supply (+10V nominal). V- Internally generated negative supply (-10V nominal). GND Ground Lead. Connect to 0V. C1+ External capacitor (+ terminal) is connected to this lead. C1- External capacitor (- terminal) is connected to this lead. C2+ External capacitor (+ terminal) is connected to this lead. C2- External capacitor (- terminal) is connected to this lead. TIN Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kpull-up resistor to VCC is connected to each lead. TOUT RIN ROUT Transmitter Outputs. These are RS-232 levels (nominally 10V). Receiver Inputs. These inputs accept RS-232 input levels. An internal 5kpull-down resistor to GND is connected to each input. Receiver Outputs. These are TTL/CMOS levels. EN, EN Receiver Enable Input. With EN = 5V (HIN213E EN=0V), the receiver outputs are placed in a high impedance state. SD, SD Shutdown Input. With SD = 5V (HIN213E SD = 0V), the charge pump is disabled, the receiver outputs are in a high impedance state (except R4 and R5 of HIN213E) and the transmitters are shut off. NC No Connect. No connections are made to these leads. FN4315 Rev 17.00 September 14, 2015 Page 7 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < VCC < 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . (VCC -0.3V) < V+ < 12V V- to Ground . . . . . . . . . . . . . . . . . . . . . . .-12V < V- < (GND +0.3V) Input Voltages TIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V < VIN < (V+ +0.3V) RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < VTXOUT < (V+ +0.3V) ROUT . . . . . . . . . . . . . . . . . (GND -0.3V) < VRXOUT < (V+ +0.3V) Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Classification . . . . . . . . . . . . . . . . . . . . See Specification Table Thermal Resistance (Typical, Note 1) JA (°C/W) 16 Ld SOIC (N) Package . . . . . . . . . . . . . . . . . . . . . 110 16 Ld SOIC (W) Package. . . . . . . . . . . . . . . . . . . . . 100 16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 155 16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 145 16 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . 90 24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 24 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 135 28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 70 28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 100 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C (SOIC and SSOP - Lead Tips Only) Operating Conditions *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. Temperature Range HIN2XXECX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C HIN2XXEIX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 3. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications Test Conditions: VCC = +5V 10%, (VCC = +5V 5% HIN207E); C1-C4 = 0.1F; TA = Operating Temperature Range PARAMETER TEST CONDITIONS MIN TYP MAX UNITS SUPPLY CURRENTS Power Supply Current, ICC Shutdown Supply Current, ICC(SD) No Load, TA = 25°C TA = 25°C HIN202E - 8 15 mA HIN206E - HIN208E, HIN211E, HIN213E - 11 20 mA HIN232E - 5 10 mA HIN206E, HIN211E - 1 10 A HIN213E - 15 50 A - - 0.8 V LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS Input Logic Low, VlL TIN , EN, SD, EN, SD Input Logic High, VlH TIN 2.0 - - V EN, SD, EN, SD 2.4 - - V Transmitter Input Pullup Current, IP TIN = 0V - 15 200 A TTL/CMOS Receiver Output Voltage Low, VOL IOUT = 1.6mA (HIN202E, HIN232E, IOUT = 3.2mA) - 0.1 0.4 V TTL/CMOS Receiver Output Voltage High, VOH IOUT = -1mA 3.5 4.6 - V TTL/CMOS Receiver Output Leakage EN = VCC , EN = 0, 0V < ROUT < VCC - 0.5 10 A -30 - +30 V 3.0 5.0 7.0 k RECEIVER INPUTS RS-232 Input Voltage Range, VIN Receiver Input Impedance, RIN TA = 25°C, VIN = 3V Receiver Input Low Threshold, VIN (H-L) VCC = 5V, TA = 25°C Active Mode - 1.2 - V Shutdown Mode HIN213E R4 and R5 - 1.5 - V VCC = 5V, TA = 25°C Active Mode - 1.7 2.4 V Shutdown Mode HIN213E R4 and R5 - 1.5 2.4 V 0.2 0.5 1.0 V Receiver Input High Threshold, VIN (L-H) Receiver Input Hysteresis, VHYST FN4315 Rev 17.00 September 14, 2015 VCC = 5V, No Hysteresis in Shutdown Mode Page 8 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Electrical Specifications Test Conditions: VCC = +5V 10%, (VCC = +5V 5% HIN207E); C1-C4 = 0.1F; TA = Operating Temperature Range (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS TIMING CHARACTERISTICS Output Enable Time, tEN HIN206E, HIN211E, HIN213E - 600 - ns Output Disable Time, tDIS HIN206E, HIN211E, HIN213E - 200 - ns Transmitter, Receiver Propagation Delay, tPD HIN213E SD = 0V, R4, R5 - 4.0 40 s HIN213E SD = VCC , R1 - R5 - 0.5 10 s All except HIN213E - 0.5 10 s RL = 3k, CL = 1000pF Measured from +3V to -3V or -3V to +3V, 1 Transmitter Switching (Note 2) 3 20 45 V/s Output Voltage Swing, TOUT Transmitter Outputs, 3k to Ground 5 9 10 V Output Resistance, TOUT VCC = V+ = V- = 0V, VOUT = 2V 300 - -  RS-232 Output Short Circuit Current, ISC TOUT Shorted to GND - 10 - mA Human Body Model - 15 - kV Transition Region Slew Rate, SRT TRANSMITTER OUTPUTS ESD PERFORMANCE RS-232 Pins (TOUT, RIN) All Other Pins IEC61000-4-2 Contact Discharge - 8 - kV IEC61000-4-2 Air Gap (Note 3) - 15 - kV Human Body Model - 2 - kV NOTES: 4. Guaranteed by design. 5. Meets Level 4. Test Circuits (HIN232E) +4.5V TO +5.5V INPUT 0.1F C3 0.1F C1 - 2 V+ + 3 C1- + - 0.1F + C2 - - + 3k 1 C1+ 0.1F C4 1 C1+ VCC 16 2 V+ GND 15 3k 3 C1- T1OUT 14 4 C2+ R1IN 13 RS-232 30V INPUT 5 C2- R1OUT 12 TTL/CMOS OUTPUT 6 V7 T2OUT 8 R2IN T1 OUTPUT T1IN 11 TTL/CMOS INPUT T2IN 10 TTL/CMOS INPUT R2OUT 9 TTL/CMOS OUTPUT T2 OUTPUT VCC 16 GND 15 T1OUT 14 4 C2+ R1IN 13 5 C2- R1OUT 12 6 V- T1IN 11 7 T2OUT T2IN 10 8 R2IN ROUT = VIN /I R2OUT 9 T2OUT T1OUT VIN = 2V A RS-232 30V INPUT FIGURE 1. GENERAL TEST CIRCUIT FN4315 Rev 17.00 September 14, 2015 FIGURE 2. POWER-OFF SOURCE RESISTANCE CONFIGURATION Page 9 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E VOLTAGE DOUBLER S1 VOLTAGE INVERTER S2 C1+ V+ = 2VCC VCC + GND S3 C1- + C1 S4 S5 C2+ GND + C3 VCC S6 GND C2- S7 + C2 - C4 V- = - (V+) S8 RC OSCILLATOR FIGURE 3. CHARGE PUMP Detailed Description The HIN2XXE family of high-speed RS-232 transmitters/receivers are powered by a single +5V power supply, feature low power consumption, and meet all ElA RS232C and V.28 specifications. The circuit is divided into three sections: the charge pump, transmitter, and receiver. Charge Pump An equivalent circuit of the charge pump is illustrated in Figure 3. The charge pump contains two sections: the voltage doubler and the voltage inverter. Each section is driven by a two phase, internally generated clock to generate +10V and -10V. The nominal clock frequency is 125kHz. During phase one of the clock, capacitor C1 is charged to VCC . During phase two, the voltage on C1 is added to VCC , producing a signal across C3 equal to twice VCC . During phase two, C2 is also charged to 2VCC , and then during phase one, it is inverted with respect to ground to produce a signal across C4 equal to -2VCC . The charge pump accepts input voltages up to 5.5V. The output impedance of the voltage doubler section (V+) is approximately 200, and the output impedance of the voltage inverter section (V-) is approximately 450. A typical application uses 0.1F capacitors for C1-C4, however, the value is not critical. Increasing the values of C1 and C2 will lower the output impedance of the voltage doubler and inverter, increasing the values of the reservoir capacitors, C3 and C4, lowers the ripple on the V+ and V- supplies. During shutdown mode (HIN206E, HIN211E and HIN213E) the charge pump is turned off, V+ is pulled down to VCC , Vis pulled up to GND, and the supply current is reduced to less than 10A. The transmitter outputs are disabled and the receiver outputs (except for HIN213E, R4 and R5) are placed in the high impedance state. Transmitters The transmitters are TTL/CMOS compatible inverters which translate the inputs to RS-232 outputs. The input logic threshold is about 26% of VCC , or 1.3V for VCC = 5V. A logic 1 at the input results in a voltage of between -5V and V- at the output, and a logic 0 results in a voltage between +5V FN4315 Rev 17.00 September 14, 2015 and (V+ -0.6V). Each transmitter input has an internal 400k pullup resistor so any unused input can be left unconnected and its output remains in its low state. The output voltage swing meets the RS-232C specifications of 5V minimum with the worst case conditions of: all transmitters driving 3k minimum load impedance, VCC = 4.5V, and maximum allowable operating temperature. The transmitters have an internally limited output slew rate which is less than 30V/s. The outputs are short circuit protected and can be shorted to ground indefinitely. The powered down output impedance is a minimum of 300 with 2V applied to the outputs and VCC = 0V. Receivers The receiver inputs accept up to 30V while presenting the required 3k to 7k input impedance even if the power is off (VCC = 0V). The receivers have a typical input threshold of 1.3V which is within the 3V limits, known as the transition region, of the RS-232 specifications. The receiver output is 0V to VCC . The output will be low whenever the input is greater than 2.4V and high whenever the input is floating or driven between +0.8V and -30V. The receivers feature 0.5V hysteresis (except during shutdown) to improve noise rejection. The receiver Enable line EN, (EN on HIN213E) when unasserted, disables the receiver outputs, placing them in the high impedance mode. The receiver outputs are also placed in the high impedance state when in shutdown mode (except HIN213E R4 and R5). V+ VCC 400k 300 TXIN TOUT GND < TXIN < VCC V- < VTOUT < V+ V- FIGURE 4. TRANSMITTER Page 10 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Application Information VCC RXIN ROUT -30V < RXIN < +30V GND < VROUT < VCC 5k GND FIGURE 5. RECEIVER A simple duplex RS-232 port with CTS/RTS handshaking is illustrated in Figure 7. Fixed output signals such as DTR (data terminal ready) and DSRS (data signaling rate select) is generated by driving them through a 5k resistor connected to V+. TIN OR RIN TOUT OR ROUT VOL VOL tPHL tPLH AVERAGE PROPAGATION DELAY = The HIN2XXE may be used for all RS-232 data terminal and communication links. It is particularly useful in applications where 12V power supplies are not available for conventional RS-232 interface circuits. The applications presented represent typical interface configurations. tPHL + tPLH 2 In applications requiring four RS-232 inputs and outputs (Figure 8), note that each circuit requires two charge pump capacitors (C1 and C2) but can share common reservoir capacitors (C3 and C4). The benefit of sharing common reservoir capacitors is the elimination of two capacitors and the reduction of the charge pump source impedance which effectively increases the output swing of the transmitters. FIGURE 6. PROPAGATION DELAY DEFINITION +5V HIN213E Operation in Shutdown The HIN213E features two receivers, R4 and R5, which remain active in shutdown mode. During normal operation the receivers propagation delay is typically 0.5s. This propagation delay may increase slightly during shutdown. When entering shut down mode, receivers R4 and R5 are not valid for 80s after SD = VIL. When exiting shutdown mode, all receiver outputs will be invalid until the charge pump circuitry reaches normal operating voltage. This is typically less than 2ms when using 0.1F capacitors. C1 + 0.1F C2 + 0.1F TD INPUTS OUTPUTS TTL/CMOS RTS RD CTS 1 3 + 16 HIN232E 6 4 5 T1 11 14 T2 10 7 13 12 9 + R2 R1 15 8 CTR (20) DATA TERMINAL READY DSRS (24) DATA SIGNALING RATE SELECT RS-232 INPUTS AND OUTPUTS TD (2) TRANSMIT DATA RTS (4) REQUEST TO SEND RD (3) RECEIVE DATA CTS (5) CLEAR TO SEND SIGNAL GROUND (7) FIGURE 7. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS HANDSHAKING FN4315 Rev 17.00 September 14, 2015 Page 11 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E 1 C1 + 0.1F TD INPUTS OUTPUTS TTL/CMOS RTS RD 4 HIN232E 3 T1 11 14 T2 10 CTS TD (2) TRANSMIT DATA 7 RTS (4) REQUEST TO SEND 13 12 R2 9 + C2 0.1F - 5 R1 RD (3) RECEIVE DATA 8 CTS (5) CLEAR TO SEND 15 VCC 16 - 2 C3 + + C4 6 V- V+ 0.2F 6 2 +5V - RS-232 INPUTS AND OUTPUTS 0.2F VCC 16 HIN232E C1 + 0.1F DTR INPUTS OUTPUTS TTL/CMOS DSRS DCD R1 1 4 3 5 T1 11 14 T2 10 12 9 7 13 R2 R1 15 8 + C2 0.1F - DTR (20) DATA TERMINAL READY DSRS (24) DATA SIGNALING RATE SELECT DCD (8) DATA CARRIER DETECT R1 (22) RING INDICATOR SIGNAL GROUND (7) FIGURE 8. COMBINING TWO HIN232Es FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS Typical Performance Curves 12 0.1F SUPPLY VOLTAGE (|V|) V- SUPPLY VOLTAGE (V) 12 10 8 6 4 V+ (VCC = 5V) 8 6 V+ (VCC = 4V) V- (VCC = 4V) 4 TA = 25°C TRANSMITTER OUTPUTS OPEN CIRCUIT 2 2 0 3.0 10 3.5 FIGURE 9. 4.0 4.5 VCC 5.0 5.5 V- SUPPLY VOLTAGE vs VCC FN4315 Rev 17.00 September 14, 2015 6.0 0 0 5 10 15 V- (VCC = 5V) 20 25 30 |ILOAD| (mA) FIGURE 10. V+, V- OUTPUT VOLTAGE vs LOAD Page 12 of 23 35 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Die Characteristics METALLIZATION: PASSIVATION: Type: Nitride over Silox Nitride Thickness: 8kÅ Silox Thickness: 7kÅ Type: Al Thickness: 10kÅ 1kÅ SUBSTRATE POTENTIAL TRANSISTOR COUNT: GND 185 PROCESS: CMOS Metal Gate Metallization Mask Layout HIN232E VPIN 6 C2PIN 5 C2+ PIN 4 C1PIN 3 PIN 2 V+ PIN 1 C1+ T2OUT PIN 7 R2IN PIN 8 T3OUT PIN 9 PIN 17 VCC R2OUT PIN 10 PIN 11 T2IN FN4315 Rev 17.00 September 14, 2015 PIN 12 T1IN PIN 13 R1OUT PIN 14 R1IN PIN 15 T1OUT PIN 16 GND Page 13 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION September 14, 2015 FN4315.17 CHANGE Updated the Ordering Information table starting on page 2. Added Revision History and About Intersil sections. Updated Package Outline drawing M24.3 to the latest revision. -Revision 0 to Revision 1 changes - Remove µ symbol which is overlapping the alpha symbol in the diagram. -Revision 1 to Revision 2 changes - Updated to new POD standard by removing table listing dimensions and putting dimensions on drawing. Added Land Pattern. Updated Package Outline drawing M28.3 to the latest revision. -Revision 0 to Revision 1 changes - Added land pattern. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support. FN4315 Rev 17.00 September 14, 2015 Page 14 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Dual-In-Line Plastic Packages (PDIP) E16.3 (JEDEC MS-001-BB ISSUE D) N 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE E1 INDEX AREA 1 2 3 INCHES N/2 -B- -AE D BASE PLANE -C- SEATING PLANE A2 A L D1 e B1 D1 B 0.010 (0.25) M A1 eC C A B S MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - C L B1 0.045 0.070 1.15 1.77 8, 10 eA C 0.008 0.014 C D 0.735 0.775 eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 0.355 19.68 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. eA 0.300 BSC 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. eB - 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. L 0.115 N 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 0.204 18.66 16 2.54 BSC 7.62 BSC 0.430 - 0.150 2.93 16 6 10.92 7 3.81 4 9 Rev. 0 12/93 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). FN4315 Rev 17.00 September 14, 2015 Page 15 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) M16.15 (JEDEC MS-012-AC ISSUE C) N INDEX AREA H 0.25(0.010) M 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE B M INCHES E -B- 1 2 3 L SEATING PLANE -A- A D h x 45° -C- e A1 B 0.25(0.010) M C 0.10(0.004) C A M SYMBOL MIN MAX MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - A1 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.3859 0.3937 9.80 10.00 3 E 0.1497 0.1574 3.80 4.00 4 e  B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. MILLIMETERS 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N  16 0° 16 8° 0° 7 8° Rev. 1 6/05 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315 Rev 17.00 September 14, 2015 Page 16 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Thin Shrink Small Outline Plastic Packages (TSSOP) M16.173 N 16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX AREA E 0.25(0.010) M E1 2 INCHES GAUGE PLANE -B1 B M 0.05(0.002) -A- SYMBOL MIN MAX MIN MAX NOTES A - 0.043 - 1.10 - A1 3 L A D -C- e  A1 b 0.10(0.004) M 0.25 0.010 SEATING PLANE c 0.10(0.004) C A M 0.05 0.15 - A2 0.033 0.037 0.85 0.95 - b 0.0075 0.012 0.19 0.30 9 c 0.0035 0.008 0.09 0.20 - B S NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. 0.002 0.006 D 0.193 0.201 4.90 5.10 3 E1 0.169 0.177 4.30 4.50 4 e A2 MILLIMETERS 0.026 BSC E 0.246 L 0.020 N  0.65 BSC 0.256 6.25 0.028 0.50 16 0o - 0.70 6 16 8o 0o - 6.50 7 8o Rev. 1 2/02 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees) FN4315 Rev 17.00 September 14, 2015 Page 17 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SSOP) M16.209 (JEDEC MO-150-AC ISSUE B) N 16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M 2 GAUGE PLANE 3 0.25 0.010 SEATING PLANE -A- INCHES E -B- 1 B M A D -C- e  C 0.10(0.004) C A M SYMBOL MIN MAX MIN MAX NOTES A - 0.078 - 2.00 - A1 0.002 - 0.05 - - A2 0.065 0.072 1.65 1.85 - B 0.009 0.014 0.22 0.38 9 C 0.004 0.009 0.09 0.25 - D 0.233 0.255 5.90 6.50 3 E 0.197 0.220 5.00 5.60 4 e A2 A1 B 0.25(0.010) M L B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. MILLIMETERS 0.026 BSC H 0.292 L 0.022 N  0.65 BSC 0.322 7.40 0.037 0.55 16 0° - 8.20 - 0.95 6 16 8° 0° 7 8° Rev. 3 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315 Rev 17.00 September 14, 2015 Page 18 of 23 6/05 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) M16.3 (JEDEC MS-013-AA ISSUE C) N 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES E -B- 1 2 3 L SEATING PLANE -A- A D h x 45° -C- e A1 B 0.25(0.010) M C 0.10(0.004) C A M SYMBOL MIN MAX MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.3977 0.4133 10.10 10.50 3 E 0.2914 0.2992 7.40 7.60 4 e  B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. MILLIMETERS 0.050 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N  16 0° 16 8° 0° 7 8° Rev. 1 6/05 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315 Rev 17.00 September 14, 2015 Page 19 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Shrink Small Outline Plastic Packages (SSOP) M24.209 (JEDEC MO-150-AG ISSUE B) N 24 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M 2 GAUGE PLANE 3 0.25 0.010 SEATING PLANE -A- INCHES E -B- 1 B M A D -C- e µ A1 B 0.25(0.010) M L C 0.10(0.004) C A M SYMBOL MIN MAX MIN MAX NOTES A - 0.078 - 2.00 - 0.05 - - 0.072 1.65 1.85 - A1 0.002 A2 0.065 B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. - B 0.009 0.014 0.22 0.38 9 C 0.004 0.009 0.09 0.25 - D 0.312 0.334 7.90 8.50 3 E 0.197 0.220 5.00 5.60 4 e A2 MILLIMETERS 0.026 BSC H 0.292 L 0.022 N  0.65 BSC 0.322 7.40 0.037 0.55 24 0o - 8.20 - 0.95 6 24 8o 0o 7 8o Rev. 1 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315 Rev 17.00 September 14, 2015 Page 20 of 23 3/95 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Package Outline Drawing M24.3 24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOIC) Rev 2, 3/11 24 INDEX AREA 7.60 (0.299) 7.40 (0.291) 10.65 (0.419) 10.00 (0.394) DETAIL "A" 1 2 3 TOP VIEW 1.27 (0.050) 0.40 (0.016) SEATING PLANE 2.65 (0.104) 2.35 (0.093) 15.60 (0.614) 15.20 (0.598) 0.75 (0.029) x 45° 0.25 (0.010) 0.30 (0.012) 0.10 (0.004) 1.27 (0.050) 0.51 (0.020) 0.33 (0.013) 8° 0° 0.32 (0.012) 0.23 (0.009) SIDE VIEW “B” SIDE VIEW “A” 1.981 (0.078) 9.373 (0.369) 1.27 (0.050) NOTES: 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 5. Terminal numbers are shown for reference only. 6. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 7. Controlling dimension: MILLIMETER. Converted inch dimensions in ( ) are not necessarily exact. 8. This outline conforms to JEDEC publication MS-013-AD ISSUE C. 0.533 (0.021) TYPICAL RECOMMENDED LAND PATTERN FN4315 Rev 17.00 September 14, 2015 Page 21 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Shrink Small Outline Plastic Packages (SSOP) M28.209 (JEDEC MO-150-AH ISSUE B) N 28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M 2 GAUGE PLANE 3 0.25 0.010 SEATING PLANE -A- INCHES E -B- 1 B M A D -C- e  C 0.10(0.004) C A M SYMBOL MIN MAX MIN MAX NOTES A - 0.078 - 2.00 - A1 0.002 - 0.05 - - A2 0.065 0.072 1.65 1.85 - B 0.009 0.014 0.22 0.38 9 C 0.004 0.009 0.09 0.25 - D 0.390 0.413 9.90 10.50 3 E 0.197 0.220 5.00 5.60 4 e A2 A1 B 0.25(0.010) M L B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. MILLIMETERS 0.026 BSC H 0.292 L 0.022 N  0.65 BSC 0.322 7.40 0.037 0.55 28 0° - 0.95 6 28 8° 0° - 8.20 7 8° Rev. 2 6/05 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315 Rev 17.00 September 14, 2015 Page 22 of 23 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) M28.3 (JEDEC MS-013-AE ISSUE C) N 28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES E SYMBOL -B- 1 2 3 L SEATING PLANE -A- A D h x 45o a e A1 B C 0.10(0.004) 0.25(0.010) M C A M B S MAX MILLIMETERS MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.6969 0.7125 17.70 18.10 3 E 0.2914 0.2992 7.40 7.60 4 e -C- MIN 0.05 BSC h 0.01 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6  10.00 - 0.394 N 0.419 1.27 BSC H 28 0o 10.65 - 28 8o 0o 7 8o Rev. 1, 1/13 NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. TYPICAL RECOMMENDED LAND PATTERN (1.50mm) 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. (9.38mm) 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) (1.27mm TYP) (0.51mm TYP) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. © Copyright Intersil Americas LLC 2003-2015. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN4315 Rev 17.00 September 14, 2015 Page 23 of 23
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