HIP2101IRZT

DATASHEET HIP2101 FN9025 Rev.10.00 Aug 8, 2019 100V/2A Peak, Low Cost, High Frequency Half Bridge Driver The HIP2101 is a high frequency, 100V Half Bridge N-Channel power MOSFET driver IC. It is equivalent to the HIP2100 with the added advantage of full TTL/CMOS compatible logic input pins. The low-side and high-side gate drivers are independently controlled and matched to 13ns. This gives users total control over dead time for specific power circuit topologies. Undervoltage protection on both the low-side and high-side supplies force the outputs low. An on-chip diode eliminates the discrete diode required with other driver ICs. A new level-shifter topology yields the low-power benefits of pulsed operation with the safety of DC operation. Unlike some competitors, the high-side output returns to its correct state after a momentary undervoltage of the high-side supply. Applications Features • Drives N-Channel MOSFET Half Bridge • SOIC, EPSOIC, QFN and DFN Package Options • SOIC, EPSOIC and DFN Packages Compliant with 100V Conductor Spacing Guidelines of IPC-2221 • Pb-free Product Available (RoHS Compliant) • Bootstrap Supply Max Voltage to 114VDC • On-Chip 1Ω Bootstrap Diode • Fast Propagation Times for Multi-MHz Circuits • Drives 1000pF Load with Rise and Fall Times Typ. 10ns • TTL/CMOS Input Thresholds Increase Flexibility • Independent Inputs for Non-Half Bridge Topologies • Telecom Half Bridge Power Supplies • No Start-Up Problems • Avionics DC-DC Converters • Two-Switch Forward Converters • Outputs Unaffected by Supply Glitches, HS Ringing Below Ground, or HS Slewing at High dv/dt Active Clamp Forward Converters • Low Power Consumption Related Literature For a full list of related documents, visit our website: • HIP2101 device page FN9025 Rev.10.00 Aug 8, 2019 • Wide Supply Range • Supply Undervoltage Protection • 3Ω Output Driver Resistance • QFN/DFN Package: - Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat No Leads - Package Outline - Near Chip Scale Package footprint, which improves PCB efficiency and has a thinner profile Page 1 of 15 HIP2101 Ordering Information PART NUMBER (Notes 2, 3) TEMP. RANGE (°C) TAPE AND REEL (Units) (Note 1) PACKAGE (RoHS Compliant) PKG. DWG. # HIP2101IBZ -40 to 125 - 8 Ld SOIC M8.15 HIP2101IBZT -40 to 125 2.5k 8 Ld SOIC M8.15 HIP2101IBZT7A -40 to 125 250 8 Ld SOIC M8.15 HIP2101EIBZ -40 to 125 - 8 Ld EPSOIC M8.15C HIP2101EIBZT -40 to 125 2.5k 8 Ld EPSOIC M8.15C HIP2101IRZ -40 to 125 - 16 Ld 5x5 QFN L16.5x5 HIP2101IRZT -40 to 125 6k 16 Ld 5x5 QFN L16.5x5 HIP2101IR4Z -40 to 125 - 12 Ld 4x4 DFN L12.4x4A HIP2101IR4ZT -40 to 125 6k 12 Ld 4x4 DFN L12.4x4A NOTES: 1. See TB347 for details about reel specifications. 2. Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J-STD-020C. 3. For Moisture Sensitivity Level (MSL), see the HIP2101 device page. For more information about MSL, see TB363. Pinouts 6 LI HS 4 5 HI 12 LO NC 2 11 VSS NC 3 10 NC HB 4 HO HS EPAD NC 3 1 16 15 14 13 NC 1 12 NC HB 2 11 VSS 9 NC 5 8 LI HO 3 10 LI 6 7 HI NC 4 9 EPAD 5 6 7 NC 8 NC HO EPAD VDD LO VSS HI LO 7 VDD 8 2 HS 1 HB HIP2101 (QFN) TOP VIEW NC VDD HIP2101IR4 (DFN) TOP VIEW NC HIP2101 (SOIC, EPSOIC) TOP VIEW NOTE: EPAD = Exposed PAD. Pin Descriptions SYMBOL DESCRIPTION VDD Positive Supply to lower gate drivers. De-couple this pin to VSS. Bootstrap diode connected to HB. HB High-Side Bootstrap supply. External bootstrap capacitor is required. Connect positive side of bootstrap capacitor to this pin. Bootstrap diode is on-chip. HO High-Side Output. Connect to gate of High-Side power MOSFET. HS High-Side Source connection. Connect to source of High-Side power MOSFET. Connect negative side of bootstrap capacitor to this pin. HI High-Side input. LI Low-Side input. VSS Chip negative supply, generally will be ground. LO Low-Side Output. Connect to gate of Low-Side power MOSFET. EPAD Exposed pad. Connect to ground or float. The EPAD is electrically isolated from all other pins. FN9025 Rev.10.00 Aug 8, 2019 Page 2 of 15 HIP2101 Application Block Diagram +12V +100V SECONDARY CIRCUIT VDD HB DRIVE HI PWM CONTROLLER LI CONTROL HI HO HS DRIVE LO LO REFERENCE AND ISOLATION HIP2101 VSS Functional Block Diagram HB VDD UNDER VOLTAGE HO LEVEL SHIFT DRIVER HS HI UNDER VOLTAGE LO DRIVER LI VSS EPAD (EPSOIC, QFN and DFN PACKAGES ONLY) *EPAD = Exposed Pad. The EPAD is electrically isolated from all other pins. For best thermal performance connect the EPAD to the PCB power ground plane. FN9025 Rev.10.00 Aug 8, 2019 Page 3 of 15 HIP2101 +48V +12V PWM SECONDARY CIRCUIT HIP 2101 ISOLATION FIGURE 1. TWO-SWITCH FORWARD CONVERTER +48V SECONDARY CIRCUIT +12V PWM HIP 2101 ISOLATION FIGURE 2. FORWARD CONVERTER WITH AN ACTIVE CLAMP FN9025 Rev.10.00 Aug 8, 2019 Page 4 of 15 HIP2101 Absolute Maximum Ratings Thermal Information Supply Voltage, VDD, VHB-VHS (Notes 4, 5) . . . . . . . . -0.3V to 18V LI and HI Voltages (Note 5) . . . . . . . . . . . . . . . . . . . . . -0.3V to 7.0V Voltage on LO (Note 5) . . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V Voltage on HO (Note 5) . . . . . . . . . . . . . . . VHS -0.3V to VHB +0.3V Voltage on HS (Continuous) (Note 5) . . . . . . . . . . . . . . -1V to 110V Voltage on HB (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +118V Average Current in VDD to HB diode . . . . . . . . . . . . . . . . . . . 100mA ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 (1kV) Thermal Resistance (Typical) Maximum Recommended Operating Conditions Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . +9V to 14.0VDC Voltage on HS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to 100V Voltage on HS . . . . . . . . . . . . . . .(Repetitive Transient) -5V to 105V Voltage on HB . . VHS +8V to VHS +14.0V and VDD -1V to VDD +100V HS Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .